predicates.md revision 169689
1169689Skan;; Predicate definitions for S/390 and zSeries. 2169689Skan;; Copyright (C) 2005 Free Software Foundation, Inc. 3169689Skan;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and 4169689Skan;; Ulrich Weigand (uweigand@de.ibm.com). 5169689Skan;; 6169689Skan;; This file is part of GCC. 7169689Skan;; 8169689Skan;; GCC is free software; you can redistribute it and/or modify 9169689Skan;; it under the terms of the GNU General Public License as published by 10169689Skan;; the Free Software Foundation; either version 2, or (at your option) 11169689Skan;; any later version. 12169689Skan;; 13169689Skan;; GCC is distributed in the hope that it will be useful, 14169689Skan;; but WITHOUT ANY WARRANTY; without even the implied warranty of 15169689Skan;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16169689Skan;; GNU General Public License for more details. 17169689Skan;; 18169689Skan;; You should have received a copy of the GNU General Public License 19169689Skan;; along with GCC; see the file COPYING. If not, write to 20169689Skan;; the Free Software Foundation, 51 Franklin Street, Fifth Floor, 21169689Skan;; Boston, MA 02110-1301, USA. 22169689Skan 23169689Skan;; OP is the current operation. 24169689Skan;; MODE is the current operation mode. 25169689Skan 26169689Skan;; operands -------------------------------------------------------------- 27169689Skan 28169689Skan;; Return true if OP a (const_int 0) operand. 29169689Skan 30169689Skan(define_predicate "const0_operand" 31169689Skan (and (match_code "const_int, const_double") 32169689Skan (match_test "op == CONST0_RTX (mode)"))) 33169689Skan 34169689Skan;; Return true if OP is constant. 35169689Skan 36169689Skan(define_special_predicate "consttable_operand" 37169689Skan (and (match_code "symbol_ref, label_ref, const, const_int, const_double") 38169689Skan (match_test "CONSTANT_P (op)"))) 39169689Skan 40169689Skan;; Return true if OP is a valid S-type operand. 41169689Skan 42169689Skan(define_predicate "s_operand" 43169689Skan (and (match_code "subreg, mem") 44169689Skan (match_operand 0 "general_operand")) 45169689Skan{ 46169689Skan /* Just like memory_operand, allow (subreg (mem ...)) 47169689Skan after reload. */ 48169689Skan if (reload_completed 49169689Skan && GET_CODE (op) == SUBREG 50169689Skan && GET_CODE (SUBREG_REG (op)) == MEM) 51169689Skan op = SUBREG_REG (op); 52169689Skan 53169689Skan if (GET_CODE (op) != MEM) 54169689Skan return false; 55169689Skan if (!s390_legitimate_address_without_index_p (op)) 56169689Skan return false; 57169689Skan 58169689Skan return true; 59169689Skan}) 60169689Skan 61169689Skan;; Return true if OP is a valid operand for the BRAS instruction. 62169689Skan;; Allow SYMBOL_REFs and @PLT stubs. 63169689Skan 64169689Skan(define_special_predicate "bras_sym_operand" 65169689Skan (ior (and (match_code "symbol_ref") 66169689Skan (match_test "!flag_pic || SYMBOL_REF_LOCAL_P (op)")) 67169689Skan (and (match_code "const") 68169689Skan (and (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC") 69169689Skan (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_PLT"))))) 70169689Skan 71169689Skan;; Return true if OP is a PLUS that is not a legitimate 72169689Skan;; operand for the LA instruction. 73169689Skan 74169689Skan(define_predicate "s390_plus_operand" 75169689Skan (and (match_code "plus") 76169689Skan (and (match_test "mode == Pmode") 77169689Skan (match_test "!legitimate_la_operand_p (op)")))) 78169689Skan 79169689Skan;; Return true if OP is a valid operand as shift count or setmem. 80169689Skan 81169689Skan(define_predicate "shift_count_or_setmem_operand" 82169689Skan (match_code "reg, subreg, plus, const_int") 83169689Skan{ 84169689Skan HOST_WIDE_INT offset; 85169689Skan rtx base; 86169689Skan 87169689Skan /* Extract base register and offset. */ 88169689Skan if (!s390_decompose_shift_count (op, &base, &offset)) 89169689Skan return false; 90169689Skan 91169689Skan /* Don't allow any non-base hard registers. Doing so without 92169689Skan confusing reload and/or regrename would be tricky, and doesn't 93169689Skan buy us much anyway. */ 94169689Skan if (base && REGNO (base) < FIRST_PSEUDO_REGISTER && !ADDR_REG_P (base)) 95169689Skan return false; 96169689Skan 97169689Skan /* Unfortunately we have to reject constants that are invalid 98169689Skan for an address, or else reload will get confused. */ 99169689Skan if (!DISP_IN_RANGE (offset)) 100169689Skan return false; 101169689Skan 102169689Skan return true; 103169689Skan}) 104169689Skan 105169689Skan;; Return true if OP a valid operand for the LARL instruction. 106169689Skan 107169689Skan(define_predicate "larl_operand" 108169689Skan (match_code "label_ref, symbol_ref, const, const_int, const_double") 109169689Skan{ 110169689Skan /* Allow labels and local symbols. */ 111169689Skan if (GET_CODE (op) == LABEL_REF) 112169689Skan return true; 113169689Skan if (GET_CODE (op) == SYMBOL_REF) 114169689Skan return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0 115169689Skan && SYMBOL_REF_TLS_MODEL (op) == 0 116169689Skan && (!flag_pic || SYMBOL_REF_LOCAL_P (op))); 117169689Skan 118169689Skan /* Everything else must have a CONST, so strip it. */ 119169689Skan if (GET_CODE (op) != CONST) 120169689Skan return false; 121169689Skan op = XEXP (op, 0); 122169689Skan 123169689Skan /* Allow adding *even* in-range constants. */ 124169689Skan if (GET_CODE (op) == PLUS) 125169689Skan { 126169689Skan if (GET_CODE (XEXP (op, 1)) != CONST_INT 127169689Skan || (INTVAL (XEXP (op, 1)) & 1) != 0) 128169689Skan return false; 129169689Skan if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 31 130169689Skan || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 31)) 131169689Skan return false; 132169689Skan op = XEXP (op, 0); 133169689Skan } 134169689Skan 135169689Skan /* Labels and local symbols allowed here as well. */ 136169689Skan if (GET_CODE (op) == LABEL_REF) 137169689Skan return true; 138169689Skan if (GET_CODE (op) == SYMBOL_REF) 139169689Skan return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0 140169689Skan && SYMBOL_REF_TLS_MODEL (op) == 0 141169689Skan && (!flag_pic || SYMBOL_REF_LOCAL_P (op))); 142169689Skan 143169689Skan /* Now we must have a @GOTENT offset or @PLT stub 144169689Skan or an @INDNTPOFF TLS offset. */ 145169689Skan if (GET_CODE (op) == UNSPEC 146169689Skan && XINT (op, 1) == UNSPEC_GOTENT) 147169689Skan return true; 148169689Skan if (GET_CODE (op) == UNSPEC 149169689Skan && XINT (op, 1) == UNSPEC_PLT) 150169689Skan return true; 151169689Skan if (GET_CODE (op) == UNSPEC 152169689Skan && XINT (op, 1) == UNSPEC_INDNTPOFF) 153169689Skan return true; 154169689Skan 155169689Skan return false; 156169689Skan}) 157169689Skan 158169689Skan;; operators -------------------------------------------------------------- 159169689Skan 160169689Skan;; Return nonzero if OP is a valid comparison operator 161169689Skan;; for a branch condition. 162169689Skan 163169689Skan(define_predicate "s390_comparison" 164169689Skan (match_code "eq, ne, lt, gt, le, ge, ltu, gtu, leu, geu, 165169689Skan uneq, unlt, ungt, unle, unge, ltgt, 166169689Skan unordered, ordered") 167169689Skan{ 168169689Skan if (GET_CODE (XEXP (op, 0)) != REG 169169689Skan || REGNO (XEXP (op, 0)) != CC_REGNUM 170169689Skan || XEXP (op, 1) != const0_rtx) 171169689Skan return false; 172169689Skan 173169689Skan return (s390_branch_condition_mask (op) >= 0); 174169689Skan}) 175169689Skan 176169689Skan;; Return nonzero if OP is a valid comparison operator 177169689Skan;; for an ALC condition. 178169689Skan 179169689Skan(define_predicate "s390_alc_comparison" 180169689Skan (match_code "zero_extend, sign_extend, ltu, gtu, leu, geu") 181169689Skan{ 182169689Skan while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND) 183169689Skan op = XEXP (op, 0); 184169689Skan 185169689Skan if (!COMPARISON_P (op)) 186169689Skan return false; 187169689Skan 188169689Skan if (GET_CODE (XEXP (op, 0)) != REG 189169689Skan || REGNO (XEXP (op, 0)) != CC_REGNUM 190169689Skan || XEXP (op, 1) != const0_rtx) 191169689Skan return false; 192169689Skan 193169689Skan switch (GET_MODE (XEXP (op, 0))) 194169689Skan { 195169689Skan case CCL1mode: 196169689Skan return GET_CODE (op) == LTU; 197169689Skan 198169689Skan case CCL2mode: 199169689Skan return GET_CODE (op) == LEU; 200169689Skan 201169689Skan case CCL3mode: 202169689Skan return GET_CODE (op) == GEU; 203169689Skan 204169689Skan case CCUmode: 205169689Skan return GET_CODE (op) == GTU; 206169689Skan 207169689Skan case CCURmode: 208169689Skan return GET_CODE (op) == LTU; 209169689Skan 210169689Skan case CCSmode: 211169689Skan return GET_CODE (op) == UNGT; 212169689Skan 213169689Skan case CCSRmode: 214169689Skan return GET_CODE (op) == UNLT; 215169689Skan 216169689Skan default: 217169689Skan return false; 218169689Skan } 219169689Skan}) 220169689Skan 221169689Skan;; Return nonzero if OP is a valid comparison operator 222169689Skan;; for an SLB condition. 223169689Skan 224169689Skan(define_predicate "s390_slb_comparison" 225169689Skan (match_code "zero_extend, sign_extend, ltu, gtu, leu, geu") 226169689Skan{ 227169689Skan while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND) 228169689Skan op = XEXP (op, 0); 229169689Skan 230169689Skan if (!COMPARISON_P (op)) 231169689Skan return false; 232169689Skan 233169689Skan if (GET_CODE (XEXP (op, 0)) != REG 234169689Skan || REGNO (XEXP (op, 0)) != CC_REGNUM 235169689Skan || XEXP (op, 1) != const0_rtx) 236169689Skan return false; 237169689Skan 238169689Skan switch (GET_MODE (XEXP (op, 0))) 239169689Skan { 240169689Skan case CCL1mode: 241169689Skan return GET_CODE (op) == GEU; 242169689Skan 243169689Skan case CCL2mode: 244169689Skan return GET_CODE (op) == GTU; 245169689Skan 246169689Skan case CCL3mode: 247169689Skan return GET_CODE (op) == LTU; 248169689Skan 249169689Skan case CCUmode: 250169689Skan return GET_CODE (op) == LEU; 251169689Skan 252169689Skan case CCURmode: 253169689Skan return GET_CODE (op) == GEU; 254169689Skan 255169689Skan case CCSmode: 256169689Skan return GET_CODE (op) == LE; 257169689Skan 258169689Skan case CCSRmode: 259169689Skan return GET_CODE (op) == GE; 260169689Skan 261169689Skan default: 262169689Skan return false; 263169689Skan } 264169689Skan}) 265169689Skan 266169689Skan;; Return true if OP is a load multiple operation. It is known to be a 267169689Skan;; PARALLEL and the first section will be tested. 268169689Skan 269169689Skan(define_special_predicate "load_multiple_operation" 270169689Skan (match_code "parallel") 271169689Skan{ 272169689Skan enum machine_mode elt_mode; 273169689Skan int count = XVECLEN (op, 0); 274169689Skan unsigned int dest_regno; 275169689Skan rtx src_addr; 276169689Skan int i, off; 277169689Skan 278169689Skan /* Perform a quick check so we don't blow up below. */ 279169689Skan if (count <= 1 280169689Skan || GET_CODE (XVECEXP (op, 0, 0)) != SET 281169689Skan || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG 282169689Skan || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) 283169689Skan return false; 284169689Skan 285169689Skan dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); 286169689Skan src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); 287169689Skan elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0))); 288169689Skan 289169689Skan /* Check, is base, or base + displacement. */ 290169689Skan 291169689Skan if (GET_CODE (src_addr) == REG) 292169689Skan off = 0; 293169689Skan else if (GET_CODE (src_addr) == PLUS 294169689Skan && GET_CODE (XEXP (src_addr, 0)) == REG 295169689Skan && GET_CODE (XEXP (src_addr, 1)) == CONST_INT) 296169689Skan { 297169689Skan off = INTVAL (XEXP (src_addr, 1)); 298169689Skan src_addr = XEXP (src_addr, 0); 299169689Skan } 300169689Skan else 301169689Skan return false; 302169689Skan 303169689Skan for (i = 1; i < count; i++) 304169689Skan { 305169689Skan rtx elt = XVECEXP (op, 0, i); 306169689Skan 307169689Skan if (GET_CODE (elt) != SET 308169689Skan || GET_CODE (SET_DEST (elt)) != REG 309169689Skan || GET_MODE (SET_DEST (elt)) != elt_mode 310169689Skan || REGNO (SET_DEST (elt)) != dest_regno + i 311169689Skan || GET_CODE (SET_SRC (elt)) != MEM 312169689Skan || GET_MODE (SET_SRC (elt)) != elt_mode 313169689Skan || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS 314169689Skan || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) 315169689Skan || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT 316169689Skan || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) 317169689Skan != off + i * GET_MODE_SIZE (elt_mode)) 318169689Skan return false; 319169689Skan } 320169689Skan 321169689Skan return true; 322169689Skan}) 323169689Skan 324169689Skan;; Return true if OP is a store multiple operation. It is known to be a 325169689Skan;; PARALLEL and the first section will be tested. 326169689Skan 327169689Skan(define_special_predicate "store_multiple_operation" 328169689Skan (match_code "parallel") 329169689Skan{ 330169689Skan enum machine_mode elt_mode; 331169689Skan int count = XVECLEN (op, 0); 332169689Skan unsigned int src_regno; 333169689Skan rtx dest_addr; 334169689Skan int i, off; 335169689Skan 336169689Skan /* Perform a quick check so we don't blow up below. */ 337169689Skan if (count <= 1 338169689Skan || GET_CODE (XVECEXP (op, 0, 0)) != SET 339169689Skan || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM 340169689Skan || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) 341169689Skan return false; 342169689Skan 343169689Skan src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); 344169689Skan dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); 345169689Skan elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0))); 346169689Skan 347169689Skan /* Check, is base, or base + displacement. */ 348169689Skan 349169689Skan if (GET_CODE (dest_addr) == REG) 350169689Skan off = 0; 351169689Skan else if (GET_CODE (dest_addr) == PLUS 352169689Skan && GET_CODE (XEXP (dest_addr, 0)) == REG 353169689Skan && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT) 354169689Skan { 355169689Skan off = INTVAL (XEXP (dest_addr, 1)); 356169689Skan dest_addr = XEXP (dest_addr, 0); 357169689Skan } 358169689Skan else 359169689Skan return false; 360169689Skan 361169689Skan for (i = 1; i < count; i++) 362169689Skan { 363169689Skan rtx elt = XVECEXP (op, 0, i); 364169689Skan 365169689Skan if (GET_CODE (elt) != SET 366169689Skan || GET_CODE (SET_SRC (elt)) != REG 367169689Skan || GET_MODE (SET_SRC (elt)) != elt_mode 368169689Skan || REGNO (SET_SRC (elt)) != src_regno + i 369169689Skan || GET_CODE (SET_DEST (elt)) != MEM 370169689Skan || GET_MODE (SET_DEST (elt)) != elt_mode 371169689Skan || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS 372169689Skan || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) 373169689Skan || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT 374169689Skan || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) 375169689Skan != off + i * GET_MODE_SIZE (elt_mode)) 376169689Skan return false; 377169689Skan } 378169689Skan return true; 379169689Skan}) 380