constraints.md revision 169689
133965Sjdp;; Constraint definitions for MIPS. 233965Sjdp;; Copyright (C) 2006 Free Software Foundation, Inc. 333965Sjdp;; 433965Sjdp;; This file is part of GCC. 5218822Sdim;; 633965Sjdp;; GCC is free software; you can redistribute it and/or modify 733965Sjdp;; it under the terms of the GNU General Public License as published by 833965Sjdp;; the Free Software Foundation; either version 2, or (at your option) 933965Sjdp;; any later version. 1033965Sjdp;; 1133965Sjdp;; GCC is distributed in the hope that it will be useful, 12218822Sdim;; but WITHOUT ANY WARRANTY; without even the implied warranty of 1333965Sjdp;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1433965Sjdp;; GNU General Public License for more details. 1533965Sjdp;; 1633965Sjdp;; You should have received a copy of the GNU General Public License 1733965Sjdp;; along with GCC; see the file COPYING. If not, write to 1833965Sjdp;; the Free Software Foundation, 51 Franklin Street, Fifth Floor, 1989857Sobrien;; Boston, MA 02110-1301, USA. 2033965Sjdp 2133965Sjdp;; Register constraints 2233965Sjdp 2333965Sjdp(define_register_constraint "d" "BASE_REG_CLASS" 2433965Sjdp "An address register. This is equivalent to @code{r} unless 2533965Sjdp generating MIPS16 code.") 2677298Sobrien 2777298Sobrien(define_register_constraint "t" "T_REG" 2877298Sobrien "@internal") 2977298Sobrien 3077298Sobrien(define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS" 3133965Sjdp "A floating-point register (if available).") 3277298Sobrien 3377298Sobrien(define_register_constraint "h" "HI_REG" 3477298Sobrien "The @code{hi} register.") 3577298Sobrien 3677298Sobrien(define_register_constraint "l" "LO_REG" 3777298Sobrien "The @code{lo} register.") 3833965Sjdp 3933965Sjdp(define_register_constraint "x" "MD_REGS" 4033965Sjdp "The @code{hi} and @code{lo} registers.") 4189857Sobrien 4233965Sjdp(define_register_constraint "b" "ALL_REGS" 4333965Sjdp "@internal") 44218822Sdim 4533965Sjdp(define_register_constraint "c" "TARGET_ABICALLS ? PIC_FN_ADDR_REG 4633965Sjdp : TARGET_MIPS16 ? M16_NA_REGS 4733965Sjdp : GR_REGS" 4833965Sjdp "A register suitable for use in an indirect jump. This will always be 4933965Sjdp @code{$25} for @option{-mabicalls}.") 5033965Sjdp 51218822Sdim(define_register_constraint "e" "LEA_REGS" 5233965Sjdp "@internal") 5333965Sjdp 5433965Sjdp(define_register_constraint "j" "PIC_FN_ADDR_REG" 5533965Sjdp "@internal") 5633965Sjdp 5733965Sjdp(define_register_constraint "v" "V1_REG" 5833965Sjdp "@internal") 5933965Sjdp 6033965Sjdp(define_register_constraint "y" "GR_REGS" 6133965Sjdp "Equivalent to @code{r}; retained for backwards compatibility.") 6233965Sjdp 6333965Sjdp(define_register_constraint "z" "ST_REGS" 6433965Sjdp "A floating-point condition code register.") 6589857Sobrien 6689857Sobrien(define_register_constraint "A" "DSP_ACC_REGS" 6760484Sobrien "@internal") 6889857Sobrien 6933965Sjdp(define_register_constraint "a" "ACC_REGS" 7033965Sjdp "@internal") 7133965Sjdp 7260484Sobrien(define_register_constraint "B" "COP0_REGS" 7333965Sjdp "@internal") 7433965Sjdp 7533965Sjdp(define_register_constraint "C" "COP2_REGS" 7633965Sjdp "@internal") 7733965Sjdp 7833965Sjdp(define_register_constraint "D" "COP3_REGS" 7933965Sjdp "@internal") 8033965Sjdp 8133965Sjdp;; Integer constraints 8233965Sjdp 8333965Sjdp(define_constraint "I" 8433965Sjdp "A signed 16-bit constant (for arithmetic instructions)." 8533965Sjdp (and (match_code "const_int") 8633965Sjdp (match_test "SMALL_OPERAND (ival)"))) 8733965Sjdp 8833965Sjdp(define_constraint "J" 8933965Sjdp "Integer zero." 9033965Sjdp (and (match_code "const_int") 9133965Sjdp (match_test "ival == 0"))) 9233965Sjdp 9333965Sjdp(define_constraint "K" 9433965Sjdp "An unsigned 16-bit constant (for logic instructions)." 9533965Sjdp (and (match_code "const_int") 9633965Sjdp (match_test "SMALL_OPERAND_UNSIGNED (ival)"))) 9733965Sjdp 9833965Sjdp(define_constraint "L" 9933965Sjdp "A signed 32-bit constant in which the lower 16 bits are zero. 10033965Sjdp Such constants can be loaded using @code{lui}." 10133965Sjdp (and (match_code "const_int") 10233965Sjdp (match_test "LUI_OPERAND (ival)"))) 10333965Sjdp 10433965Sjdp(define_constraint "M" 10533965Sjdp "A constant that cannot be loaded using @code{lui}, @code{addiu} 10633965Sjdp or @code{ori}." 10733965Sjdp (and (match_code "const_int") 10833965Sjdp (match_test "!SMALL_OPERAND (ival)") 10933965Sjdp (match_test "!SMALL_OPERAND_UNSIGNED (ival)") 11033965Sjdp (match_test "!LUI_OPERAND (ival)"))) 11133965Sjdp 11233965Sjdp(define_constraint "N" 11333965Sjdp "A constant in the range -65535 to -1 (inclusive)." 11433965Sjdp (and (match_code "const_int") 11533965Sjdp (match_test "ival >= -0xffff && ival < 0"))) 11633965Sjdp 11733965Sjdp(define_constraint "O" 11833965Sjdp "A signed 15-bit constant." 11933965Sjdp (and (match_code "const_int") 12033965Sjdp (match_test "ival >= -0x4000 && ival < 0x4000"))) 12133965Sjdp 12233965Sjdp(define_constraint "P" 12333965Sjdp "A constant in the range 1 to 65535 (inclusive)." 12433965Sjdp (and (match_code "const_int") 12533965Sjdp (match_test "ival > 0 && ival < 0x10000"))) 12633965Sjdp 12733965Sjdp;; Floating-point constraints 12833965Sjdp 12933965Sjdp(define_constraint "G" 13033965Sjdp "Floating-point zero." 13133965Sjdp (and (match_code "const_double") 13233965Sjdp (match_test "op == CONST0_RTX (mode)"))) 13333965Sjdp 13433965Sjdp;; General constraints 13533965Sjdp 13633965Sjdp(define_constraint "Q" 13733965Sjdp "@internal" 13833965Sjdp (match_operand 0 "const_arith_operand")) 13933965Sjdp 14033965Sjdp(define_memory_constraint "R" 14133965Sjdp "An address that can be used in a non-macro load or store." 14233965Sjdp (and (match_code "mem") 14333965Sjdp (match_test "mips_fetch_insns (op) == 1"))) 14433965Sjdp 14533965Sjdp(define_constraint "S" 14633965Sjdp "@internal 14733965Sjdp A constant call address." 14833965Sjdp (and (match_operand 0 "call_insn_operand") 14933965Sjdp (match_test "CONSTANT_P (op)"))) 15033965Sjdp 15133965Sjdp(define_constraint "T" 15233965Sjdp "@internal 15333965Sjdp A constant @code{move_operand} that cannot be safely loaded into @code{$25} 15433965Sjdp using @code{la}." 15533965Sjdp (and (match_operand 0 "move_operand") 15633965Sjdp (match_test "CONSTANT_P (op)") 15733965Sjdp (match_test "mips_dangerous_for_la25_p (op)"))) 15833965Sjdp 15933965Sjdp(define_constraint "U" 16033965Sjdp "@internal 16133965Sjdp A constant @code{move_operand} that can be safely loaded into @code{$25} 16233965Sjdp using @code{la}." 16333965Sjdp (and (match_operand 0 "move_operand") 16433965Sjdp (match_test "CONSTANT_P (op)") 16533965Sjdp (match_test "!mips_dangerous_for_la25_p (op)"))) 16633965Sjdp 16733965Sjdp(define_memory_constraint "W" 16833965Sjdp "@internal 16933965Sjdp A memory address based on a member of @code{BASE_REG_CLASS}. This is 17033965Sjdp true for all non-mips16 references (although it can sometimes be implicit 17133965Sjdp if @samp{!TARGET_EXPLICIT_RELOCS}). For MIPS16, it excludes stack and 17233965Sjdp constant-pool references." 17333965Sjdp (and (match_code "mem") 17433965Sjdp (match_operand 0 "memory_operand") 17533965Sjdp (ior (match_test "!TARGET_MIPS16") 17633965Sjdp (and (not (match_operand 0 "stack_operand")) 17733965Sjdp (not (match_test "CONSTANT_P (XEXP (op, 0))")))))) 17833965Sjdp 17933965Sjdp(define_constraint "YG" 18033965Sjdp "@internal 18133965Sjdp A vector zero." 18233965Sjdp (and (match_code "const_vector") 18333965Sjdp (match_test "op == CONST0_RTX (mode)"))) 18433965Sjdp 18533965Sjdp(define_constraint "YA" 18633965Sjdp "@internal 18733965Sjdp An unsigned 6-bit constant." 18833965Sjdp (and (match_code "const_int") 18933965Sjdp (match_test "UIMM6_OPERAND (ival)"))) 19033965Sjdp 19133965Sjdp(define_constraint "YB" 19233965Sjdp "@internal 19333965Sjdp A signed 10-bit constant." 19433965Sjdp (and (match_code "const_int") 19533965Sjdp (match_test "IMM10_OPERAND (ival)"))) 19633965Sjdp