190075Sobrien/* Definitions of target machine for GNU compiler, for ARM. 290075Sobrien Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3169689Skan 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. 490075Sobrien Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl) 590075Sobrien and Martin Simmons (@harleqn.co.uk). 690075Sobrien More major hacks by Richard Earnshaw (rearnsha@arm.com) 790075Sobrien Minor hacks by Nick Clifton (nickc@cygnus.com) 890075Sobrien 9132718Skan This file is part of GCC. 1090075Sobrien 11132718Skan GCC is free software; you can redistribute it and/or modify it 12132718Skan under the terms of the GNU General Public License as published 13132718Skan by the Free Software Foundation; either version 2, or (at your 14132718Skan option) any later version. 1590075Sobrien 16132718Skan GCC is distributed in the hope that it will be useful, but WITHOUT 17132718Skan ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 18132718Skan or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19132718Skan License for more details. 2090075Sobrien 21132718Skan You should have received a copy of the GNU General Public License 22132718Skan along with GCC; see the file COPYING. If not, write to 23169689Skan the Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 24169689Skan MA 02110-1301, USA. */ 2590075Sobrien 2690075Sobrien#ifndef GCC_ARM_H 2790075Sobrien#define GCC_ARM_H 2890075Sobrien 29169689Skan/* The architecture define. */ 30169689Skanextern char arm_arch_name[]; 31169689Skan 32117395Skan/* Target CPU builtins. */ 33117395Skan#define TARGET_CPU_CPP_BUILTINS() \ 34117395Skan do \ 35117395Skan { \ 36169689Skan /* Define __arm__ even when in thumb mode, for \ 37169689Skan consistency with armcc. */ \ 38169689Skan builtin_define ("__arm__"); \ 39169689Skan builtin_define ("__APCS_32__"); \ 40169689Skan if (TARGET_THUMB) \ 41117395Skan builtin_define ("__thumb__"); \ 42117395Skan \ 43117395Skan if (TARGET_BIG_END) \ 44117395Skan { \ 45117395Skan builtin_define ("__ARMEB__"); \ 46117395Skan if (TARGET_THUMB) \ 47117395Skan builtin_define ("__THUMBEB__"); \ 48117395Skan if (TARGET_LITTLE_WORDS) \ 49117395Skan builtin_define ("__ARMWEL__"); \ 50117395Skan } \ 51117395Skan else \ 52117395Skan { \ 53117395Skan builtin_define ("__ARMEL__"); \ 54117395Skan if (TARGET_THUMB) \ 55117395Skan builtin_define ("__THUMBEL__"); \ 56117395Skan } \ 57117395Skan \ 58117395Skan if (TARGET_SOFT_FLOAT) \ 59117395Skan builtin_define ("__SOFTFP__"); \ 60117395Skan \ 61169689Skan if (TARGET_VFP) \ 62117395Skan builtin_define ("__VFP_FP__"); \ 63117395Skan \ 64117395Skan /* Add a define for interworking. \ 65117395Skan Needed when building libgcc.a. */ \ 66169689Skan if (arm_cpp_interwork) \ 67117395Skan builtin_define ("__THUMB_INTERWORK__"); \ 68117395Skan \ 69117395Skan builtin_assert ("cpu=arm"); \ 70117395Skan builtin_assert ("machine=arm"); \ 71169689Skan \ 72169689Skan builtin_define (arm_arch_name); \ 73169689Skan if (arm_arch_cirrus) \ 74169689Skan builtin_define ("__MAVERICK__"); \ 75169689Skan if (arm_arch_xscale) \ 76169689Skan builtin_define ("__XSCALE__"); \ 77169689Skan if (arm_arch_iwmmxt) \ 78169689Skan builtin_define ("__IWMMXT__"); \ 79169689Skan if (TARGET_AAPCS_BASED) \ 80169689Skan builtin_define ("__ARM_EABI__"); \ 81117395Skan } while (0) 82117395Skan 83169689Skan/* The various ARM cores. */ 84169689Skanenum processor_type 85169689Skan{ 86169689Skan#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ 87169689Skan IDENT, 88169689Skan#include "arm-cores.def" 89169689Skan#undef ARM_CORE 90169689Skan /* Used to indicate that no processor has been specified. */ 91169689Skan arm_none 92169689Skan}; 9390075Sobrien 94169689Skanenum target_cpus 95169689Skan{ 96169689Skan#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ 97169689Skan TARGET_CPU_##IDENT, 98169689Skan#include "arm-cores.def" 99169689Skan#undef ARM_CORE 100169689Skan TARGET_CPU_generic 101169689Skan}; 102169689Skan 103169689Skan/* The processor for which instructions should be scheduled. */ 104169689Skanextern enum processor_type arm_tune; 105169689Skan 10690075Sobrientypedef enum arm_cond_code 10790075Sobrien{ 10890075Sobrien ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC, ARM_MI, ARM_PL, ARM_VS, ARM_VC, 10990075Sobrien ARM_HI, ARM_LS, ARM_GE, ARM_LT, ARM_GT, ARM_LE, ARM_AL, ARM_NV 11090075Sobrien} 11190075Sobrienarm_cc; 11290075Sobrien 11390075Sobrienextern arm_cc arm_current_cc; 11490075Sobrien 11590075Sobrien#define ARM_INVERSE_CONDITION_CODE(X) ((arm_cc) (((int)X) ^ 1)) 11690075Sobrien 11790075Sobrienextern int arm_target_label; 11890075Sobrienextern int arm_ccfsm_state; 119117395Skanextern GTY(()) rtx arm_target_insn; 12090075Sobrien/* Define the information needed to generate branch insns. This is 121117395Skan stored from the compare operation. */ 122117395Skanextern GTY(()) rtx arm_compare_op0; 123117395Skanextern GTY(()) rtx arm_compare_op1; 12490075Sobrien/* The label of the current constant pool. */ 125117395Skanextern rtx pool_vector_label; 12690075Sobrien/* Set to 1 when a return insn is output, this means that the epilogue 127132718Skan is not needed. */ 12890075Sobrienextern int return_used_this_function; 129117395Skan/* Used to produce AOF syntax assembler. */ 130117395Skanextern GTY(()) rtx aof_pic_label; 13190075Sobrien 132132718Skan/* Just in case configure has failed to define anything. */ 13390075Sobrien#ifndef TARGET_CPU_DEFAULT 13490075Sobrien#define TARGET_CPU_DEFAULT TARGET_CPU_generic 13590075Sobrien#endif 13690075Sobrien 13790075Sobrien 13890075Sobrien#undef CPP_SPEC 139169689Skan#define CPP_SPEC "%(subtarget_cpp_spec) \ 140117395Skan%{msoft-float:%{mhard-float: \ 141117395Skan %e-msoft-float and -mhard_float may not be used together}} \ 142117395Skan%{mbig-endian:%{mlittle-endian: \ 143117395Skan %e-mbig-endian and -mlittle-endian may not be used together}}" 14490075Sobrien 14590075Sobrien#ifndef CC1_SPEC 14690075Sobrien#define CC1_SPEC "" 14790075Sobrien#endif 14890075Sobrien 14990075Sobrien/* This macro defines names of additional specifications to put in the specs 15090075Sobrien that can be used in various specifications like CC1_SPEC. Its definition 15190075Sobrien is an initializer with a subgrouping for each command option. 15290075Sobrien 15390075Sobrien Each subgrouping contains a string constant, that defines the 154132718Skan specification name, and a string constant that used by the GCC driver 15590075Sobrien program. 15690075Sobrien 15790075Sobrien Do not define this macro if it does not need to do anything. */ 15890075Sobrien#define EXTRA_SPECS \ 15990075Sobrien { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \ 16090075Sobrien SUBTARGET_EXTRA_SPECS 16190075Sobrien 16290075Sobrien#ifndef SUBTARGET_EXTRA_SPECS 16390075Sobrien#define SUBTARGET_EXTRA_SPECS 16490075Sobrien#endif 16590075Sobrien 16690075Sobrien#ifndef SUBTARGET_CPP_SPEC 16790075Sobrien#define SUBTARGET_CPP_SPEC "" 16890075Sobrien#endif 16990075Sobrien 17090075Sobrien/* Run-time Target Specification. */ 17190075Sobrien#ifndef TARGET_VERSION 17290075Sobrien#define TARGET_VERSION fputs (" (ARM/generic)", stderr); 17390075Sobrien#endif 17490075Sobrien 175169689Skan#define TARGET_SOFT_FLOAT (arm_float_abi == ARM_FLOAT_ABI_SOFT) 176169689Skan/* Use hardware floating point instructions. */ 177169689Skan#define TARGET_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT) 178169689Skan/* Use hardware floating point calling convention. */ 179169689Skan#define TARGET_HARD_FLOAT_ABI (arm_float_abi == ARM_FLOAT_ABI_HARD) 180169689Skan#define TARGET_FPA (arm_fp_model == ARM_FP_MODEL_FPA) 181169689Skan#define TARGET_MAVERICK (arm_fp_model == ARM_FP_MODEL_MAVERICK) 182169689Skan#define TARGET_VFP (arm_fp_model == ARM_FP_MODEL_VFP) 183132718Skan#define TARGET_IWMMXT (arm_arch_iwmmxt) 184132718Skan#define TARGET_REALLY_IWMMXT (TARGET_IWMMXT && TARGET_ARM) 185169689Skan#define TARGET_IWMMXT_ABI (TARGET_ARM && arm_abi == ARM_ABI_IWMMXT) 18690075Sobrien#define TARGET_ARM (! TARGET_THUMB) 18790075Sobrien#define TARGET_EITHER 1 /* (TARGET_ARM | TARGET_THUMB) */ 188169689Skan#define TARGET_BACKTRACE (leaf_function_p () \ 189169689Skan ? TARGET_TPCS_LEAF_FRAME \ 190169689Skan : TARGET_TPCS_FRAME) 191169689Skan#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN) 192169689Skan#define TARGET_AAPCS_BASED \ 193169689Skan (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS) 19490075Sobrien 195169689Skan#define TARGET_HARD_TP (target_thread_pointer == TP_CP15) 196169689Skan#define TARGET_SOFT_TP (target_thread_pointer == TP_SOFT) 197169689Skan 198169689Skan/* True iff the full BPABI is being used. If TARGET_BPABI is true, 199169689Skan then TARGET_AAPCS_BASED must be true -- but the converse does not 200169689Skan hold. TARGET_BPABI implies the use of the BPABI runtime library, 201169689Skan etc., in addition to just the AAPCS calling conventions. */ 202169689Skan#ifndef TARGET_BPABI 203169689Skan#define TARGET_BPABI false 20490075Sobrien#endif 20590075Sobrien 206132718Skan/* Support for a compile-time default CPU, et cetera. The rules are: 207132718Skan --with-arch is ignored if -march or -mcpu are specified. 208132718Skan --with-cpu is ignored if -march or -mcpu are specified, and is overridden 209132718Skan by --with-arch. 210132718Skan --with-tune is ignored if -mtune or -mcpu are specified (but not affected 211132718Skan by -march). 212169689Skan --with-float is ignored if -mhard-float, -msoft-float or -mfloat-abi are 213169689Skan specified. 214169689Skan --with-fpu is ignored if -mfpu is specified. 215169689Skan --with-abi is ignored is -mabi is specified. */ 216132718Skan#define OPTION_DEFAULT_SPECS \ 217132718Skan {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \ 218132718Skan {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \ 219132718Skan {"tune", "%{!mcpu=*:%{!mtune=*:-mtune=%(VALUE)}}" }, \ 220169689Skan {"float", \ 221169689Skan "%{!msoft-float:%{!mhard-float:%{!mfloat-abi=*:-mfloat-abi=%(VALUE)}}}" }, \ 222169689Skan {"fpu", "%{!mfpu=*:-mfpu=%(VALUE)}"}, \ 223169689Skan {"abi", "%{!mabi=*:-mabi=%(VALUE)}"}, \ 224169689Skan {"mode", "%{!marm:%{!mthumb:-m%(VALUE)}}"}, 225132718Skan 226169689Skan/* Which floating point model to use. */ 227169689Skanenum arm_fp_model 22890075Sobrien{ 229169689Skan ARM_FP_MODEL_UNKNOWN, 230169689Skan /* FPA model (Hardware or software). */ 231169689Skan ARM_FP_MODEL_FPA, 232169689Skan /* Cirrus Maverick floating point model. */ 233169689Skan ARM_FP_MODEL_MAVERICK, 234169689Skan /* VFP floating point model. */ 235169689Skan ARM_FP_MODEL_VFP 23690075Sobrien}; 23790075Sobrien 238169689Skanextern enum arm_fp_model arm_fp_model; 23990075Sobrien 240169689Skan/* Which floating point hardware is available. Also update 241169689Skan fp_model_for_fpu in arm.c when adding entries to this list. */ 242132718Skanenum fputype 24390075Sobrien{ 244169689Skan /* No FP hardware. */ 245169689Skan FPUTYPE_NONE, 246132718Skan /* Full FPA support. */ 247132718Skan FPUTYPE_FPA, 248132718Skan /* Emulated FPA hardware, Issue 2 emulator (no LFM/SFM). */ 249132718Skan FPUTYPE_FPA_EMU2, 250132718Skan /* Emulated FPA hardware, Issue 3 emulator. */ 251132718Skan FPUTYPE_FPA_EMU3, 252132718Skan /* Cirrus Maverick floating point co-processor. */ 253169689Skan FPUTYPE_MAVERICK, 254169689Skan /* VFP. */ 255169689Skan FPUTYPE_VFP 25690075Sobrien}; 25790075Sobrien 25890075Sobrien/* Recast the floating point class to be the floating point attribute. */ 259132718Skan#define arm_fpu_attr ((enum attr_fpu) arm_fpu_tune) 26090075Sobrien 26190075Sobrien/* What type of floating point to tune for */ 262132718Skanextern enum fputype arm_fpu_tune; 26390075Sobrien 26490075Sobrien/* What type of floating point instructions are available */ 265132718Skanextern enum fputype arm_fpu_arch; 26690075Sobrien 267169689Skanenum float_abi_type 268169689Skan{ 269169689Skan ARM_FLOAT_ABI_SOFT, 270169689Skan ARM_FLOAT_ABI_SOFTFP, 271169689Skan ARM_FLOAT_ABI_HARD 272169689Skan}; 273169689Skan 274169689Skanextern enum float_abi_type arm_float_abi; 275169689Skan 276169689Skan#ifndef TARGET_DEFAULT_FLOAT_ABI 277169689Skan#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT 27890075Sobrien#endif 27990075Sobrien 280169689Skan/* Which ABI to use. */ 281169689Skanenum arm_abi_type 282169689Skan{ 283169689Skan ARM_ABI_APCS, 284169689Skan ARM_ABI_ATPCS, 285169689Skan ARM_ABI_AAPCS, 286169689Skan ARM_ABI_IWMMXT, 287169689Skan ARM_ABI_AAPCS_LINUX 288169689Skan}; 289169689Skan 290169689Skanextern enum arm_abi_type arm_abi; 291169689Skan 292169689Skan#ifndef ARM_DEFAULT_ABI 293169689Skan#define ARM_DEFAULT_ABI ARM_ABI_APCS 294132718Skan#endif 295132718Skan 296169689Skan/* Which thread pointer access sequence to use. */ 297169689Skanenum arm_tp_type { 298169689Skan TP_AUTO, 299169689Skan TP_SOFT, 300169689Skan TP_CP15 301169689Skan}; 30290075Sobrien 303169689Skanextern enum arm_tp_type target_thread_pointer; 304169689Skan 305169689Skan/* Nonzero if this chip supports the ARM Architecture 3M extensions. */ 306169689Skanextern int arm_arch3m; 307169689Skan 308169689Skan/* Nonzero if this chip supports the ARM Architecture 4 extensions. */ 30990075Sobrienextern int arm_arch4; 31090075Sobrien 311169689Skan/* Nonzero if this chip supports the ARM Architecture 4T extensions. */ 312169689Skanextern int arm_arch4t; 313169689Skan 314169689Skan/* Nonzero if this chip supports the ARM Architecture 5 extensions. */ 31590075Sobrienextern int arm_arch5; 31690075Sobrien 317169689Skan/* Nonzero if this chip supports the ARM Architecture 5E extensions. */ 31890075Sobrienextern int arm_arch5e; 31990075Sobrien 320169689Skan/* Nonzero if this chip supports the ARM Architecture 6 extensions. */ 321169689Skanextern int arm_arch6; 322169689Skan 32390075Sobrien/* Nonzero if this chip can benefit from load scheduling. */ 32490075Sobrienextern int arm_ld_sched; 32590075Sobrien 32690075Sobrien/* Nonzero if generating thumb code. */ 32790075Sobrienextern int thumb_code; 32890075Sobrien 32990075Sobrien/* Nonzero if this chip is a StrongARM. */ 330169689Skanextern int arm_tune_strongarm; 33190075Sobrien 332132718Skan/* Nonzero if this chip is a Cirrus variant. */ 333169689Skanextern int arm_arch_cirrus; 334132718Skan 335132718Skan/* Nonzero if this chip supports Intel XScale with Wireless MMX technology. */ 336132718Skanextern int arm_arch_iwmmxt; 337132718Skan 33890075Sobrien/* Nonzero if this chip is an XScale. */ 339132718Skanextern int arm_arch_xscale; 34090075Sobrien 341169689Skan/* Nonzero if tuning for XScale. */ 342132718Skanextern int arm_tune_xscale; 343132718Skan 344169689Skan/* Nonzero if tuning for stores via the write buffer. */ 345169689Skanextern int arm_tune_wbuf; 34690075Sobrien 347169689Skan/* Nonzero if we should define __THUMB_INTERWORK__ in the 348169689Skan preprocessor. 349169689Skan XXX This is a bit of a hack, it's intended to help work around 350169689Skan problems in GLD which doesn't understand that armv5t code is 351169689Skan interworking clean. */ 352169689Skanextern int arm_cpp_interwork; 353169689Skan 35490075Sobrien#ifndef TARGET_DEFAULT 355169689Skan#define TARGET_DEFAULT (MASK_APCS_FRAME) 35690075Sobrien#endif 35790075Sobrien 35890075Sobrien/* The frame pointer register used in gcc has nothing to do with debugging; 35990075Sobrien that is controlled by the APCS-FRAME option. */ 36090075Sobrien#define CAN_DEBUG_WITHOUT_FP 36190075Sobrien 36290075Sobrien#define OVERRIDE_OPTIONS arm_override_options () 36390075Sobrien 36490075Sobrien/* Nonzero if PIC code requires explicit qualifiers to generate 36590075Sobrien PLT and GOT relocs rather than the assembler doing so implicitly. 36690075Sobrien Subtargets can override these if required. */ 36790075Sobrien#ifndef NEED_GOT_RELOC 36890075Sobrien#define NEED_GOT_RELOC 0 36990075Sobrien#endif 37090075Sobrien#ifndef NEED_PLT_RELOC 37190075Sobrien#define NEED_PLT_RELOC 0 37290075Sobrien#endif 37390075Sobrien 37490075Sobrien/* Nonzero if we need to refer to the GOT with a PC-relative 37590075Sobrien offset. In other words, generate 37690075Sobrien 377169689Skan .word _GLOBAL_OFFSET_TABLE_ - [. - (.Lxx + 8)] 37890075Sobrien 37990075Sobrien rather than 38090075Sobrien 38190075Sobrien .word _GLOBAL_OFFSET_TABLE_ - (.Lxx + 8) 38290075Sobrien 383169689Skan The default is true, which matches NetBSD. Subtargets can 38490075Sobrien override this if required. */ 38590075Sobrien#ifndef GOT_PCREL 38690075Sobrien#define GOT_PCREL 1 38790075Sobrien#endif 38890075Sobrien 38990075Sobrien/* Target machine storage Layout. */ 39090075Sobrien 39190075Sobrien 39290075Sobrien/* Define this macro if it is advisable to hold scalars in registers 39390075Sobrien in a wider mode than that declared by the program. In such cases, 39490075Sobrien the value is constrained to be within the bounds of the declared 39590075Sobrien type, but kept valid in the wider mode. The signedness of the 39690075Sobrien extension may differ from that of the type. */ 39790075Sobrien 39890075Sobrien/* It is far faster to zero extend chars than to sign extend them */ 39990075Sobrien 40090075Sobrien#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 40190075Sobrien if (GET_MODE_CLASS (MODE) == MODE_INT \ 40290075Sobrien && GET_MODE_SIZE (MODE) < 4) \ 40390075Sobrien { \ 40490075Sobrien if (MODE == QImode) \ 40590075Sobrien UNSIGNEDP = 1; \ 40690075Sobrien else if (MODE == HImode) \ 407169689Skan UNSIGNEDP = 1; \ 40890075Sobrien (MODE) = SImode; \ 40990075Sobrien } 41090075Sobrien 411169689Skan#define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \ 412169689Skan if ((GET_MODE_CLASS (MODE) == MODE_INT \ 413169689Skan || GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT) \ 414169689Skan && GET_MODE_SIZE (MODE) < 4) \ 415169689Skan (MODE) = SImode; \ 41690075Sobrien 41790075Sobrien/* Define this if most significant bit is lowest numbered 41890075Sobrien in instructions that operate on numbered bit-fields. */ 41990075Sobrien#define BITS_BIG_ENDIAN 0 42090075Sobrien 421169689Skan/* Define this if most significant byte of a word is the lowest numbered. 42290075Sobrien Most ARM processors are run in little endian mode, so that is the default. 42390075Sobrien If you want to have it run-time selectable, change the definition in a 42490075Sobrien cover file to be TARGET_BIG_ENDIAN. */ 42590075Sobrien#define BYTES_BIG_ENDIAN (TARGET_BIG_END != 0) 42690075Sobrien 42790075Sobrien/* Define this if most significant word of a multiword number is the lowest 42890075Sobrien numbered. 42990075Sobrien This is always false, even when in big-endian mode. */ 43090075Sobrien#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN && ! TARGET_LITTLE_WORDS) 43190075Sobrien 43290075Sobrien/* LIBGCC2_WORDS_BIG_ENDIAN has to be a constant, so we define this based 43390075Sobrien on processor pre-defineds when compiling libgcc2.c. */ 43490075Sobrien#if defined(__ARMEB__) && !defined(__ARMWEL__) 43590075Sobrien#define LIBGCC2_WORDS_BIG_ENDIAN 1 43690075Sobrien#else 43790075Sobrien#define LIBGCC2_WORDS_BIG_ENDIAN 0 43890075Sobrien#endif 43990075Sobrien 44090075Sobrien/* Define this if most significant word of doubles is the lowest numbered. 441132718Skan The rules are different based on whether or not we use FPA-format, 442132718Skan VFP-format or some other floating point co-processor's format doubles. */ 443117395Skan#define FLOAT_WORDS_BIG_ENDIAN (arm_float_words_big_endian ()) 44490075Sobrien 44590075Sobrien#define UNITS_PER_WORD 4 44690075Sobrien 447169689Skan/* True if natural alignment is used for doubleword types. */ 448169689Skan#define ARM_DOUBLEWORD_ALIGN TARGET_AAPCS_BASED 449169689Skan 450169689Skan#define DOUBLEWORD_ALIGNMENT 64 451169689Skan 45290075Sobrien#define PARM_BOUNDARY 32 45390075Sobrien 454169689Skan#define STACK_BOUNDARY (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32) 455132718Skan 456169689Skan#define PREFERRED_STACK_BOUNDARY \ 457169689Skan (arm_abi == ARM_ABI_ATPCS ? 64 : STACK_BOUNDARY) 45890075Sobrien 45990075Sobrien#define FUNCTION_BOUNDARY 32 46090075Sobrien 46190075Sobrien/* The lowest bit is used to indicate Thumb-mode functions, so the 46290075Sobrien vbit must go into the delta field of pointers to member 46390075Sobrien functions. */ 46490075Sobrien#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta 46590075Sobrien 46690075Sobrien#define EMPTY_FIELD_BOUNDARY 32 46790075Sobrien 468169689Skan#define BIGGEST_ALIGNMENT (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32) 46990075Sobrien 470132718Skan/* XXX Blah -- this macro is used directly by libobjc. Since it 471132718Skan supports no vector modes, cut out the complexity and fall back 472132718Skan on BIGGEST_FIELD_ALIGNMENT. */ 473132718Skan#ifdef IN_TARGET_LIBS 474132718Skan#define BIGGEST_FIELD_ALIGNMENT 64 475132718Skan#endif 476132718Skan 47790075Sobrien/* Make strings word-aligned so strcpy from constants will be faster. */ 478132718Skan#define CONSTANT_ALIGNMENT_FACTOR (TARGET_THUMB || ! arm_tune_xscale ? 1 : 2) 479169689Skan 48090075Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 481169689Skan ((TREE_CODE (EXP) == STRING_CST \ 482169689Skan && (ALIGN) < BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR) \ 483169689Skan ? BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR : (ALIGN)) 48490075Sobrien 48590075Sobrien/* Setting STRUCTURE_SIZE_BOUNDARY to 32 produces more efficient code, but the 48690075Sobrien value set in previous versions of this toolchain was 8, which produces more 48790075Sobrien compact structures. The command line option -mstructure_size_boundary=<n> 48890075Sobrien can be used to change this value. For compatibility with the ARM SDK 48990075Sobrien however the value should be left at 32. ARM SDT Reference Manual (ARM DUI 490169689Skan 0020D) page 2-20 says "Structures are aligned on word boundaries". 491169689Skan The AAPCS specifies a value of 8. */ 49290075Sobrien#define STRUCTURE_SIZE_BOUNDARY arm_structure_size_boundary 49390075Sobrienextern int arm_structure_size_boundary; 49490075Sobrien 495117395Skan/* This is the value used to initialize arm_structure_size_boundary. If a 49690075Sobrien particular arm target wants to change the default value it should change 497132718Skan the definition of this macro, not STRUCTURE_SIZE_BOUNDARY. See netbsd.h 49890075Sobrien for an example of this. */ 49990075Sobrien#ifndef DEFAULT_STRUCTURE_SIZE_BOUNDARY 50090075Sobrien#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 32 50190075Sobrien#endif 50290075Sobrien 503117395Skan/* Nonzero if move instructions will actually fail to work 50490075Sobrien when given unaligned data. */ 50590075Sobrien#define STRICT_ALIGNMENT 1 506169689Skan 507169689Skan/* wchar_t is unsigned under the AAPCS. */ 508169689Skan#ifndef WCHAR_TYPE 509169689Skan#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "int") 510182907Sobrien#undef WCHAR_TYPE_SIZE 511169689Skan#define WCHAR_TYPE_SIZE BITS_PER_WORD 512169689Skan#endif 513169689Skan 514169689Skan#ifndef SIZE_TYPE 515169689Skan#define SIZE_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long unsigned int") 516169689Skan#endif 517169689Skan 518169689Skan#ifndef PTRDIFF_TYPE 519169689Skan#define PTRDIFF_TYPE (TARGET_AAPCS_BASED ? "int" : "long int") 520169689Skan#endif 521169689Skan 522169689Skan/* AAPCS requires that structure alignment is affected by bitfields. */ 523169689Skan#ifndef PCC_BITFIELD_TYPE_MATTERS 524169689Skan#define PCC_BITFIELD_TYPE_MATTERS TARGET_AAPCS_BASED 525169689Skan#endif 526169689Skan 52790075Sobrien 52890075Sobrien/* Standard register usage. */ 52990075Sobrien 53090075Sobrien/* Register allocation in ARM Procedure Call Standard (as used on RISCiX): 53190075Sobrien (S - saved over call). 53290075Sobrien 53390075Sobrien r0 * argument word/integer result 53490075Sobrien r1-r3 argument word 53590075Sobrien 53690075Sobrien r4-r8 S register variable 53790075Sobrien r9 S (rfp) register variable (real frame pointer) 538169689Skan 53990075Sobrien r10 F S (sl) stack limit (used by -mapcs-stack-check) 54090075Sobrien r11 F S (fp) argument pointer 54190075Sobrien r12 (ip) temp workspace 54290075Sobrien r13 F S (sp) lower end of current stack frame 54390075Sobrien r14 (lr) link address/workspace 54490075Sobrien r15 F (pc) program counter 54590075Sobrien 54690075Sobrien f0 floating point result 54790075Sobrien f1-f3 floating point scratch 54890075Sobrien 54990075Sobrien f4-f7 S floating point variable 55090075Sobrien 55190075Sobrien cc This is NOT a real register, but is used internally 55290075Sobrien to represent things that use or set the condition 55390075Sobrien codes. 55490075Sobrien sfp This isn't either. It is used during rtl generation 55590075Sobrien since the offset between the frame pointer and the 55690075Sobrien auto's isn't known until after register allocation. 55790075Sobrien afp Nor this, we only need this because of non-local 55890075Sobrien goto. Without it fp appears to be used and the 55990075Sobrien elimination code won't get rid of sfp. It tracks 56090075Sobrien fp exactly at all times. 56190075Sobrien 56290075Sobrien *: See CONDITIONAL_REGISTER_USAGE */ 56390075Sobrien 564132718Skan/* 565132718Skan mvf0 Cirrus floating point result 566132718Skan mvf1-mvf3 Cirrus floating point scratch 567132718Skan mvf4-mvf15 S Cirrus floating point variable. */ 568132718Skan 569169689Skan/* s0-s15 VFP scratch (aka d0-d7). 570169689Skan s16-s31 S VFP variable (aka d8-d15). 571169689Skan vfpcc Not a real register. Represents the VFP condition 572169689Skan code flags. */ 573169689Skan 57490075Sobrien/* The stack backtrace structure is as follows: 57590075Sobrien fp points to here: | save code pointer | [fp] 57690075Sobrien | return link value | [fp, #-4] 57790075Sobrien | return sp value | [fp, #-8] 57890075Sobrien | return fp value | [fp, #-12] 57990075Sobrien [| saved r10 value |] 58090075Sobrien [| saved r9 value |] 58190075Sobrien [| saved r8 value |] 58290075Sobrien [| saved r7 value |] 58390075Sobrien [| saved r6 value |] 58490075Sobrien [| saved r5 value |] 58590075Sobrien [| saved r4 value |] 58690075Sobrien [| saved r3 value |] 58790075Sobrien [| saved r2 value |] 58890075Sobrien [| saved r1 value |] 58990075Sobrien [| saved r0 value |] 59090075Sobrien [| saved f7 value |] three words 59190075Sobrien [| saved f6 value |] three words 59290075Sobrien [| saved f5 value |] three words 59390075Sobrien [| saved f4 value |] three words 59490075Sobrien r0-r3 are not normally saved in a C function. */ 59590075Sobrien 59690075Sobrien/* 1 for registers that have pervasive standard uses 59790075Sobrien and are not available for the register allocator. */ 598169689Skan#define FIXED_REGISTERS \ 599169689Skan{ \ 600169689Skan 0,0,0,0,0,0,0,0, \ 601169689Skan 0,0,0,0,0,1,0,1, \ 602169689Skan 0,0,0,0,0,0,0,0, \ 603132718Skan 1,1,1, \ 604132718Skan 1,1,1,1,1,1,1,1, \ 605169689Skan 1,1,1,1,1,1,1,1, \ 606169689Skan 1,1,1,1,1,1,1,1, \ 607169689Skan 1,1,1,1,1,1,1,1, \ 608169689Skan 1,1,1,1, \ 609169689Skan 1,1,1,1,1,1,1,1, \ 610169689Skan 1,1,1,1,1,1,1,1, \ 611169689Skan 1,1,1,1,1,1,1,1, \ 612169689Skan 1,1,1,1,1,1,1,1, \ 613169689Skan 1 \ 61490075Sobrien} 61590075Sobrien 61690075Sobrien/* 1 for registers not available across function calls. 61790075Sobrien These must include the FIXED_REGISTERS and also any 61890075Sobrien registers that can be used without being saved. 61990075Sobrien The latter must include the registers where values are returned 62090075Sobrien and the register where structure-value addresses are passed. 62190075Sobrien Aside from that, you can include as many other registers as you like. 622169689Skan The CC is not preserved over function calls on the ARM 6, so it is 623132718Skan easier to assume this for all. SFP is preserved, since FP is. */ 62490075Sobrien#define CALL_USED_REGISTERS \ 62590075Sobrien{ \ 62690075Sobrien 1,1,1,1,0,0,0,0, \ 62790075Sobrien 0,0,0,0,1,1,1,1, \ 62890075Sobrien 1,1,1,1,0,0,0,0, \ 629132718Skan 1,1,1, \ 630132718Skan 1,1,1,1,1,1,1,1, \ 631132718Skan 1,1,1,1,1,1,1,1, \ 632132718Skan 1,1,1,1,1,1,1,1, \ 633132718Skan 1,1,1,1,1,1,1,1, \ 634169689Skan 1,1,1,1, \ 635169689Skan 1,1,1,1,1,1,1,1, \ 636169689Skan 1,1,1,1,1,1,1,1, \ 637169689Skan 1,1,1,1,1,1,1,1, \ 638169689Skan 1,1,1,1,1,1,1,1, \ 639169689Skan 1 \ 64090075Sobrien} 64190075Sobrien 64290075Sobrien#ifndef SUBTARGET_CONDITIONAL_REGISTER_USAGE 64390075Sobrien#define SUBTARGET_CONDITIONAL_REGISTER_USAGE 64490075Sobrien#endif 64590075Sobrien 64690075Sobrien#define CONDITIONAL_REGISTER_USAGE \ 64790075Sobrien{ \ 64890075Sobrien int regno; \ 64990075Sobrien \ 650169689Skan if (TARGET_SOFT_FLOAT || TARGET_THUMB || !TARGET_FPA) \ 65190075Sobrien { \ 652169689Skan for (regno = FIRST_FPA_REGNUM; \ 653169689Skan regno <= LAST_FPA_REGNUM; ++regno) \ 65490075Sobrien fixed_regs[regno] = call_used_regs[regno] = 1; \ 65590075Sobrien } \ 656132718Skan \ 657132718Skan if (TARGET_THUMB && optimize_size) \ 65890075Sobrien { \ 659132718Skan /* When optimizing for size, it's better not to use \ 660132718Skan the HI regs, because of the overhead of stacking \ 661132718Skan them. */ \ 662132718Skan for (regno = FIRST_HI_REGNUM; \ 663132718Skan regno <= LAST_HI_REGNUM; ++regno) \ 664132718Skan fixed_regs[regno] = call_used_regs[regno] = 1; \ 665132718Skan } \ 666132718Skan \ 667132718Skan /* The link register can be clobbered by any branch insn, \ 668132718Skan but we have no way to track that at present, so mark \ 669132718Skan it as unavailable. */ \ 670132718Skan if (TARGET_THUMB) \ 671132718Skan fixed_regs[LR_REGNUM] = call_used_regs[LR_REGNUM] = 1; \ 672132718Skan \ 673169689Skan if (TARGET_ARM && TARGET_HARD_FLOAT) \ 674132718Skan { \ 675169689Skan if (TARGET_MAVERICK) \ 676132718Skan { \ 677169689Skan for (regno = FIRST_FPA_REGNUM; \ 678169689Skan regno <= LAST_FPA_REGNUM; ++ regno) \ 679169689Skan fixed_regs[regno] = call_used_regs[regno] = 1; \ 680169689Skan for (regno = FIRST_CIRRUS_FP_REGNUM; \ 681169689Skan regno <= LAST_CIRRUS_FP_REGNUM; ++ regno) \ 682169689Skan { \ 683169689Skan fixed_regs[regno] = 0; \ 684169689Skan call_used_regs[regno] = regno < FIRST_CIRRUS_FP_REGNUM + 4; \ 685169689Skan } \ 686132718Skan } \ 687169689Skan if (TARGET_VFP) \ 688169689Skan { \ 689169689Skan for (regno = FIRST_VFP_REGNUM; \ 690169689Skan regno <= LAST_VFP_REGNUM; ++ regno) \ 691169689Skan { \ 692169689Skan fixed_regs[regno] = 0; \ 693169689Skan call_used_regs[regno] = regno < FIRST_VFP_REGNUM + 16; \ 694169689Skan } \ 695169689Skan } \ 696132718Skan } \ 697132718Skan \ 698132718Skan if (TARGET_REALLY_IWMMXT) \ 699132718Skan { \ 700132718Skan regno = FIRST_IWMMXT_GR_REGNUM; \ 701132718Skan /* The 2002/10/09 revision of the XScale ABI has wCG0 \ 702132718Skan and wCG1 as call-preserved registers. The 2002/11/21 \ 703132718Skan revision changed this so that all wCG registers are \ 704132718Skan scratch registers. */ \ 705132718Skan for (regno = FIRST_IWMMXT_GR_REGNUM; \ 706132718Skan regno <= LAST_IWMMXT_GR_REGNUM; ++ regno) \ 707169689Skan fixed_regs[regno] = 0; \ 708132718Skan /* The XScale ABI has wR0 - wR9 as scratch registers, \ 709132718Skan the rest as call-preserved registers. */ \ 710132718Skan for (regno = FIRST_IWMMXT_REGNUM; \ 711132718Skan regno <= LAST_IWMMXT_REGNUM; ++ regno) \ 712132718Skan { \ 713132718Skan fixed_regs[regno] = 0; \ 714132718Skan call_used_regs[regno] = regno < FIRST_IWMMXT_REGNUM + 10; \ 715132718Skan } \ 716132718Skan } \ 717132718Skan \ 718132718Skan if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ 719132718Skan { \ 72090075Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 72190075Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 72290075Sobrien } \ 72390075Sobrien else if (TARGET_APCS_STACK) \ 72490075Sobrien { \ 72590075Sobrien fixed_regs[10] = 1; \ 72690075Sobrien call_used_regs[10] = 1; \ 72790075Sobrien } \ 728169689Skan /* -mcaller-super-interworking reserves r11 for calls to \ 729169689Skan _interwork_r11_call_via_rN(). Making the register global \ 730169689Skan is an easy way of ensuring that it remains valid for all \ 731169689Skan calls. */ \ 732169689Skan if (TARGET_APCS_FRAME || TARGET_CALLER_INTERWORKING \ 733169689Skan || TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) \ 73490075Sobrien { \ 73590075Sobrien fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ 73690075Sobrien call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ 737169689Skan if (TARGET_CALLER_INTERWORKING) \ 738169689Skan global_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ 73990075Sobrien } \ 74090075Sobrien SUBTARGET_CONDITIONAL_REGISTER_USAGE \ 74190075Sobrien} 742169689Skan 743132718Skan/* These are a couple of extensions to the formats accepted 74490075Sobrien by asm_fprintf: 74590075Sobrien %@ prints out ASM_COMMENT_START 74690075Sobrien %r prints out REGISTER_PREFIX reg_names[arg] */ 74790075Sobrien#define ASM_FPRINTF_EXTENSIONS(FILE, ARGS, P) \ 74890075Sobrien case '@': \ 74990075Sobrien fputs (ASM_COMMENT_START, FILE); \ 75090075Sobrien break; \ 75190075Sobrien \ 75290075Sobrien case 'r': \ 75390075Sobrien fputs (REGISTER_PREFIX, FILE); \ 75490075Sobrien fputs (reg_names [va_arg (ARGS, int)], FILE); \ 75590075Sobrien break; 75690075Sobrien 75790075Sobrien/* Round X up to the nearest word. */ 758132718Skan#define ROUND_UP_WORD(X) (((X) + 3) & ~3) 75990075Sobrien 76090075Sobrien/* Convert fron bytes to ints. */ 761117395Skan#define ARM_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 76290075Sobrien 763169689Skan/* The number of (integer) registers required to hold a quantity of type MODE. 764169689Skan Also used for VFP registers. */ 765117395Skan#define ARM_NUM_REGS(MODE) \ 766117395Skan ARM_NUM_INTS (GET_MODE_SIZE (MODE)) 76790075Sobrien 76890075Sobrien/* The number of (integer) registers required to hold a quantity of TYPE MODE. */ 769117395Skan#define ARM_NUM_REGS2(MODE, TYPE) \ 770117395Skan ARM_NUM_INTS ((MODE) == BLKmode ? \ 77190075Sobrien int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) 77290075Sobrien 77390075Sobrien/* The number of (integer) argument register available. */ 77490075Sobrien#define NUM_ARG_REGS 4 77590075Sobrien 776132718Skan/* Return the register number of the N'th (integer) argument. */ 77790075Sobrien#define ARG_REGISTER(N) (N - 1) 77890075Sobrien 77990075Sobrien/* Specify the registers used for certain standard purposes. 78090075Sobrien The values of these macros are register numbers. */ 78190075Sobrien 78290075Sobrien/* The number of the last argument register. */ 78390075Sobrien#define LAST_ARG_REGNUM ARG_REGISTER (NUM_ARG_REGS) 78490075Sobrien 785132718Skan/* The numbers of the Thumb register ranges. */ 786132718Skan#define FIRST_LO_REGNUM 0 78790075Sobrien#define LAST_LO_REGNUM 7 788132718Skan#define FIRST_HI_REGNUM 8 789132718Skan#define LAST_HI_REGNUM 11 79090075Sobrien 791169689Skan#ifndef TARGET_UNWIND_INFO 792169689Skan/* We use sjlj exceptions for backwards compatibility. */ 793169689Skan#define MUST_USE_SJLJ_EXCEPTIONS 1 794169689Skan#endif 795169689Skan 796169689Skan/* We can generate DWARF2 Unwind info, even though we don't use it. */ 797169689Skan#define DWARF2_UNWIND_INFO 1 798169689Skan 799169689Skan/* Use r0 and r1 to pass exception handling information. */ 800169689Skan#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? N : INVALID_REGNUM) 801169689Skan 80290075Sobrien/* The register that holds the return address in exception handlers. */ 803169689Skan#define ARM_EH_STACKADJ_REGNUM 2 804169689Skan#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM) 80590075Sobrien 80690075Sobrien/* The native (Norcroft) Pascal compiler for the ARM passes the static chain 80790075Sobrien as an invisible last argument (possible since varargs don't exist in 80890075Sobrien Pascal), so the following is not true. */ 80990075Sobrien#define STATIC_CHAIN_REGNUM (TARGET_ARM ? 12 : 9) 81090075Sobrien 81190075Sobrien/* Define this to be where the real frame pointer is if it is not possible to 81290075Sobrien work out the offset between the frame pointer and the automatic variables 81390075Sobrien until after register allocation has taken place. FRAME_POINTER_REGNUM 81490075Sobrien should point to a special register that we will make sure is eliminated. 81590075Sobrien 81690075Sobrien For the Thumb we have another problem. The TPCS defines the frame pointer 817132718Skan as r11, and GCC believes that it is always possible to use the frame pointer 81890075Sobrien as base register for addressing purposes. (See comments in 81990075Sobrien find_reloads_address()). But - the Thumb does not allow high registers, 82090075Sobrien including r11, to be used as base address registers. Hence our problem. 82190075Sobrien 82290075Sobrien The solution used here, and in the old thumb port is to use r7 instead of 82390075Sobrien r11 as the hard frame pointer and to have special code to generate 82490075Sobrien backtrace structures on the stack (if required to do so via a command line 825132718Skan option) using r11. This is the only 'user visible' use of r11 as a frame 82690075Sobrien pointer. */ 82790075Sobrien#define ARM_HARD_FRAME_POINTER_REGNUM 11 82890075Sobrien#define THUMB_HARD_FRAME_POINTER_REGNUM 7 82990075Sobrien 83090075Sobrien#define HARD_FRAME_POINTER_REGNUM \ 83190075Sobrien (TARGET_ARM \ 83290075Sobrien ? ARM_HARD_FRAME_POINTER_REGNUM \ 83390075Sobrien : THUMB_HARD_FRAME_POINTER_REGNUM) 83490075Sobrien 83590075Sobrien#define FP_REGNUM HARD_FRAME_POINTER_REGNUM 83690075Sobrien 83790075Sobrien/* Register to use for pushing function arguments. */ 83890075Sobrien#define STACK_POINTER_REGNUM SP_REGNUM 83990075Sobrien 84090075Sobrien/* ARM floating pointer registers. */ 841169689Skan#define FIRST_FPA_REGNUM 16 842169689Skan#define LAST_FPA_REGNUM 23 843169689Skan#define IS_FPA_REGNUM(REGNUM) \ 844169689Skan (((REGNUM) >= FIRST_FPA_REGNUM) && ((REGNUM) <= LAST_FPA_REGNUM)) 84590075Sobrien 846132718Skan#define FIRST_IWMMXT_GR_REGNUM 43 847132718Skan#define LAST_IWMMXT_GR_REGNUM 46 848132718Skan#define FIRST_IWMMXT_REGNUM 47 849132718Skan#define LAST_IWMMXT_REGNUM 62 850132718Skan#define IS_IWMMXT_REGNUM(REGNUM) \ 851132718Skan (((REGNUM) >= FIRST_IWMMXT_REGNUM) && ((REGNUM) <= LAST_IWMMXT_REGNUM)) 852132718Skan#define IS_IWMMXT_GR_REGNUM(REGNUM) \ 853132718Skan (((REGNUM) >= FIRST_IWMMXT_GR_REGNUM) && ((REGNUM) <= LAST_IWMMXT_GR_REGNUM)) 854132718Skan 85590075Sobrien/* Base register for access to local variables of the function. */ 85690075Sobrien#define FRAME_POINTER_REGNUM 25 85790075Sobrien 85890075Sobrien/* Base register for access to arguments of the function. */ 85990075Sobrien#define ARG_POINTER_REGNUM 26 86090075Sobrien 861132718Skan#define FIRST_CIRRUS_FP_REGNUM 27 862132718Skan#define LAST_CIRRUS_FP_REGNUM 42 863132718Skan#define IS_CIRRUS_REGNUM(REGNUM) \ 864132718Skan (((REGNUM) >= FIRST_CIRRUS_FP_REGNUM) && ((REGNUM) <= LAST_CIRRUS_FP_REGNUM)) 86590075Sobrien 866169689Skan#define FIRST_VFP_REGNUM 63 867169689Skan#define LAST_VFP_REGNUM 94 868169689Skan#define IS_VFP_REGNUM(REGNUM) \ 869169689Skan (((REGNUM) >= FIRST_VFP_REGNUM) && ((REGNUM) <= LAST_VFP_REGNUM)) 870169689Skan 871132718Skan/* The number of hard registers is 16 ARM + 8 FPA + 1 CC + 1 SFP + 1 AFP. */ 872132718Skan/* + 16 Cirrus registers take us up to 43. */ 873132718Skan/* Intel Wireless MMX Technology registers add 16 + 4 more. */ 874169689Skan/* VFP adds 32 + 1 more. */ 875169689Skan#define FIRST_PSEUDO_REGISTER 96 876132718Skan 877169689Skan#define DBX_REGISTER_NUMBER(REGNO) arm_dbx_register_number (REGNO) 878169689Skan 87990075Sobrien/* Value should be nonzero if functions must have frame pointers. 88090075Sobrien Zero means the frame pointer need not be set up (and parms may be accessed 881169689Skan via the stack pointer) in functions that seem suitable. 88290075Sobrien If we have to have a frame pointer we might as well make use of it. 88390075Sobrien APCS says that the frame pointer does not need to be pushed in leaf 88490075Sobrien functions, or simple tail call functions. */ 885169689Skan 886169689Skan#ifndef SUBTARGET_FRAME_POINTER_REQUIRED 887169689Skan#define SUBTARGET_FRAME_POINTER_REQUIRED 0 888169689Skan#endif 889169689Skan 89090075Sobrien#define FRAME_POINTER_REQUIRED \ 89190075Sobrien (current_function_has_nonlocal_label \ 892169689Skan || SUBTARGET_FRAME_POINTER_REQUIRED \ 89390075Sobrien || (TARGET_ARM && TARGET_APCS_FRAME && ! leaf_function_p ())) 89490075Sobrien 89590075Sobrien/* Return number of consecutive hard regs needed starting at reg REGNO 89690075Sobrien to hold something of mode MODE. 89790075Sobrien This is ordinarily the length in words of a value of mode MODE 89890075Sobrien but can be less for certain modes in special long registers. 89990075Sobrien 900132718Skan On the ARM regs are UNITS_PER_WORD bits wide; FPA regs can hold any FP 90190075Sobrien mode. */ 90290075Sobrien#define HARD_REGNO_NREGS(REGNO, MODE) \ 90390075Sobrien ((TARGET_ARM \ 904169689Skan && REGNO >= FIRST_FPA_REGNUM \ 90590075Sobrien && REGNO != FRAME_POINTER_REGNUM \ 90690075Sobrien && REGNO != ARG_POINTER_REGNUM) \ 907169689Skan && !IS_VFP_REGNUM (REGNO) \ 908117395Skan ? 1 : ARM_NUM_REGS (MODE)) 90990075Sobrien 91090075Sobrien/* Return true if REGNO is suitable for holding a quantity of type MODE. */ 91190075Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 91290075Sobrien arm_hard_regno_mode_ok ((REGNO), (MODE)) 91390075Sobrien 91490075Sobrien/* Value is 1 if it is a good idea to tie two pseudo registers 91590075Sobrien when one has mode MODE1 and one has mode MODE2. 91690075Sobrien If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 91790075Sobrien for any hard reg, then this must be 0 for correct output. */ 91890075Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 91990075Sobrien (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) 92090075Sobrien 921132718Skan#define VALID_IWMMXT_REG_MODE(MODE) \ 922169689Skan (arm_vector_mode_supported_p (MODE) || (MODE) == DImode) 923132718Skan 92490075Sobrien/* The order in which register should be allocated. It is good to use ip 92590075Sobrien since no saving is required (though calls clobber it) and it never contains 92690075Sobrien function parameters. It is quite good to use lr since other calls may 927169689Skan clobber it anyway. Allocate r0 through r3 in reverse order since r3 is 92890075Sobrien least likely to contain a function parameter; in addition results are 92990075Sobrien returned in r0. */ 930169689Skan 93190075Sobrien#define REG_ALLOC_ORDER \ 93290075Sobrien{ \ 93390075Sobrien 3, 2, 1, 0, 12, 14, 4, 5, \ 93490075Sobrien 6, 7, 8, 10, 9, 11, 13, 15, \ 93590075Sobrien 16, 17, 18, 19, 20, 21, 22, 23, \ 936132718Skan 27, 28, 29, 30, 31, 32, 33, 34, \ 937132718Skan 35, 36, 37, 38, 39, 40, 41, 42, \ 938132718Skan 43, 44, 45, 46, 47, 48, 49, 50, \ 939132718Skan 51, 52, 53, 54, 55, 56, 57, 58, \ 940132718Skan 59, 60, 61, 62, \ 941169689Skan 24, 25, 26, \ 942169689Skan 78, 77, 76, 75, 74, 73, 72, 71, \ 943169689Skan 70, 69, 68, 67, 66, 65, 64, 63, \ 944169689Skan 79, 80, 81, 82, 83, 84, 85, 86, \ 945169689Skan 87, 88, 89, 90, 91, 92, 93, 94, \ 946169689Skan 95 \ 94790075Sobrien} 94896263Sobrien 94996263Sobrien/* Interrupt functions can only use registers that have already been 95096263Sobrien saved by the prologue, even if they would normally be 95196263Sobrien call-clobbered. */ 95296263Sobrien#define HARD_REGNO_RENAME_OK(SRC, DST) \ 95396263Sobrien (! IS_INTERRUPT (cfun->machine->func_type) || \ 95496263Sobrien regs_ever_live[DST]) 95590075Sobrien 95690075Sobrien/* Register and constant classes. */ 95790075Sobrien 958132718Skan/* Register classes: used to be simple, just all ARM regs or all FPA regs 95990075Sobrien Now that the Thumb is involved it has become more complicated. */ 96090075Sobrienenum reg_class 96190075Sobrien{ 96290075Sobrien NO_REGS, 963132718Skan FPA_REGS, 964132718Skan CIRRUS_REGS, 965169689Skan VFP_REGS, 966132718Skan IWMMXT_GR_REGS, 967132718Skan IWMMXT_REGS, 96890075Sobrien LO_REGS, 96990075Sobrien STACK_REG, 97090075Sobrien BASE_REGS, 97190075Sobrien HI_REGS, 97290075Sobrien CC_REG, 973169689Skan VFPCC_REG, 97490075Sobrien GENERAL_REGS, 97590075Sobrien ALL_REGS, 97690075Sobrien LIM_REG_CLASSES 97790075Sobrien}; 97890075Sobrien 97990075Sobrien#define N_REG_CLASSES (int) LIM_REG_CLASSES 98090075Sobrien 981132718Skan/* Give names of register classes as strings for dump file. */ 98290075Sobrien#define REG_CLASS_NAMES \ 98390075Sobrien{ \ 98490075Sobrien "NO_REGS", \ 985132718Skan "FPA_REGS", \ 986132718Skan "CIRRUS_REGS", \ 987169689Skan "VFP_REGS", \ 988132718Skan "IWMMXT_GR_REGS", \ 989132718Skan "IWMMXT_REGS", \ 99090075Sobrien "LO_REGS", \ 99190075Sobrien "STACK_REG", \ 99290075Sobrien "BASE_REGS", \ 99390075Sobrien "HI_REGS", \ 99490075Sobrien "CC_REG", \ 995169689Skan "VFPCC_REG", \ 99690075Sobrien "GENERAL_REGS", \ 99790075Sobrien "ALL_REGS", \ 99890075Sobrien} 99990075Sobrien 100090075Sobrien/* Define which registers fit in which classes. 100190075Sobrien This is an initializer for a vector of HARD_REG_SET 100290075Sobrien of length N_REG_CLASSES. */ 1003169689Skan#define REG_CLASS_CONTENTS \ 1004169689Skan{ \ 1005169689Skan { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ 1006169689Skan { 0x00FF0000, 0x00000000, 0x00000000 }, /* FPA_REGS */ \ 1007169689Skan { 0xF8000000, 0x000007FF, 0x00000000 }, /* CIRRUS_REGS */ \ 1008169689Skan { 0x00000000, 0x80000000, 0x7FFFFFFF }, /* VFP_REGS */ \ 1009169689Skan { 0x00000000, 0x00007800, 0x00000000 }, /* IWMMXT_GR_REGS */ \ 1010169689Skan { 0x00000000, 0x7FFF8000, 0x00000000 }, /* IWMMXT_REGS */ \ 1011169689Skan { 0x000000FF, 0x00000000, 0x00000000 }, /* LO_REGS */ \ 1012169689Skan { 0x00002000, 0x00000000, 0x00000000 }, /* STACK_REG */ \ 1013169689Skan { 0x000020FF, 0x00000000, 0x00000000 }, /* BASE_REGS */ \ 1014169689Skan { 0x0000FF00, 0x00000000, 0x00000000 }, /* HI_REGS */ \ 1015169689Skan { 0x01000000, 0x00000000, 0x00000000 }, /* CC_REG */ \ 1016169689Skan { 0x00000000, 0x00000000, 0x80000000 }, /* VFPCC_REG */ \ 1017169689Skan { 0x0200FFFF, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \ 1018169689Skan { 0xFAFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF } /* ALL_REGS */ \ 101990075Sobrien} 102090075Sobrien 102190075Sobrien/* The same information, inverted: 102290075Sobrien Return the class number of the smallest class containing 102390075Sobrien reg number REGNO. This could be a conditional expression 102490075Sobrien or could index an array. */ 102590075Sobrien#define REGNO_REG_CLASS(REGNO) arm_regno_class (REGNO) 102690075Sobrien 1027169689Skan/* FPA registers can't do subreg as all values are reformatted to internal 1028169689Skan precision. VFP registers may only be accessed in the mode they 1029169689Skan were set. */ 1030132718Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1031132718Skan (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 1032169689Skan ? reg_classes_intersect_p (FPA_REGS, (CLASS)) \ 1033169689Skan || reg_classes_intersect_p (VFP_REGS, (CLASS)) \ 1034169689Skan : 0) 1035132718Skan 1036169689Skan/* We need to define this for LO_REGS on thumb. Otherwise we can end up 1037169689Skan using r0-r4 for function arguments, r7 for the stack frame and don't 1038169689Skan have enough left over to do doubleword arithmetic. */ 1039169689Skan#define CLASS_LIKELY_SPILLED_P(CLASS) \ 1040169689Skan ((TARGET_THUMB && (CLASS) == LO_REGS) \ 1041169689Skan || (CLASS) == CC_REG) 1042169689Skan 104390075Sobrien/* The class value for index registers, and the one for base regs. */ 104490075Sobrien#define INDEX_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS) 1045104752Skan#define BASE_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS) 104690075Sobrien 1047104752Skan/* For the Thumb the high registers cannot be used as base registers 1048132718Skan when addressing quantities in QI or HI mode; if we don't know the 1049169689Skan mode, then we must be conservative. */ 105090075Sobrien#define MODE_BASE_REG_CLASS(MODE) \ 1051104752Skan (TARGET_ARM ? GENERAL_REGS : \ 1052169689Skan (((MODE) == SImode) ? BASE_REGS : LO_REGS)) 105390075Sobrien 1054169689Skan/* For Thumb we can not support SP+reg addressing, so we return LO_REGS 1055169689Skan instead of BASE_REGS. */ 1056169689Skan#define MODE_BASE_REG_REG_CLASS(MODE) BASE_REG_CLASS 1057169689Skan 105890075Sobrien/* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows 105990075Sobrien registers explicitly used in the rtl to be used as spill registers 106090075Sobrien but prevents the compiler from extending the lifetime of these 1061132718Skan registers. */ 106290075Sobrien#define SMALL_REGISTER_CLASSES TARGET_THUMB 106390075Sobrien 106490075Sobrien/* Given an rtx X being reloaded into a reg required to be 106590075Sobrien in class CLASS, return the class of reg to actually use. 106690075Sobrien In general this is just CLASS, but for the Thumb we prefer 106790075Sobrien a LO_REGS class or a subset. */ 106890075Sobrien#define PREFERRED_RELOAD_CLASS(X, CLASS) \ 106990075Sobrien (TARGET_ARM ? (CLASS) : \ 107090075Sobrien ((CLASS) == BASE_REGS ? (CLASS) : LO_REGS)) 107190075Sobrien 107290075Sobrien/* Must leave BASE_REGS reloads alone */ 107390075Sobrien#define THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ 107490075Sobrien ((CLASS) != LO_REGS && (CLASS) != BASE_REGS \ 107590075Sobrien ? ((true_regnum (X) == -1 ? LO_REGS \ 107690075Sobrien : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \ 107790075Sobrien : NO_REGS)) \ 107890075Sobrien : NO_REGS) 107990075Sobrien 108090075Sobrien#define THUMB_SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1081146895Skan ((CLASS) != LO_REGS && (CLASS) != BASE_REGS \ 108290075Sobrien ? ((true_regnum (X) == -1 ? LO_REGS \ 108390075Sobrien : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \ 108490075Sobrien : NO_REGS)) \ 108590075Sobrien : NO_REGS) 108690075Sobrien 108790075Sobrien/* Return the register class of a scratch register needed to copy IN into 108890075Sobrien or out of a register in CLASS in MODE. If it can be done directly, 108990075Sobrien NO_REGS is returned. */ 109090075Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1091169689Skan /* Restrict which direct reloads are allowed for VFP/iWMMXt regs. */ \ 1092169689Skan ((TARGET_VFP && TARGET_HARD_FLOAT \ 1093169689Skan && (CLASS) == VFP_REGS) \ 1094169689Skan ? coproc_secondary_reload_class (MODE, X, FALSE) \ 1095169689Skan : (TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) \ 1096169689Skan ? coproc_secondary_reload_class (MODE, X, TRUE) \ 1097169689Skan : TARGET_ARM \ 1098169689Skan ? (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1) \ 109990075Sobrien ? GENERAL_REGS : NO_REGS) \ 110090075Sobrien : THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X)) 1101169689Skan 1102132718Skan/* If we need to load shorts byte-at-a-time, then we need a scratch. */ 110390075Sobrien#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1104169689Skan /* Restrict which direct reloads are allowed for VFP/iWMMXt regs. */ \ 1105169689Skan ((TARGET_VFP && TARGET_HARD_FLOAT \ 1106169689Skan && (CLASS) == VFP_REGS) \ 1107169689Skan ? coproc_secondary_reload_class (MODE, X, FALSE) : \ 1108169689Skan (TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) ? \ 1109169689Skan coproc_secondary_reload_class (MODE, X, TRUE) : \ 1110132718Skan /* Cannot load constants into Cirrus registers. */ \ 1111169689Skan (TARGET_MAVERICK && TARGET_HARD_FLOAT \ 1112132718Skan && (CLASS) == CIRRUS_REGS \ 1113132718Skan && (CONSTANT_P (X) || GET_CODE (X) == SYMBOL_REF)) \ 1114132718Skan ? GENERAL_REGS : \ 111590075Sobrien (TARGET_ARM ? \ 1116132718Skan (((CLASS) == IWMMXT_REGS || (CLASS) == IWMMXT_GR_REGS) \ 1117132718Skan && CONSTANT_P (X)) \ 1118132718Skan ? GENERAL_REGS : \ 1119169689Skan (((MODE) == HImode && ! arm_arch4 \ 112090075Sobrien && (GET_CODE (X) == MEM \ 112190075Sobrien || ((GET_CODE (X) == REG || GET_CODE (X) == SUBREG) \ 112290075Sobrien && true_regnum (X) == -1))) \ 112390075Sobrien ? GENERAL_REGS : NO_REGS) \ 1124132718Skan : THUMB_SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X))) 112590075Sobrien 112690075Sobrien/* Try a machine-dependent way of reloading an illegitimate address 112790075Sobrien operand. If we find one, push the reload and jump to WIN. This 112890075Sobrien macro is used in only one place: `find_reloads_address' in reload.c. 112990075Sobrien 113090075Sobrien For the ARM, we wish to handle large displacements off a base 113190075Sobrien register by splitting the addend across a MOV and the mem insn. 113290075Sobrien This can cut the number of reloads needed. */ 113390075Sobrien#define ARM_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND, WIN) \ 113490075Sobrien do \ 113590075Sobrien { \ 113690075Sobrien if (GET_CODE (X) == PLUS \ 113790075Sobrien && GET_CODE (XEXP (X, 0)) == REG \ 113890075Sobrien && REGNO (XEXP (X, 0)) < FIRST_PSEUDO_REGISTER \ 113990075Sobrien && REG_MODE_OK_FOR_BASE_P (XEXP (X, 0), MODE) \ 114090075Sobrien && GET_CODE (XEXP (X, 1)) == CONST_INT) \ 114190075Sobrien { \ 114290075Sobrien HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \ 114390075Sobrien HOST_WIDE_INT low, high; \ 114490075Sobrien \ 1145169689Skan if (MODE == DImode || (MODE == DFmode && TARGET_SOFT_FLOAT)) \ 114690075Sobrien low = ((val & 0xf) ^ 0x8) - 0x8; \ 1147169689Skan else if (TARGET_MAVERICK && TARGET_HARD_FLOAT) \ 1148132718Skan /* Need to be careful, -256 is not a valid offset. */ \ 1149132718Skan low = val >= 0 ? (val & 0xff) : -((-val) & 0xff); \ 115090075Sobrien else if (MODE == SImode \ 115190075Sobrien || (MODE == SFmode && TARGET_SOFT_FLOAT) \ 115290075Sobrien || ((MODE == HImode || MODE == QImode) && ! arm_arch4)) \ 115390075Sobrien /* Need to be careful, -4096 is not a valid offset. */ \ 115490075Sobrien low = val >= 0 ? (val & 0xfff) : -((-val) & 0xfff); \ 115590075Sobrien else if ((MODE == HImode || MODE == QImode) && arm_arch4) \ 115690075Sobrien /* Need to be careful, -256 is not a valid offset. */ \ 115790075Sobrien low = val >= 0 ? (val & 0xff) : -((-val) & 0xff); \ 115890075Sobrien else if (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 1159169689Skan && TARGET_HARD_FLOAT && TARGET_FPA) \ 116090075Sobrien /* Need to be careful, -1024 is not a valid offset. */ \ 116190075Sobrien low = val >= 0 ? (val & 0x3ff) : -((-val) & 0x3ff); \ 116290075Sobrien else \ 116390075Sobrien break; \ 116490075Sobrien \ 116590075Sobrien high = ((((val - low) & (unsigned HOST_WIDE_INT) 0xffffffff) \ 116690075Sobrien ^ (unsigned HOST_WIDE_INT) 0x80000000) \ 116790075Sobrien - (unsigned HOST_WIDE_INT) 0x80000000); \ 116890075Sobrien /* Check for overflow or zero */ \ 116990075Sobrien if (low == 0 || high == 0 || (high + low != val)) \ 117090075Sobrien break; \ 117190075Sobrien \ 117290075Sobrien /* Reload the high part into a base reg; leave the low part \ 117390075Sobrien in the mem. */ \ 117490075Sobrien X = gen_rtx_PLUS (GET_MODE (X), \ 117590075Sobrien gen_rtx_PLUS (GET_MODE (X), XEXP (X, 0), \ 117690075Sobrien GEN_INT (high)), \ 117790075Sobrien GEN_INT (low)); \ 117890075Sobrien push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \ 117990075Sobrien MODE_BASE_REG_CLASS (MODE), GET_MODE (X), \ 118090075Sobrien VOIDmode, 0, 0, OPNUM, TYPE); \ 118190075Sobrien goto WIN; \ 118290075Sobrien } \ 118390075Sobrien } \ 118490075Sobrien while (0) 118590075Sobrien 1186132718Skan/* XXX If an HImode FP+large_offset address is converted to an HImode 118790075Sobrien SP+large_offset address, then reload won't know how to fix it. It sees 118890075Sobrien only that SP isn't valid for HImode, and so reloads the SP into an index 118990075Sobrien register, but the resulting address is still invalid because the offset 119090075Sobrien is too big. We fix it here instead by reloading the entire address. */ 119190075Sobrien/* We could probably achieve better results by defining PROMOTE_MODE to help 119290075Sobrien cope with the variances between the Thumb's signed and unsigned byte and 119390075Sobrien halfword load instructions. */ 1194169689Skan#define THUMB_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN) \ 1195169689Skando { \ 1196169689Skan rtx new_x = thumb_legitimize_reload_address (&X, MODE, OPNUM, TYPE, IND_L); \ 1197169689Skan if (new_x) \ 1198169689Skan { \ 1199169689Skan X = new_x; \ 1200169689Skan goto WIN; \ 1201169689Skan } \ 1202169689Skan} while (0) 120390075Sobrien 120490075Sobrien#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \ 120590075Sobrien if (TARGET_ARM) \ 120690075Sobrien ARM_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN); \ 120790075Sobrien else \ 120890075Sobrien THUMB_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) 1209169689Skan 121090075Sobrien/* Return the maximum number of consecutive registers 121190075Sobrien needed to represent mode MODE in a register of class CLASS. 1212132718Skan ARM regs are UNITS_PER_WORD bits while FPA regs can hold any FP mode */ 121390075Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 1214132718Skan (((CLASS) == FPA_REGS || (CLASS) == CIRRUS_REGS) ? 1 : ARM_NUM_REGS (MODE)) 121590075Sobrien 1216132718Skan/* If defined, gives a class of registers that cannot be used as the 1217132718Skan operand of a SUBREG that changes the mode of the object illegally. */ 1218132718Skan 1219132718Skan/* Moves between FPA_REGS and GENERAL_REGS are two memory insns. */ 122090075Sobrien#define REGISTER_MOVE_COST(MODE, FROM, TO) \ 122190075Sobrien (TARGET_ARM ? \ 1222132718Skan ((FROM) == FPA_REGS && (TO) != FPA_REGS ? 20 : \ 1223132718Skan (FROM) != FPA_REGS && (TO) == FPA_REGS ? 20 : \ 1224169689Skan (FROM) == VFP_REGS && (TO) != VFP_REGS ? 10 : \ 1225169689Skan (FROM) != VFP_REGS && (TO) == VFP_REGS ? 10 : \ 1226132718Skan (FROM) == IWMMXT_REGS && (TO) != IWMMXT_REGS ? 4 : \ 1227132718Skan (FROM) != IWMMXT_REGS && (TO) == IWMMXT_REGS ? 4 : \ 1228132718Skan (FROM) == IWMMXT_GR_REGS || (TO) == IWMMXT_GR_REGS ? 20 : \ 1229132718Skan (FROM) == CIRRUS_REGS && (TO) != CIRRUS_REGS ? 20 : \ 1230132718Skan (FROM) != CIRRUS_REGS && (TO) == CIRRUS_REGS ? 20 : \ 1231132718Skan 2) \ 123290075Sobrien : \ 123390075Sobrien ((FROM) == HI_REGS || (TO) == HI_REGS) ? 4 : 2) 123490075Sobrien 123590075Sobrien/* Stack layout; function entry, exit and calling. */ 123690075Sobrien 123790075Sobrien/* Define this if pushing a word on the stack 123890075Sobrien makes the stack pointer a smaller address. */ 123990075Sobrien#define STACK_GROWS_DOWNWARD 1 124090075Sobrien 1241169689Skan/* Define this to nonzero if the nominal address of the stack frame 124290075Sobrien is at the high-address end of the local variables; 124390075Sobrien that is, each additional local variable allocated 124490075Sobrien goes at a more negative offset in the frame. */ 124590075Sobrien#define FRAME_GROWS_DOWNWARD 1 124690075Sobrien 1247169689Skan/* The amount of scratch space needed by _interwork_{r7,r11}_call_via_rN(). 1248169689Skan When present, it is one word in size, and sits at the top of the frame, 1249169689Skan between the soft frame pointer and either r7 or r11. 1250169689Skan 1251169689Skan We only need _interwork_rM_call_via_rN() for -mcaller-super-interworking, 1252169689Skan and only then if some outgoing arguments are passed on the stack. It would 1253169689Skan be tempting to also check whether the stack arguments are passed by indirect 1254169689Skan calls, but there seems to be no reason in principle why a post-reload pass 1255169689Skan couldn't convert a direct call into an indirect one. */ 1256169689Skan#define CALLER_INTERWORKING_SLOT_SIZE \ 1257169689Skan (TARGET_CALLER_INTERWORKING \ 1258169689Skan && current_function_outgoing_args_size != 0 \ 1259169689Skan ? UNITS_PER_WORD : 0) 1260169689Skan 126190075Sobrien/* Offset within stack frame to start allocating local variables at. 126290075Sobrien If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 126390075Sobrien first local allocated. Otherwise, it is the offset to the BEGINNING 126490075Sobrien of the first local allocated. */ 126590075Sobrien#define STARTING_FRAME_OFFSET 0 126690075Sobrien 126790075Sobrien/* If we generate an insn to push BYTES bytes, 126890075Sobrien this says how many the stack pointer really advances by. */ 126990075Sobrien/* The push insns do not do this rounding implicitly. 1270132718Skan So don't define this. */ 1271132718Skan/* #define PUSH_ROUNDING(NPUSHED) ROUND_UP_WORD (NPUSHED) */ 127290075Sobrien 127390075Sobrien/* Define this if the maximum size of all the outgoing args is to be 127490075Sobrien accumulated and pushed during the prologue. The amount can be 127590075Sobrien found in the variable current_function_outgoing_args_size. */ 127690075Sobrien#define ACCUMULATE_OUTGOING_ARGS 1 127790075Sobrien 127890075Sobrien/* Offset of first parameter from the argument pointer register value. */ 127990075Sobrien#define FIRST_PARM_OFFSET(FNDECL) (TARGET_ARM ? 4 : 0) 128090075Sobrien 128190075Sobrien/* Value is the number of byte of arguments automatically 128290075Sobrien popped when returning from a subroutine call. 128390075Sobrien FUNDECL is the declaration node of the function (as a tree), 128490075Sobrien FUNTYPE is the data type of the function (as a tree), 128590075Sobrien or for a library call it is an identifier node for the subroutine name. 128690075Sobrien SIZE is the number of bytes of arguments passed on the stack. 128790075Sobrien 128890075Sobrien On the ARM, the caller does not pop any of its arguments that were passed 128990075Sobrien on the stack. */ 129090075Sobrien#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 129190075Sobrien 129290075Sobrien/* Define how to find the value returned by a library function 129390075Sobrien assuming the value has mode MODE. */ 129490075Sobrien#define LIBCALL_VALUE(MODE) \ 1295169689Skan (TARGET_ARM && TARGET_HARD_FLOAT_ABI && TARGET_FPA \ 1296169689Skan && GET_MODE_CLASS (MODE) == MODE_FLOAT \ 1297169689Skan ? gen_rtx_REG (MODE, FIRST_FPA_REGNUM) \ 1298169689Skan : TARGET_ARM && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK \ 1299169689Skan && GET_MODE_CLASS (MODE) == MODE_FLOAT \ 1300132718Skan ? gen_rtx_REG (MODE, FIRST_CIRRUS_FP_REGNUM) \ 1301169689Skan : TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (MODE) \ 1302132718Skan ? gen_rtx_REG (MODE, FIRST_IWMMXT_REGNUM) \ 130390075Sobrien : gen_rtx_REG (MODE, ARG_REGISTER (1))) 130490075Sobrien 130590075Sobrien/* Define how to find the value returned by a function. 130690075Sobrien VALTYPE is the data type of the value (as a tree). 130790075Sobrien If the precise function being called is known, FUNC is its FUNCTION_DECL; 130890075Sobrien otherwise, FUNC is 0. */ 130990075Sobrien#define FUNCTION_VALUE(VALTYPE, FUNC) \ 1310169689Skan arm_function_value (VALTYPE, FUNC); 131190075Sobrien 131290075Sobrien/* 1 if N is a possible register number for a function value. 131390075Sobrien On the ARM, only r0 and f0 can return results. */ 1314132718Skan/* On a Cirrus chip, mvf0 can return results. */ 131590075Sobrien#define FUNCTION_VALUE_REGNO_P(REGNO) \ 131690075Sobrien ((REGNO) == ARG_REGISTER (1) \ 1317169689Skan || (TARGET_ARM && ((REGNO) == FIRST_CIRRUS_FP_REGNUM) \ 1318169689Skan && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK) \ 1319169689Skan || ((REGNO) == FIRST_IWMMXT_REGNUM && TARGET_IWMMXT_ABI) \ 1320169689Skan || (TARGET_ARM && ((REGNO) == FIRST_FPA_REGNUM) \ 1321169689Skan && TARGET_HARD_FLOAT_ABI && TARGET_FPA)) 132290075Sobrien 1323169689Skan/* Amount of memory needed for an untyped call to save all possible return 1324169689Skan registers. */ 1325169689Skan#define APPLY_RESULT_SIZE arm_apply_result_size() 1326169689Skan 132790075Sobrien/* How large values are returned */ 132890075Sobrien/* A C expression which can inhibit the returning of certain function values 1329132718Skan in registers, based on the type of value. */ 133090075Sobrien#define RETURN_IN_MEMORY(TYPE) arm_return_in_memory (TYPE) 133190075Sobrien 133290075Sobrien/* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return 133390075Sobrien values must be in memory. On the ARM, they need only do so if larger 1334132718Skan than a word, or if they contain elements offset from zero in the struct. */ 133590075Sobrien#define DEFAULT_PCC_STRUCT_RETURN 0 133690075Sobrien 133790075Sobrien/* Flags for the call/call_value rtl operations set up by function_arg. */ 133890075Sobrien#define CALL_NORMAL 0x00000000 /* No special processing. */ 133990075Sobrien#define CALL_LONG 0x00000001 /* Always call indirect. */ 134090075Sobrien#define CALL_SHORT 0x00000002 /* Never call indirect. */ 134190075Sobrien 134290075Sobrien/* These bits describe the different types of function supported 1343169689Skan by the ARM backend. They are exclusive. i.e. a function cannot be both a 134490075Sobrien normal function and an interworked function, for example. Knowing the 134590075Sobrien type of a function is important for determining its prologue and 134690075Sobrien epilogue sequences. 134790075Sobrien Note value 7 is currently unassigned. Also note that the interrupt 134890075Sobrien function types all have bit 2 set, so that they can be tested for easily. 134990075Sobrien Note that 0 is deliberately chosen for ARM_FT_UNKNOWN so that when the 1350117395Skan machine_function structure is initialized (to zero) func_type will 135190075Sobrien default to unknown. This will force the first use of arm_current_func_type 135290075Sobrien to call arm_compute_func_type. */ 135390075Sobrien#define ARM_FT_UNKNOWN 0 /* Type has not yet been determined. */ 135490075Sobrien#define ARM_FT_NORMAL 1 /* Your normal, straightforward function. */ 135590075Sobrien#define ARM_FT_INTERWORKED 2 /* A function that supports interworking. */ 135690075Sobrien#define ARM_FT_ISR 4 /* An interrupt service routine. */ 135790075Sobrien#define ARM_FT_FIQ 5 /* A fast interrupt service routine. */ 135890075Sobrien#define ARM_FT_EXCEPTION 6 /* An ARM exception handler (subcase of ISR). */ 135990075Sobrien 136090075Sobrien#define ARM_FT_TYPE_MASK ((1 << 3) - 1) 136190075Sobrien 136290075Sobrien/* In addition functions can have several type modifiers, 136390075Sobrien outlined by these bit masks: */ 136490075Sobrien#define ARM_FT_INTERRUPT (1 << 2) /* Note overlap with FT_ISR and above. */ 136590075Sobrien#define ARM_FT_NAKED (1 << 3) /* No prologue or epilogue. */ 136690075Sobrien#define ARM_FT_VOLATILE (1 << 4) /* Does not return. */ 1367132718Skan#define ARM_FT_NESTED (1 << 5) /* Embedded inside another func. */ 136890075Sobrien 136990075Sobrien/* Some macros to test these flags. */ 137090075Sobrien#define ARM_FUNC_TYPE(t) (t & ARM_FT_TYPE_MASK) 137190075Sobrien#define IS_INTERRUPT(t) (t & ARM_FT_INTERRUPT) 137290075Sobrien#define IS_VOLATILE(t) (t & ARM_FT_VOLATILE) 137390075Sobrien#define IS_NAKED(t) (t & ARM_FT_NAKED) 137490075Sobrien#define IS_NESTED(t) (t & ARM_FT_NESTED) 137590075Sobrien 1376169689Skan 1377169689Skan/* Structure used to hold the function stack frame layout. Offsets are 1378169689Skan relative to the stack pointer on function entry. Positive offsets are 1379169689Skan in the direction of stack growth. 1380169689Skan Only soft_frame is used in thumb mode. */ 1381169689Skan 1382169689Skantypedef struct arm_stack_offsets GTY(()) 1383169689Skan{ 1384169689Skan int saved_args; /* ARG_POINTER_REGNUM. */ 1385169689Skan int frame; /* ARM_HARD_FRAME_POINTER_REGNUM. */ 1386169689Skan int saved_regs; 1387169689Skan int soft_frame; /* FRAME_POINTER_REGNUM. */ 1388169689Skan int locals_base; /* THUMB_HARD_FRAME_POINTER_REGNUM. */ 1389169689Skan int outgoing_args; /* STACK_POINTER_REGNUM. */ 1390169689Skan} 1391169689Skanarm_stack_offsets; 1392169689Skan 139390075Sobrien/* A C structure for machine-specific, per-function data. 139490075Sobrien This is added to the cfun structure. */ 1395117395Skantypedef struct machine_function GTY(()) 139690075Sobrien{ 1397132718Skan /* Additional stack adjustment in __builtin_eh_throw. */ 1398117395Skan rtx eh_epilogue_sp_ofs; 139990075Sobrien /* Records if LR has to be saved for far jumps. */ 140090075Sobrien int far_jump_used; 140190075Sobrien /* Records if ARG_POINTER was ever live. */ 140290075Sobrien int arg_pointer_live; 140390075Sobrien /* Records if the save of LR has been eliminated. */ 140490075Sobrien int lr_save_eliminated; 1405117395Skan /* The size of the stack frame. Only valid after reload. */ 1406169689Skan arm_stack_offsets stack_offsets; 140790075Sobrien /* Records the type of the current function. */ 140890075Sobrien unsigned long func_type; 140996263Sobrien /* Record if the function has a variable argument list. */ 141096263Sobrien int uses_anonymous_args; 1411132718Skan /* Records if sibcalls are blocked because an argument 1412132718Skan register is needed to preserve stack alignment. */ 1413132718Skan int sibcall_blocked; 1414169689Skan /* The PIC register for this function. This might be a pseudo. */ 1415169689Skan rtx pic_reg; 1416169689Skan /* Labels for per-function Thumb call-via stubs. One per potential calling 1417169689Skan register. We can never call via LR or PC. We can call via SP if a 1418169689Skan trampoline happens to be on the top of the stack. */ 1419169689Skan rtx call_via[14]; 142090075Sobrien} 142190075Sobrienmachine_function; 142290075Sobrien 1423169689Skan/* As in the machine_function, a global set of call-via labels, for code 1424169689Skan that is in text_section. */ 1425169689Skanextern GTY(()) rtx thumb_call_via_label[14]; 1426169689Skan 142790075Sobrien/* A C type for declaring a variable that is used as the first argument of 142890075Sobrien `FUNCTION_ARG' and other related values. For some target machines, the 142990075Sobrien type `int' suffices and can hold the number of bytes of argument so far. */ 143090075Sobrientypedef struct 143190075Sobrien{ 143290075Sobrien /* This is the number of registers of arguments scanned so far. */ 143390075Sobrien int nregs; 1434132718Skan /* This is the number of iWMMXt register arguments scanned so far. */ 1435132718Skan int iwmmxt_nregs; 1436132718Skan int named_count; 1437132718Skan int nargs; 1438132718Skan /* One of CALL_NORMAL, CALL_LONG or CALL_SHORT. */ 143990075Sobrien int call_cookie; 1440169689Skan int can_split; 144190075Sobrien} CUMULATIVE_ARGS; 144290075Sobrien 144390075Sobrien/* Define where to put the arguments to a function. 144490075Sobrien Value is zero to push the argument on the stack, 144590075Sobrien or a hard register in which to store the argument. 144690075Sobrien 144790075Sobrien MODE is the argument's machine mode. 144890075Sobrien TYPE is the data type of the argument (as a tree). 144990075Sobrien This is null for libcalls where that information may 145090075Sobrien not be available. 145190075Sobrien CUM is a variable of type CUMULATIVE_ARGS which gives info about 145290075Sobrien the preceding args and about the function being called. 145390075Sobrien NAMED is nonzero if this argument is a named parameter 145490075Sobrien (otherwise it is an extra parameter matching an ellipsis). 145590075Sobrien 145690075Sobrien On the ARM, normally the first 16 bytes are passed in registers r0-r3; all 145790075Sobrien other arguments are passed on the stack. If (NAMED == 0) (which happens 1458169689Skan only in assign_parms, since TARGET_SETUP_INCOMING_VARARGS is 1459169689Skan defined), say it is passed in the stack (function_prologue will 1460169689Skan indeed make it pass in the stack if necessary). */ 146190075Sobrien#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 146290075Sobrien arm_function_arg (&(CUM), (MODE), (TYPE), (NAMED)) 146390075Sobrien 1464169689Skan#define FUNCTION_ARG_PADDING(MODE, TYPE) \ 1465169689Skan (arm_pad_arg_upward (MODE, TYPE) ? upward : downward) 146690075Sobrien 1467169689Skan#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ 1468169689Skan (arm_pad_reg_upward (MODE, TYPE, FIRST) ? upward : downward) 1469117395Skan 1470169689Skan/* For AAPCS, padding should never be below the argument. For other ABIs, 1471169689Skan * mimic the default. */ 1472169689Skan#define PAD_VARARGS_DOWN \ 1473169689Skan ((TARGET_AAPCS_BASED) ? 0 : BYTES_BIG_ENDIAN) 1474169689Skan 147590075Sobrien/* Initialize a variable CUM of type CUMULATIVE_ARGS 147690075Sobrien for a call to a function whose data type is FNTYPE. 147790075Sobrien For a library call, FNTYPE is 0. 147890075Sobrien On the ARM, the offset starts at 0. */ 1479132718Skan#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1480132718Skan arm_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL)) 148190075Sobrien 148290075Sobrien/* Update the data in CUM to advance over an argument 148390075Sobrien of mode MODE and data type TYPE. 148490075Sobrien (TYPE is null for libcalls where that information may not be available.) */ 148590075Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1486132718Skan (CUM).nargs += 1; \ 1487169689Skan if (arm_vector_mode_supported_p (MODE) \ 1488169689Skan && (CUM).named_count > (CUM).nargs) \ 1489169689Skan (CUM).iwmmxt_nregs += 1; \ 1490132718Skan else \ 1491169689Skan (CUM).nregs += ARM_NUM_REGS2 (MODE, TYPE) 149290075Sobrien 1493132718Skan/* If defined, a C expression that gives the alignment boundary, in bits, of an 1494132718Skan argument with the specified mode and type. If it is not defined, 1495132718Skan `PARM_BOUNDARY' is used for all arguments. */ 1496132718Skan#define FUNCTION_ARG_BOUNDARY(MODE,TYPE) \ 1497169689Skan ((ARM_DOUBLEWORD_ALIGN && arm_needs_doubleword_align (MODE, TYPE)) \ 1498169689Skan ? DOUBLEWORD_ALIGNMENT \ 1499169689Skan : PARM_BOUNDARY ) 1500132718Skan 150190075Sobrien/* 1 if N is a possible register number for function argument passing. 150290075Sobrien On the ARM, r0-r3 are used to pass args. */ 1503132718Skan#define FUNCTION_ARG_REGNO_P(REGNO) \ 1504132718Skan (IN_RANGE ((REGNO), 0, 3) \ 1505169689Skan || (TARGET_IWMMXT_ABI \ 1506169689Skan && IN_RANGE ((REGNO), FIRST_IWMMXT_REGNUM, FIRST_IWMMXT_REGNUM + 9))) 150790075Sobrien 150890075Sobrien 150990075Sobrien/* If your target environment doesn't prefix user functions with an 151090075Sobrien underscore, you may wish to re-define this to prevent any conflicts. 151190075Sobrien e.g. AOF may prefix mcount with an underscore. */ 151290075Sobrien#ifndef ARM_MCOUNT_NAME 151390075Sobrien#define ARM_MCOUNT_NAME "*mcount" 151490075Sobrien#endif 151590075Sobrien 151690075Sobrien/* Call the function profiler with a given profile label. The Acorn 151790075Sobrien compiler puts this BEFORE the prolog but gcc puts it afterwards. 151890075Sobrien On the ARM the full profile code will look like: 151990075Sobrien .data 152090075Sobrien LP1 152190075Sobrien .word 0 152290075Sobrien .text 152390075Sobrien mov ip, lr 152490075Sobrien bl mcount 152590075Sobrien .word LP1 152690075Sobrien 152790075Sobrien profile_function() in final.c outputs the .data section, FUNCTION_PROFILER 152890075Sobrien will output the .text section. 152990075Sobrien 153090075Sobrien The ``mov ip,lr'' seems like a good idea to stick with cc convention. 1531117395Skan ``prof'' doesn't seem to mind about this! 1532117395Skan 1533117395Skan Note - this version of the code is designed to work in both ARM and 1534117395Skan Thumb modes. */ 153590075Sobrien#ifndef ARM_FUNCTION_PROFILER 153690075Sobrien#define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \ 153790075Sobrien{ \ 153890075Sobrien char temp[20]; \ 153990075Sobrien rtx sym; \ 154090075Sobrien \ 154190075Sobrien asm_fprintf (STREAM, "\tmov\t%r, %r\n\tbl\t", \ 154290075Sobrien IP_REGNUM, LR_REGNUM); \ 154390075Sobrien assemble_name (STREAM, ARM_MCOUNT_NAME); \ 154490075Sobrien fputc ('\n', STREAM); \ 154590075Sobrien ASM_GENERATE_INTERNAL_LABEL (temp, "LP", LABELNO); \ 1546169689Skan sym = gen_rtx_SYMBOL_REF (Pmode, temp); \ 154790075Sobrien assemble_aligned_integer (UNITS_PER_WORD, sym); \ 154890075Sobrien} 154990075Sobrien#endif 155090075Sobrien 1551117395Skan#ifdef THUMB_FUNCTION_PROFILER 155290075Sobrien#define FUNCTION_PROFILER(STREAM, LABELNO) \ 155390075Sobrien if (TARGET_ARM) \ 155490075Sobrien ARM_FUNCTION_PROFILER (STREAM, LABELNO) \ 155590075Sobrien else \ 155690075Sobrien THUMB_FUNCTION_PROFILER (STREAM, LABELNO) 1557117395Skan#else 1558117395Skan#define FUNCTION_PROFILER(STREAM, LABELNO) \ 1559117395Skan ARM_FUNCTION_PROFILER (STREAM, LABELNO) 1560117395Skan#endif 156190075Sobrien 156290075Sobrien/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 156390075Sobrien the stack pointer does not matter. The value is tested only in 156490075Sobrien functions that have frame pointers. 156590075Sobrien No definition is equivalent to always zero. 156690075Sobrien 156790075Sobrien On the ARM, the function epilogue recovers the stack pointer from the 156890075Sobrien frame. */ 156990075Sobrien#define EXIT_IGNORE_STACK 1 157090075Sobrien 157190075Sobrien#define EPILOGUE_USES(REGNO) (reload_completed && (REGNO) == LR_REGNUM) 157290075Sobrien 157390075Sobrien/* Determine if the epilogue should be output as RTL. 157490075Sobrien You should override this if you define FUNCTION_EXTRA_EPILOGUE. */ 157590075Sobrien#define USE_RETURN_INSN(ISCOND) \ 1576132718Skan (TARGET_ARM ? use_return_insn (ISCOND, NULL) : 0) 157790075Sobrien 157890075Sobrien/* Definitions for register eliminations. 157990075Sobrien 158090075Sobrien This is an array of structures. Each structure initializes one pair 158190075Sobrien of eliminable registers. The "from" register number is given first, 158290075Sobrien followed by "to". Eliminations of the same "from" register are listed 158390075Sobrien in order of preference. 158490075Sobrien 158590075Sobrien We have two registers that can be eliminated on the ARM. First, the 158690075Sobrien arg pointer register can often be eliminated in favor of the stack 158790075Sobrien pointer register. Secondly, the pseudo frame pointer register can always 158890075Sobrien be eliminated; it is replaced with either the stack or the real frame 158990075Sobrien pointer. Note we have to use {ARM|THUMB}_HARD_FRAME_POINTER_REGNUM 159090075Sobrien because the definition of HARD_FRAME_POINTER_REGNUM is not a constant. */ 159190075Sobrien 159290075Sobrien#define ELIMINABLE_REGS \ 159390075Sobrien{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\ 159490075Sobrien { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\ 159590075Sobrien { ARG_POINTER_REGNUM, ARM_HARD_FRAME_POINTER_REGNUM },\ 159690075Sobrien { ARG_POINTER_REGNUM, THUMB_HARD_FRAME_POINTER_REGNUM },\ 159790075Sobrien { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },\ 159890075Sobrien { FRAME_POINTER_REGNUM, ARM_HARD_FRAME_POINTER_REGNUM },\ 159990075Sobrien { FRAME_POINTER_REGNUM, THUMB_HARD_FRAME_POINTER_REGNUM }} 160090075Sobrien 160190075Sobrien/* Given FROM and TO register numbers, say whether this elimination is 160290075Sobrien allowed. Frame pointer elimination is automatically handled. 160390075Sobrien 160490075Sobrien All eliminations are permissible. Note that ARG_POINTER_REGNUM and 160590075Sobrien HARD_FRAME_POINTER_REGNUM are in fact the same thing. If we need a frame 160690075Sobrien pointer, we must eliminate FRAME_POINTER_REGNUM into 160790075Sobrien HARD_FRAME_POINTER_REGNUM and not into STACK_POINTER_REGNUM or 160890075Sobrien ARG_POINTER_REGNUM. */ 160990075Sobrien#define CAN_ELIMINATE(FROM, TO) \ 161090075Sobrien (((TO) == FRAME_POINTER_REGNUM && (FROM) == ARG_POINTER_REGNUM) ? 0 : \ 161190075Sobrien ((TO) == STACK_POINTER_REGNUM && frame_pointer_needed) ? 0 : \ 161290075Sobrien ((TO) == ARM_HARD_FRAME_POINTER_REGNUM && TARGET_THUMB) ? 0 : \ 161390075Sobrien ((TO) == THUMB_HARD_FRAME_POINTER_REGNUM && TARGET_ARM) ? 0 : \ 161490075Sobrien 1) 1615117395Skan 161690075Sobrien/* Define the offset between two registers, one to be eliminated, and the 161790075Sobrien other its replacement, at the start of a routine. */ 161890075Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 161990075Sobrien if (TARGET_ARM) \ 1620169689Skan (OFFSET) = arm_compute_initial_elimination_offset (FROM, TO); \ 162190075Sobrien else \ 1622169689Skan (OFFSET) = thumb_compute_initial_elimination_offset (FROM, TO) 1623169689Skan 162490075Sobrien/* Special case handling of the location of arguments passed on the stack. */ 162590075Sobrien#define DEBUGGER_ARG_OFFSET(value, addr) value ? value : arm_debugger_arg_offset (value, addr) 1626169689Skan 162790075Sobrien/* Initialize data used by insn expanders. This is called from insn_emit, 162890075Sobrien once for every function before code is generated. */ 162990075Sobrien#define INIT_EXPANDERS arm_init_expanders () 163090075Sobrien 163190075Sobrien/* Output assembler code for a block containing the constant parts 163290075Sobrien of a trampoline, leaving space for the variable parts. 163390075Sobrien 163490075Sobrien On the ARM, (if r8 is the static chain regnum, and remembering that 163590075Sobrien referencing pc adds an offset of 8) the trampoline looks like: 163690075Sobrien ldr r8, [pc, #0] 163790075Sobrien ldr pc, [pc] 163890075Sobrien .word static chain value 163990075Sobrien .word function's address 1640132718Skan XXX FIXME: When the trampoline returns, r8 will be clobbered. */ 164190075Sobrien#define ARM_TRAMPOLINE_TEMPLATE(FILE) \ 164290075Sobrien{ \ 164390075Sobrien asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n", \ 164490075Sobrien STATIC_CHAIN_REGNUM, PC_REGNUM); \ 164590075Sobrien asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n", \ 164690075Sobrien PC_REGNUM, PC_REGNUM); \ 164790075Sobrien assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \ 164890075Sobrien assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \ 164990075Sobrien} 165090075Sobrien 165190075Sobrien/* On the Thumb we always switch into ARM mode to execute the trampoline. 165290075Sobrien Why - because it is easier. This code will always be branched to via 165390075Sobrien a BX instruction and since the compiler magically generates the address 165490075Sobrien of the function the linker has no opportunity to ensure that the 165590075Sobrien bottom bit is set. Thus the processor will be in ARM mode when it 165690075Sobrien reaches this code. So we duplicate the ARM trampoline code and add 165790075Sobrien a switch into Thumb mode as well. */ 165890075Sobrien#define THUMB_TRAMPOLINE_TEMPLATE(FILE) \ 165990075Sobrien{ \ 166090075Sobrien fprintf (FILE, "\t.code 32\n"); \ 166190075Sobrien fprintf (FILE, ".Ltrampoline_start:\n"); \ 166290075Sobrien asm_fprintf (FILE, "\tldr\t%r, [%r, #8]\n", \ 166390075Sobrien STATIC_CHAIN_REGNUM, PC_REGNUM); \ 166490075Sobrien asm_fprintf (FILE, "\tldr\t%r, [%r, #8]\n", \ 166590075Sobrien IP_REGNUM, PC_REGNUM); \ 166690075Sobrien asm_fprintf (FILE, "\torr\t%r, %r, #1\n", \ 166790075Sobrien IP_REGNUM, IP_REGNUM); \ 166890075Sobrien asm_fprintf (FILE, "\tbx\t%r\n", IP_REGNUM); \ 166990075Sobrien fprintf (FILE, "\t.word\t0\n"); \ 167090075Sobrien fprintf (FILE, "\t.word\t0\n"); \ 167190075Sobrien fprintf (FILE, "\t.code 16\n"); \ 167290075Sobrien} 167390075Sobrien 167490075Sobrien#define TRAMPOLINE_TEMPLATE(FILE) \ 167590075Sobrien if (TARGET_ARM) \ 167690075Sobrien ARM_TRAMPOLINE_TEMPLATE (FILE) \ 167790075Sobrien else \ 167890075Sobrien THUMB_TRAMPOLINE_TEMPLATE (FILE) 1679169689Skan 168090075Sobrien/* Length in units of the trampoline for entering a nested function. */ 168190075Sobrien#define TRAMPOLINE_SIZE (TARGET_ARM ? 16 : 24) 168290075Sobrien 168390075Sobrien/* Alignment required for a trampoline in bits. */ 168490075Sobrien#define TRAMPOLINE_ALIGNMENT 32 168590075Sobrien 1686169689Skan 168790075Sobrien/* Emit RTL insns to initialize the variable parts of a trampoline. 168890075Sobrien FNADDR is an RTX for the address of the function's pure code. 168990075Sobrien CXT is an RTX for the static chain value for the function. */ 1690132718Skan#ifndef INITIALIZE_TRAMPOLINE 1691132718Skan#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1692132718Skan{ \ 1693132718Skan emit_move_insn (gen_rtx_MEM (SImode, \ 1694132718Skan plus_constant (TRAMP, \ 1695132718Skan TARGET_ARM ? 8 : 16)), \ 1696132718Skan CXT); \ 1697132718Skan emit_move_insn (gen_rtx_MEM (SImode, \ 1698132718Skan plus_constant (TRAMP, \ 1699132718Skan TARGET_ARM ? 12 : 20)), \ 1700132718Skan FNADDR); \ 1701169689Skan emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \ 1702169689Skan 0, VOIDmode, 2, TRAMP, Pmode, \ 1703169689Skan plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \ 170490075Sobrien} 1705132718Skan#endif 170690075Sobrien 170790075Sobrien 170890075Sobrien/* Addressing modes, and classification of registers for them. */ 1709132718Skan#define HAVE_POST_INCREMENT 1 1710132718Skan#define HAVE_PRE_INCREMENT TARGET_ARM 1711132718Skan#define HAVE_POST_DECREMENT TARGET_ARM 1712132718Skan#define HAVE_PRE_DECREMENT TARGET_ARM 1713132718Skan#define HAVE_PRE_MODIFY_DISP TARGET_ARM 1714132718Skan#define HAVE_POST_MODIFY_DISP TARGET_ARM 1715132718Skan#define HAVE_PRE_MODIFY_REG TARGET_ARM 1716132718Skan#define HAVE_POST_MODIFY_REG TARGET_ARM 171790075Sobrien 171890075Sobrien/* Macros to check register numbers against specific register classes. */ 171990075Sobrien 172090075Sobrien/* These assume that REGNO is a hard or pseudo reg number. 172190075Sobrien They give nonzero only if REGNO is a hard reg of the suitable class 172290075Sobrien or a pseudo reg currently allocated to a suitable hard reg. 172390075Sobrien Since they use reg_renumber, they are safe only once reg_renumber 1724132718Skan has been allocated, which happens in local-alloc.c. */ 172590075Sobrien#define TEST_REGNO(R, TEST, VALUE) \ 172690075Sobrien ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE)) 172790075Sobrien 172890075Sobrien/* On the ARM, don't allow the pc to be used. */ 172990075Sobrien#define ARM_REGNO_OK_FOR_BASE_P(REGNO) \ 173090075Sobrien (TEST_REGNO (REGNO, <, PC_REGNUM) \ 173190075Sobrien || TEST_REGNO (REGNO, ==, FRAME_POINTER_REGNUM) \ 173290075Sobrien || TEST_REGNO (REGNO, ==, ARG_POINTER_REGNUM)) 173390075Sobrien 173490075Sobrien#define THUMB_REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \ 173590075Sobrien (TEST_REGNO (REGNO, <=, LAST_LO_REGNUM) \ 173690075Sobrien || (GET_MODE_SIZE (MODE) >= 4 \ 173790075Sobrien && TEST_REGNO (REGNO, ==, STACK_POINTER_REGNUM))) 173890075Sobrien 173990075Sobrien#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \ 174090075Sobrien (TARGET_THUMB \ 174190075Sobrien ? THUMB_REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE) \ 174290075Sobrien : ARM_REGNO_OK_FOR_BASE_P (REGNO)) 174390075Sobrien 1744169689Skan/* Nonzero if X can be the base register in a reg+reg addressing mode. 1745169689Skan For Thumb, we can not use SP + reg, so reject SP. */ 1746169689Skan#define REGNO_MODE_OK_FOR_REG_BASE_P(X, MODE) \ 1747169689Skan REGNO_OK_FOR_INDEX_P (X) 1748169689Skan 174990075Sobrien/* For ARM code, we don't care about the mode, but for Thumb, the index 175090075Sobrien must be suitable for use in a QImode load. */ 175190075Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 175290075Sobrien REGNO_MODE_OK_FOR_BASE_P (REGNO, QImode) 175390075Sobrien 175490075Sobrien/* Maximum number of registers that can appear in a valid memory address. 1755132718Skan Shifts in addresses can't be by a register. */ 175690075Sobrien#define MAX_REGS_PER_ADDRESS 2 175790075Sobrien 175890075Sobrien/* Recognize any constant value that is a valid address. */ 175990075Sobrien/* XXX We can address any constant, eventually... */ 176090075Sobrien 176190075Sobrien#ifdef AOF_ASSEMBLER 176290075Sobrien 176390075Sobrien#define CONSTANT_ADDRESS_P(X) \ 176490075Sobrien (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)) 176590075Sobrien 176690075Sobrien#else 176790075Sobrien 176890075Sobrien#define CONSTANT_ADDRESS_P(X) \ 176990075Sobrien (GET_CODE (X) == SYMBOL_REF \ 177090075Sobrien && (CONSTANT_POOL_ADDRESS_P (X) \ 177190075Sobrien || (TARGET_ARM && optimize > 0 && SYMBOL_REF_FLAG (X)))) 177290075Sobrien 177390075Sobrien#endif /* AOF_ASSEMBLER */ 177490075Sobrien 177590075Sobrien/* Nonzero if the constant value X is a legitimate general operand. 177690075Sobrien It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. 177790075Sobrien 177890075Sobrien On the ARM, allow any integer (invalid ones are removed later by insn 177990075Sobrien patterns), nice doubles and symbol_refs which refer to the function's 178090075Sobrien constant pool XXX. 1781169689Skan 178290075Sobrien When generating pic allow anything. */ 178390075Sobrien#define ARM_LEGITIMATE_CONSTANT_P(X) (flag_pic || ! label_mentioned_p (X)) 178490075Sobrien 178590075Sobrien#define THUMB_LEGITIMATE_CONSTANT_P(X) \ 178690075Sobrien ( GET_CODE (X) == CONST_INT \ 178790075Sobrien || GET_CODE (X) == CONST_DOUBLE \ 178896263Sobrien || CONSTANT_ADDRESS_P (X) \ 178996263Sobrien || flag_pic) 179090075Sobrien 1791169689Skan#define LEGITIMATE_CONSTANT_P(X) \ 1792169689Skan (!arm_tls_referenced_p (X) \ 1793169689Skan && (TARGET_ARM ? ARM_LEGITIMATE_CONSTANT_P (X) \ 1794169689Skan : THUMB_LEGITIMATE_CONSTANT_P (X))) 179590075Sobrien 179690075Sobrien/* Special characters prefixed to function names 179790075Sobrien in order to encode attribute like information. 179890075Sobrien Note, '@' and '*' have already been taken. */ 179990075Sobrien#define SHORT_CALL_FLAG_CHAR '^' 180090075Sobrien#define LONG_CALL_FLAG_CHAR '#' 180190075Sobrien 180290075Sobrien#define ENCODED_SHORT_CALL_ATTR_P(SYMBOL_NAME) \ 180390075Sobrien (*(SYMBOL_NAME) == SHORT_CALL_FLAG_CHAR) 180490075Sobrien 180590075Sobrien#define ENCODED_LONG_CALL_ATTR_P(SYMBOL_NAME) \ 180690075Sobrien (*(SYMBOL_NAME) == LONG_CALL_FLAG_CHAR) 180790075Sobrien 180890075Sobrien#ifndef SUBTARGET_NAME_ENCODING_LENGTHS 180990075Sobrien#define SUBTARGET_NAME_ENCODING_LENGTHS 181090075Sobrien#endif 181190075Sobrien 1812132718Skan/* This is a C fragment for the inside of a switch statement. 181390075Sobrien Each case label should return the number of characters to 181490075Sobrien be stripped from the start of a function's name, if that 181590075Sobrien name starts with the indicated character. */ 181690075Sobrien#define ARM_NAME_ENCODING_LENGTHS \ 181790075Sobrien case SHORT_CALL_FLAG_CHAR: return 1; \ 181890075Sobrien case LONG_CALL_FLAG_CHAR: return 1; \ 181990075Sobrien case '*': return 1; \ 1820169689Skan SUBTARGET_NAME_ENCODING_LENGTHS 182190075Sobrien 182290075Sobrien/* This is how to output a reference to a user-level label named NAME. 182390075Sobrien `assemble_name' uses this. */ 182490075Sobrien#undef ASM_OUTPUT_LABELREF 182590075Sobrien#define ASM_OUTPUT_LABELREF(FILE, NAME) \ 1826117395Skan arm_asm_output_labelref (FILE, NAME) 182790075Sobrien 1828169689Skan/* The EABI specifies that constructors should go in .init_array. 1829169689Skan Other targets use .ctors for compatibility. */ 1830169689Skan#ifndef ARM_EABI_CTORS_SECTION_OP 1831169689Skan#define ARM_EABI_CTORS_SECTION_OP \ 1832169689Skan "\t.section\t.init_array,\"aw\",%init_array" 1833169689Skan#endif 1834169689Skan#ifndef ARM_EABI_DTORS_SECTION_OP 1835169689Skan#define ARM_EABI_DTORS_SECTION_OP \ 1836169689Skan "\t.section\t.fini_array,\"aw\",%fini_array" 1837169689Skan#endif 1838169689Skan#define ARM_CTORS_SECTION_OP \ 1839169689Skan "\t.section\t.ctors,\"aw\",%progbits" 1840169689Skan#define ARM_DTORS_SECTION_OP \ 1841169689Skan "\t.section\t.dtors,\"aw\",%progbits" 1842169689Skan 1843169689Skan/* Define CTORS_SECTION_ASM_OP. */ 1844169689Skan#undef CTORS_SECTION_ASM_OP 1845169689Skan#undef DTORS_SECTION_ASM_OP 1846169689Skan#ifndef IN_LIBGCC2 1847169689Skan# define CTORS_SECTION_ASM_OP \ 1848169689Skan (TARGET_AAPCS_BASED ? ARM_EABI_CTORS_SECTION_OP : ARM_CTORS_SECTION_OP) 1849169689Skan# define DTORS_SECTION_ASM_OP \ 1850169689Skan (TARGET_AAPCS_BASED ? ARM_EABI_DTORS_SECTION_OP : ARM_DTORS_SECTION_OP) 1851169689Skan#else /* !defined (IN_LIBGCC2) */ 1852169689Skan/* In libgcc, CTORS_SECTION_ASM_OP must be a compile-time constant, 1853169689Skan so we cannot use the definition above. */ 1854169689Skan# ifdef __ARM_EABI__ 1855169689Skan/* The .ctors section is not part of the EABI, so we do not define 1856169689Skan CTORS_SECTION_ASM_OP when in libgcc; that prevents crtstuff 1857169689Skan from trying to use it. We do define it when doing normal 1858169689Skan compilation, as .init_array can be used instead of .ctors. */ 1859169689Skan/* There is no need to emit begin or end markers when using 1860169689Skan init_array; the dynamic linker will compute the size of the 1861169689Skan array itself based on special symbols created by the static 1862169689Skan linker. However, we do need to arrange to set up 1863169689Skan exception-handling here. */ 1864169689Skan# define CTOR_LIST_BEGIN asm (ARM_EABI_CTORS_SECTION_OP) 1865169689Skan# define CTOR_LIST_END /* empty */ 1866169689Skan# define DTOR_LIST_BEGIN asm (ARM_EABI_DTORS_SECTION_OP) 1867169689Skan# define DTOR_LIST_END /* empty */ 1868169689Skan# else /* !defined (__ARM_EABI__) */ 1869244276Sandrew# ifndef __clang__ 1870169689Skan# define CTORS_SECTION_ASM_OP ARM_CTORS_SECTION_OP 1871169689Skan# define DTORS_SECTION_ASM_OP ARM_DTORS_SECTION_OP 1872244276Sandrew# endif 1873169689Skan# endif /* !defined (__ARM_EABI__) */ 1874169689Skan#endif /* !defined (IN_LIBCC2) */ 1875169689Skan 1876169689Skan/* True if the operating system can merge entities with vague linkage 1877169689Skan (e.g., symbols in COMDAT group) during dynamic linking. */ 1878169689Skan#ifndef TARGET_ARM_DYNAMIC_VAGUE_LINKAGE_P 1879169689Skan#define TARGET_ARM_DYNAMIC_VAGUE_LINKAGE_P true 1880169689Skan#endif 1881169689Skan 1882169689Skan/* Set the short-call flag for any function compiled in the current 1883169689Skan compilation unit. We skip this for functions with the section 1884169689Skan attribute when long-calls are in effect as this tells the compiler 1885169689Skan that the section might be placed a long way from the caller. 1886169689Skan See arm_is_longcall_p() for more information. */ 188790075Sobrien#define ARM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \ 1888169689Skan if (!TARGET_LONG_CALLS || ! DECL_SECTION_NAME (DECL)) \ 1889169689Skan arm_encode_call_attribute (DECL, SHORT_CALL_FLAG_CHAR) 189090075Sobrien 1891169689Skan#define ARM_OUTPUT_FN_UNWIND(F, PROLOGUE) arm_output_fn_unwind (F, PROLOGUE) 1892169689Skan 1893169689Skan#ifdef TARGET_UNWIND_INFO 1894169689Skan#define ARM_EABI_UNWIND_TABLES \ 1895169689Skan ((!USING_SJLJ_EXCEPTIONS && flag_exceptions) || flag_unwind_tables) 1896169689Skan#else 1897169689Skan#define ARM_EABI_UNWIND_TABLES 0 1898169689Skan#endif 1899169689Skan 190090075Sobrien/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 190190075Sobrien and check its validity for a certain class. 190290075Sobrien We have two alternate definitions for each of them. 190390075Sobrien The usual definition accepts all pseudo regs; the other rejects 190490075Sobrien them unless they have been allocated suitable hard regs. 190590075Sobrien The symbol REG_OK_STRICT causes the latter definition to be used. */ 190690075Sobrien#ifndef REG_OK_STRICT 190790075Sobrien 190890075Sobrien#define ARM_REG_OK_FOR_BASE_P(X) \ 190990075Sobrien (REGNO (X) <= LAST_ARM_REGNUM \ 191090075Sobrien || REGNO (X) >= FIRST_PSEUDO_REGISTER \ 191190075Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 191290075Sobrien || REGNO (X) == ARG_POINTER_REGNUM) 191390075Sobrien 191490075Sobrien#define THUMB_REG_MODE_OK_FOR_BASE_P(X, MODE) \ 191590075Sobrien (REGNO (X) <= LAST_LO_REGNUM \ 191690075Sobrien || REGNO (X) >= FIRST_PSEUDO_REGISTER \ 191790075Sobrien || (GET_MODE_SIZE (MODE) >= 4 \ 191890075Sobrien && (REGNO (X) == STACK_POINTER_REGNUM \ 191990075Sobrien || (X) == hard_frame_pointer_rtx \ 192090075Sobrien || (X) == arg_pointer_rtx))) 192190075Sobrien 1922132718Skan#define REG_STRICT_P 0 1923132718Skan 192490075Sobrien#else /* REG_OK_STRICT */ 192590075Sobrien 192690075Sobrien#define ARM_REG_OK_FOR_BASE_P(X) \ 192790075Sobrien ARM_REGNO_OK_FOR_BASE_P (REGNO (X)) 192890075Sobrien 192990075Sobrien#define THUMB_REG_MODE_OK_FOR_BASE_P(X, MODE) \ 193090075Sobrien THUMB_REGNO_MODE_OK_FOR_BASE_P (REGNO (X), MODE) 193190075Sobrien 1932132718Skan#define REG_STRICT_P 1 1933132718Skan 193490075Sobrien#endif /* REG_OK_STRICT */ 193590075Sobrien 193690075Sobrien/* Now define some helpers in terms of the above. */ 193790075Sobrien 193890075Sobrien#define REG_MODE_OK_FOR_BASE_P(X, MODE) \ 193990075Sobrien (TARGET_THUMB \ 194090075Sobrien ? THUMB_REG_MODE_OK_FOR_BASE_P (X, MODE) \ 194190075Sobrien : ARM_REG_OK_FOR_BASE_P (X)) 194290075Sobrien 194390075Sobrien#define ARM_REG_OK_FOR_INDEX_P(X) ARM_REG_OK_FOR_BASE_P (X) 194490075Sobrien 194590075Sobrien/* For Thumb, a valid index register is anything that can be used in 194690075Sobrien a byte load instruction. */ 194790075Sobrien#define THUMB_REG_OK_FOR_INDEX_P(X) THUMB_REG_MODE_OK_FOR_BASE_P (X, QImode) 194890075Sobrien 194990075Sobrien/* Nonzero if X is a hard reg that can be used as an index 195090075Sobrien or if it is a pseudo reg. On the Thumb, the stack pointer 195190075Sobrien is not suitable. */ 195290075Sobrien#define REG_OK_FOR_INDEX_P(X) \ 195390075Sobrien (TARGET_THUMB \ 195490075Sobrien ? THUMB_REG_OK_FOR_INDEX_P (X) \ 195590075Sobrien : ARM_REG_OK_FOR_INDEX_P (X)) 195690075Sobrien 1957169689Skan/* Nonzero if X can be the base register in a reg+reg addressing mode. 1958169689Skan For Thumb, we can not use SP + reg, so reject SP. */ 1959169689Skan#define REG_MODE_OK_FOR_REG_BASE_P(X, MODE) \ 1960169689Skan REG_OK_FOR_INDEX_P (X) 196190075Sobrien 196290075Sobrien/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 196390075Sobrien that is a valid memory address for an instruction. 196490075Sobrien The MODE argument is the machine mode for the MEM expression 1965132718Skan that wants to use this address. */ 1966169689Skan 196790075Sobrien#define ARM_BASE_REGISTER_RTX_P(X) \ 196890075Sobrien (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X)) 196990075Sobrien 197090075Sobrien#define ARM_INDEX_REGISTER_RTX_P(X) \ 197190075Sobrien (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X)) 197290075Sobrien 1973132718Skan#define ARM_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \ 1974132718Skan { \ 1975169689Skan if (arm_legitimate_address_p (MODE, X, SET, REG_STRICT_P)) \ 1976132718Skan goto WIN; \ 1977132718Skan } 197890075Sobrien 1979132718Skan#define THUMB_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \ 1980132718Skan { \ 1981132718Skan if (thumb_legitimate_address_p (MODE, X, REG_STRICT_P)) \ 1982132718Skan goto WIN; \ 1983132718Skan } 198490075Sobrien 198590075Sobrien#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ 198690075Sobrien if (TARGET_ARM) \ 198790075Sobrien ARM_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN) \ 198890075Sobrien else /* if (TARGET_THUMB) */ \ 1989169689Skan THUMB_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN) 1990132718Skan 199190075Sobrien 199290075Sobrien/* Try machine-dependent ways of modifying an illegitimate address 1993132718Skan to be legitimate. If we find one, return the new, valid address. */ 1994132718Skan#define ARM_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 1995132718Skando { \ 1996132718Skan X = arm_legitimize_address (X, OLDX, MODE); \ 1997132718Skan} while (0) 199890075Sobrien 1999169689Skan#define THUMB_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 2000169689Skando { \ 2001169689Skan X = thumb_legitimize_address (X, OLDX, MODE); \ 2002132718Skan} while (0) 200390075Sobrien 2004132718Skan#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 2005132718Skando { \ 2006132718Skan if (TARGET_ARM) \ 2007132718Skan ARM_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN); \ 2008132718Skan else \ 2009132718Skan THUMB_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN); \ 2010169689Skan \ 2011169689Skan if (memory_address_p (MODE, X)) \ 2012169689Skan goto WIN; \ 2013132718Skan} while (0) 2014169689Skan 201590075Sobrien/* Go to LABEL if ADDR (a legitimate address expression) 201690075Sobrien has an effect that depends on the machine mode it is used for. */ 201790075Sobrien#define ARM_GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 201890075Sobrien{ \ 201990075Sobrien if ( GET_CODE (ADDR) == PRE_DEC || GET_CODE (ADDR) == POST_DEC \ 202090075Sobrien || GET_CODE (ADDR) == PRE_INC || GET_CODE (ADDR) == POST_INC) \ 202190075Sobrien goto LABEL; \ 202290075Sobrien} 202390075Sobrien 202490075Sobrien/* Nothing helpful to do for the Thumb */ 202590075Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 202690075Sobrien if (TARGET_ARM) \ 2027169689Skan ARM_GO_IF_MODE_DEPENDENT_ADDRESS (ADDR, LABEL) 202890075Sobrien 202990075Sobrien 203090075Sobrien/* Specify the machine mode that this machine uses 203190075Sobrien for the index in the tablejump instruction. */ 203290075Sobrien#define CASE_VECTOR_MODE Pmode 203390075Sobrien 203490075Sobrien/* signed 'char' is most compatible, but RISC OS wants it unsigned. 203590075Sobrien unsigned is probably best, but may break some code. */ 203690075Sobrien#ifndef DEFAULT_SIGNED_CHAR 203790075Sobrien#define DEFAULT_SIGNED_CHAR 0 203890075Sobrien#endif 203990075Sobrien 204090075Sobrien/* Max number of bytes we can move from memory to memory 204190075Sobrien in one reasonably fast instruction. */ 204290075Sobrien#define MOVE_MAX 4 204390075Sobrien 204490075Sobrien#undef MOVE_RATIO 2045132718Skan#define MOVE_RATIO (arm_tune_xscale ? 4 : 2) 204690075Sobrien 204790075Sobrien/* Define if operations between registers always perform the operation 204890075Sobrien on the full register even if a narrower mode is specified. */ 204990075Sobrien#define WORD_REGISTER_OPERATIONS 205090075Sobrien 205190075Sobrien/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 205290075Sobrien will either zero-extend or sign-extend. The value of this macro should 205390075Sobrien be the code that says which one of the two operations is implicitly 2054169689Skan done, UNKNOWN if none. */ 205590075Sobrien#define LOAD_EXTEND_OP(MODE) \ 205690075Sobrien (TARGET_THUMB ? ZERO_EXTEND : \ 205790075Sobrien ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND \ 2058169689Skan : ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : UNKNOWN))) 205990075Sobrien 206090075Sobrien/* Nonzero if access to memory by bytes is slow and undesirable. */ 206190075Sobrien#define SLOW_BYTE_ACCESS 0 206290075Sobrien 206390075Sobrien#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1 2064169689Skan 206590075Sobrien/* Immediate shift counts are truncated by the output routines (or was it 206690075Sobrien the assembler?). Shift counts in a register are truncated by ARM. Note 206790075Sobrien that the native compiler puts too large (> 32) immediate shift counts 206890075Sobrien into a register and shifts by the register, letting the ARM decide what 206990075Sobrien to do instead of doing that itself. */ 207090075Sobrien/* This is all wrong. Defining SHIFT_COUNT_TRUNCATED tells combine that 207190075Sobrien code like (X << (Y % 32)) for register X, Y is equivalent to (X << Y). 207290075Sobrien On the arm, Y in a register is used modulo 256 for the shift. Only for 2073132718Skan rotates is modulo 32 used. */ 207490075Sobrien/* #define SHIFT_COUNT_TRUNCATED 1 */ 207590075Sobrien 207690075Sobrien/* All integers have the same format so truncation is easy. */ 207790075Sobrien#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 207890075Sobrien 207990075Sobrien/* Calling from registers is a massive pain. */ 208090075Sobrien#define NO_FUNCTION_CSE 1 208190075Sobrien 208290075Sobrien/* The machine modes of pointers and functions */ 208390075Sobrien#define Pmode SImode 208490075Sobrien#define FUNCTION_MODE Pmode 208590075Sobrien 208690075Sobrien#define ARM_FRAME_RTX(X) \ 208790075Sobrien ( (X) == frame_pointer_rtx || (X) == stack_pointer_rtx \ 208890075Sobrien || (X) == arg_pointer_rtx) 208990075Sobrien 209090075Sobrien/* Moves to and from memory are quite expensive */ 209190075Sobrien#define MEMORY_MOVE_COST(M, CLASS, IN) \ 209290075Sobrien (TARGET_ARM ? 10 : \ 209390075Sobrien ((GET_MODE_SIZE (M) < 4 ? 8 : 2 * GET_MODE_SIZE (M)) \ 209490075Sobrien * (CLASS == LO_REGS ? 1 : 2))) 2095169689Skan 209690075Sobrien/* Try to generate sequences that don't involve branches, we can then use 209790075Sobrien conditional instructions */ 209890075Sobrien#define BRANCH_COST \ 209990075Sobrien (TARGET_ARM ? 4 : (optimize > 1 ? 1 : 0)) 210090075Sobrien 210190075Sobrien/* Position Independent Code. */ 210290075Sobrien/* We decide which register to use based on the compilation options and 210390075Sobrien the assembler in use; this is more general than the APCS restriction of 210490075Sobrien using sb (r9) all the time. */ 2105169689Skanextern unsigned arm_pic_register; 210690075Sobrien 210790075Sobrien/* The register number of the register used to address a table of static 210890075Sobrien data addresses in memory. */ 210990075Sobrien#define PIC_OFFSET_TABLE_REGNUM arm_pic_register 211090075Sobrien 211190075Sobrien/* We can't directly access anything that contains a symbol, 2112169689Skan nor can we indirect via the constant pool. One exception is 2113169689Skan UNSPEC_TLS, which is always PIC. */ 211490075Sobrien#define LEGITIMATE_PIC_OPERAND_P(X) \ 2115117395Skan (!(symbol_mentioned_p (X) \ 2116117395Skan || label_mentioned_p (X) \ 2117117395Skan || (GET_CODE (X) == SYMBOL_REF \ 2118117395Skan && CONSTANT_POOL_ADDRESS_P (X) \ 2119117395Skan && (symbol_mentioned_p (get_pool_constant (X)) \ 2120169689Skan || label_mentioned_p (get_pool_constant (X))))) \ 2121169689Skan || tls_mentioned_p (X)) 2122117395Skan 212390075Sobrien/* We need to know when we are making a constant pool; this determines 212490075Sobrien whether data needs to be in the GOT or can be referenced via a GOT 212590075Sobrien offset. */ 212690075Sobrienextern int making_const_table; 212790075Sobrien 212890075Sobrien/* Handle pragmas for compatibility with Intel's compilers. */ 2129132718Skan#define REGISTER_TARGET_PRAGMAS() do { \ 2130132718Skan c_register_pragma (0, "long_calls", arm_pr_long_calls); \ 2131132718Skan c_register_pragma (0, "no_long_calls", arm_pr_no_long_calls); \ 2132132718Skan c_register_pragma (0, "long_calls_off", arm_pr_long_calls_off); \ 213390075Sobrien} while (0) 213490075Sobrien 2135132718Skan/* Condition code information. */ 213690075Sobrien/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 2137117395Skan return the mode to be used for the comparison. */ 213890075Sobrien 213990075Sobrien#define SELECT_CC_MODE(OP, X, Y) arm_select_cc_mode (OP, X, Y) 214090075Sobrien 2141169689Skan#define REVERSIBLE_CC_MODE(MODE) 1 214290075Sobrien 2143169689Skan#define REVERSE_CONDITION(CODE,MODE) \ 2144169689Skan (((MODE) == CCFPmode || (MODE) == CCFPEmode) \ 2145169689Skan ? reverse_condition_maybe_unordered (code) \ 2146169689Skan : reverse_condition (code)) 2147169689Skan 214890075Sobrien#define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \ 214990075Sobrien do \ 215090075Sobrien { \ 215190075Sobrien if (GET_CODE (OP1) == CONST_INT \ 215290075Sobrien && ! (const_ok_for_arm (INTVAL (OP1)) \ 215390075Sobrien || (const_ok_for_arm (- INTVAL (OP1))))) \ 215490075Sobrien { \ 215590075Sobrien rtx const_op = OP1; \ 2156169689Skan CODE = arm_canonicalize_comparison ((CODE), GET_MODE (OP0), \ 2157169689Skan &const_op); \ 215890075Sobrien OP1 = const_op; \ 215990075Sobrien } \ 216090075Sobrien } \ 216190075Sobrien while (0) 216290075Sobrien 2163132718Skan/* The arm5 clz instruction returns 32. */ 2164132718Skan#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1) 216590075Sobrien 216690075Sobrien#undef ASM_APP_OFF 216790075Sobrien#define ASM_APP_OFF (TARGET_THUMB ? "\t.code\t16\n" : "") 216890075Sobrien 216990075Sobrien/* Output a push or a pop instruction (only used when profiling). */ 217090075Sobrien#define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ 2171132718Skan do \ 2172132718Skan { \ 2173132718Skan if (TARGET_ARM) \ 2174132718Skan asm_fprintf (STREAM,"\tstmfd\t%r!,{%r}\n", \ 2175132718Skan STACK_POINTER_REGNUM, REGNO); \ 2176132718Skan else \ 2177132718Skan asm_fprintf (STREAM, "\tpush {%r}\n", REGNO); \ 2178132718Skan } while (0) 217990075Sobrien 218090075Sobrien 218190075Sobrien#define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ 2182132718Skan do \ 2183132718Skan { \ 2184132718Skan if (TARGET_ARM) \ 2185132718Skan asm_fprintf (STREAM, "\tldmfd\t%r!,{%r}\n", \ 2186132718Skan STACK_POINTER_REGNUM, REGNO); \ 2187132718Skan else \ 2188132718Skan asm_fprintf (STREAM, "\tpop {%r}\n", REGNO); \ 2189132718Skan } while (0) 219090075Sobrien 219190075Sobrien/* This is how to output a label which precedes a jumptable. Since 219290075Sobrien Thumb instructions are 2 bytes, we may need explicit alignment here. */ 219390075Sobrien#undef ASM_OUTPUT_CASE_LABEL 219490075Sobrien#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \ 219590075Sobrien do \ 219690075Sobrien { \ 219790075Sobrien if (TARGET_THUMB) \ 219890075Sobrien ASM_OUTPUT_ALIGN (FILE, 2); \ 2199132718Skan (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ 220090075Sobrien } \ 220190075Sobrien while (0) 220290075Sobrien 220390075Sobrien#define ARM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \ 220490075Sobrien do \ 220590075Sobrien { \ 220690075Sobrien if (TARGET_THUMB) \ 220790075Sobrien { \ 2208132718Skan if (is_called_in_ARM_mode (DECL) \ 2209132718Skan || current_function_is_thunk) \ 221090075Sobrien fprintf (STREAM, "\t.code 32\n") ; \ 221190075Sobrien else \ 2212132718Skan fprintf (STREAM, "\t.code 16\n\t.thumb_func\n") ; \ 221390075Sobrien } \ 221490075Sobrien if (TARGET_POKE_FUNCTION_NAME) \ 221590075Sobrien arm_poke_function_name (STREAM, (char *) NAME); \ 221690075Sobrien } \ 221790075Sobrien while (0) 221890075Sobrien 221990075Sobrien/* For aliases of functions we use .thumb_set instead. */ 222090075Sobrien#define ASM_OUTPUT_DEF_FROM_DECLS(FILE, DECL1, DECL2) \ 222190075Sobrien do \ 222290075Sobrien { \ 222390075Sobrien const char *const LABEL1 = XSTR (XEXP (DECL_RTL (decl), 0), 0); \ 222490075Sobrien const char *const LABEL2 = IDENTIFIER_POINTER (DECL2); \ 222590075Sobrien \ 222690075Sobrien if (TARGET_THUMB && TREE_CODE (DECL1) == FUNCTION_DECL) \ 222790075Sobrien { \ 222890075Sobrien fprintf (FILE, "\t.thumb_set "); \ 222990075Sobrien assemble_name (FILE, LABEL1); \ 223090075Sobrien fprintf (FILE, ","); \ 223190075Sobrien assemble_name (FILE, LABEL2); \ 223290075Sobrien fprintf (FILE, "\n"); \ 223390075Sobrien } \ 223490075Sobrien else \ 223590075Sobrien ASM_OUTPUT_DEF (FILE, LABEL1, LABEL2); \ 223690075Sobrien } \ 223790075Sobrien while (0) 223890075Sobrien 223990075Sobrien#ifdef HAVE_GAS_MAX_SKIP_P2ALIGN 224090075Sobrien/* To support -falign-* switches we need to use .p2align so 224190075Sobrien that alignment directives in code sections will be padded 224290075Sobrien with no-op instructions, rather than zeroes. */ 2243132718Skan#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE, LOG, MAX_SKIP) \ 224490075Sobrien if ((LOG) != 0) \ 224590075Sobrien { \ 224690075Sobrien if ((MAX_SKIP) == 0) \ 2247132718Skan fprintf ((FILE), "\t.p2align %d\n", (int) (LOG)); \ 224890075Sobrien else \ 224990075Sobrien fprintf ((FILE), "\t.p2align %d,,%d\n", \ 2250132718Skan (int) (LOG), (int) (MAX_SKIP)); \ 225190075Sobrien } 225290075Sobrien#endif 225390075Sobrien 225490075Sobrien/* Only perform branch elimination (by making instructions conditional) if 2255132718Skan we're optimizing. Otherwise it's of no use anyway. */ 225690075Sobrien#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ 225790075Sobrien if (TARGET_ARM && optimize) \ 225890075Sobrien arm_final_prescan_insn (INSN); \ 225990075Sobrien else if (TARGET_THUMB) \ 226090075Sobrien thumb_final_prescan_insn (INSN) 226190075Sobrien 226290075Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 226390075Sobrien (CODE == '@' || CODE == '|' \ 226490075Sobrien || (TARGET_ARM && (CODE == '?')) \ 226590075Sobrien || (TARGET_THUMB && (CODE == '_'))) 226690075Sobrien 226790075Sobrien/* Output an operand of an instruction. */ 226890075Sobrien#define PRINT_OPERAND(STREAM, X, CODE) \ 226990075Sobrien arm_print_operand (STREAM, X, CODE) 227090075Sobrien 227190075Sobrien#define ARM_SIGN_EXTEND(x) ((HOST_WIDE_INT) \ 227290075Sobrien (HOST_BITS_PER_WIDE_INT <= 32 ? (unsigned HOST_WIDE_INT) (x) \ 227390075Sobrien : ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0xffffffff) |\ 227490075Sobrien ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0x80000000) \ 227590075Sobrien ? ((~ (unsigned HOST_WIDE_INT) 0) \ 227690075Sobrien & ~ (unsigned HOST_WIDE_INT) 0xffffffff) \ 227790075Sobrien : 0)))) 227890075Sobrien 227990075Sobrien/* Output the address of an operand. */ 2280132718Skan#define ARM_PRINT_OPERAND_ADDRESS(STREAM, X) \ 2281132718Skan{ \ 2282132718Skan int is_minus = GET_CODE (X) == MINUS; \ 2283132718Skan \ 2284132718Skan if (GET_CODE (X) == REG) \ 2285132718Skan asm_fprintf (STREAM, "[%r, #0]", REGNO (X)); \ 2286132718Skan else if (GET_CODE (X) == PLUS || is_minus) \ 2287132718Skan { \ 2288132718Skan rtx base = XEXP (X, 0); \ 2289132718Skan rtx index = XEXP (X, 1); \ 2290132718Skan HOST_WIDE_INT offset = 0; \ 2291132718Skan if (GET_CODE (base) != REG) \ 2292132718Skan { \ 2293132718Skan /* Ensure that BASE is a register. */ \ 2294132718Skan /* (one of them must be). */ \ 2295132718Skan rtx temp = base; \ 2296132718Skan base = index; \ 2297132718Skan index = temp; \ 2298132718Skan } \ 2299132718Skan switch (GET_CODE (index)) \ 2300132718Skan { \ 2301132718Skan case CONST_INT: \ 2302132718Skan offset = INTVAL (index); \ 2303132718Skan if (is_minus) \ 2304132718Skan offset = -offset; \ 2305132718Skan asm_fprintf (STREAM, "[%r, #%wd]", \ 2306132718Skan REGNO (base), offset); \ 2307132718Skan break; \ 2308132718Skan \ 2309132718Skan case REG: \ 2310132718Skan asm_fprintf (STREAM, "[%r, %s%r]", \ 2311132718Skan REGNO (base), is_minus ? "-" : "", \ 2312132718Skan REGNO (index)); \ 2313132718Skan break; \ 2314132718Skan \ 2315132718Skan case MULT: \ 2316132718Skan case ASHIFTRT: \ 2317132718Skan case LSHIFTRT: \ 2318132718Skan case ASHIFT: \ 2319132718Skan case ROTATERT: \ 2320132718Skan { \ 2321132718Skan asm_fprintf (STREAM, "[%r, %s%r", \ 2322132718Skan REGNO (base), is_minus ? "-" : "", \ 2323132718Skan REGNO (XEXP (index, 0))); \ 2324132718Skan arm_print_operand (STREAM, index, 'S'); \ 2325132718Skan fputs ("]", STREAM); \ 2326132718Skan break; \ 2327132718Skan } \ 2328132718Skan \ 2329132718Skan default: \ 2330169689Skan gcc_unreachable (); \ 2331132718Skan } \ 2332132718Skan } \ 2333132718Skan else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC \ 2334132718Skan || GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC) \ 2335132718Skan { \ 2336132718Skan extern enum machine_mode output_memory_reference_mode; \ 2337132718Skan \ 2338169689Skan gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \ 2339132718Skan \ 2340132718Skan if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \ 2341132718Skan asm_fprintf (STREAM, "[%r, #%s%d]!", \ 2342132718Skan REGNO (XEXP (X, 0)), \ 2343132718Skan GET_CODE (X) == PRE_DEC ? "-" : "", \ 2344132718Skan GET_MODE_SIZE (output_memory_reference_mode)); \ 2345132718Skan else \ 2346132718Skan asm_fprintf (STREAM, "[%r], #%s%d", \ 2347132718Skan REGNO (XEXP (X, 0)), \ 2348132718Skan GET_CODE (X) == POST_DEC ? "-" : "", \ 2349132718Skan GET_MODE_SIZE (output_memory_reference_mode)); \ 2350132718Skan } \ 2351132718Skan else if (GET_CODE (X) == PRE_MODIFY) \ 2352132718Skan { \ 2353132718Skan asm_fprintf (STREAM, "[%r, ", REGNO (XEXP (X, 0))); \ 2354132718Skan if (GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT) \ 2355132718Skan asm_fprintf (STREAM, "#%wd]!", \ 2356132718Skan INTVAL (XEXP (XEXP (X, 1), 1))); \ 2357132718Skan else \ 2358132718Skan asm_fprintf (STREAM, "%r]!", \ 2359132718Skan REGNO (XEXP (XEXP (X, 1), 1))); \ 2360132718Skan } \ 2361132718Skan else if (GET_CODE (X) == POST_MODIFY) \ 2362132718Skan { \ 2363132718Skan asm_fprintf (STREAM, "[%r], ", REGNO (XEXP (X, 0))); \ 2364132718Skan if (GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT) \ 2365132718Skan asm_fprintf (STREAM, "#%wd", \ 2366132718Skan INTVAL (XEXP (XEXP (X, 1), 1))); \ 2367132718Skan else \ 2368132718Skan asm_fprintf (STREAM, "%r", \ 2369132718Skan REGNO (XEXP (XEXP (X, 1), 1))); \ 2370132718Skan } \ 2371132718Skan else output_addr_const (STREAM, X); \ 237290075Sobrien} 237390075Sobrien 237490075Sobrien#define THUMB_PRINT_OPERAND_ADDRESS(STREAM, X) \ 237590075Sobrien{ \ 237690075Sobrien if (GET_CODE (X) == REG) \ 237790075Sobrien asm_fprintf (STREAM, "[%r]", REGNO (X)); \ 237890075Sobrien else if (GET_CODE (X) == POST_INC) \ 237990075Sobrien asm_fprintf (STREAM, "%r!", REGNO (XEXP (X, 0))); \ 238090075Sobrien else if (GET_CODE (X) == PLUS) \ 238190075Sobrien { \ 2382169689Skan gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \ 238390075Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 2384132718Skan asm_fprintf (STREAM, "[%r, #%wd]", \ 238590075Sobrien REGNO (XEXP (X, 0)), \ 2386132718Skan INTVAL (XEXP (X, 1))); \ 238790075Sobrien else \ 238890075Sobrien asm_fprintf (STREAM, "[%r, %r]", \ 238990075Sobrien REGNO (XEXP (X, 0)), \ 239090075Sobrien REGNO (XEXP (X, 1))); \ 239190075Sobrien } \ 239290075Sobrien else \ 239390075Sobrien output_addr_const (STREAM, X); \ 239490075Sobrien} 239590075Sobrien 239690075Sobrien#define PRINT_OPERAND_ADDRESS(STREAM, X) \ 239790075Sobrien if (TARGET_ARM) \ 239890075Sobrien ARM_PRINT_OPERAND_ADDRESS (STREAM, X) \ 239990075Sobrien else \ 240090075Sobrien THUMB_PRINT_OPERAND_ADDRESS (STREAM, X) 2401132718Skan 2402169689Skan#define OUTPUT_ADDR_CONST_EXTRA(file, x, fail) \ 2403169689Skan if (arm_output_addr_const_extra (file, x) == FALSE) \ 2404169689Skan goto fail 2405132718Skan 240690075Sobrien/* A C expression whose value is RTL representing the value of the return 240790075Sobrien address for the frame COUNT steps up from the current frame. */ 240890075Sobrien 240990075Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 241090075Sobrien arm_return_addr (COUNT, FRAME) 241190075Sobrien 2412169689Skan/* Mask of the bits in the PC that contain the real return address 241390075Sobrien when running in 26-bit mode. */ 241490075Sobrien#define RETURN_ADDR_MASK26 (0x03fffffc) 241590075Sobrien 241690075Sobrien/* Pick up the return address upon entry to a procedure. Used for 241790075Sobrien dwarf2 unwind information. This also enables the table driven 241890075Sobrien mechanism. */ 241990075Sobrien#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM) 242090075Sobrien#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM) 242190075Sobrien 242290075Sobrien/* Used to mask out junk bits from the return address, such as 242390075Sobrien processor state, interrupt status, condition codes and the like. */ 242490075Sobrien#define MASK_RETURN_ADDR \ 242590075Sobrien /* If we are generating code for an ARM2/ARM3 machine or for an ARM6 \ 242690075Sobrien in 26 bit mode, the condition codes must be masked out of the \ 242790075Sobrien return address. This does not apply to ARM6 and later processors \ 242890075Sobrien when running in 32 bit mode. */ \ 2429169689Skan ((arm_arch4 || TARGET_THUMB) \ 2430169689Skan ? (gen_int_mode ((unsigned long)0xffffffff, Pmode)) \ 2431117395Skan : arm_gen_return_addr_mask ()) 243290075Sobrien 243390075Sobrien 243490075Sobrienenum arm_builtins 243590075Sobrien{ 2436132718Skan ARM_BUILTIN_GETWCX, 2437132718Skan ARM_BUILTIN_SETWCX, 2438132718Skan 2439132718Skan ARM_BUILTIN_WZERO, 2440132718Skan 2441132718Skan ARM_BUILTIN_WAVG2BR, 2442132718Skan ARM_BUILTIN_WAVG2HR, 2443132718Skan ARM_BUILTIN_WAVG2B, 2444132718Skan ARM_BUILTIN_WAVG2H, 2445132718Skan 2446132718Skan ARM_BUILTIN_WACCB, 2447132718Skan ARM_BUILTIN_WACCH, 2448132718Skan ARM_BUILTIN_WACCW, 2449132718Skan 2450132718Skan ARM_BUILTIN_WMACS, 2451132718Skan ARM_BUILTIN_WMACSZ, 2452132718Skan ARM_BUILTIN_WMACU, 2453132718Skan ARM_BUILTIN_WMACUZ, 2454132718Skan 2455132718Skan ARM_BUILTIN_WSADB, 2456132718Skan ARM_BUILTIN_WSADBZ, 2457132718Skan ARM_BUILTIN_WSADH, 2458132718Skan ARM_BUILTIN_WSADHZ, 2459132718Skan 2460132718Skan ARM_BUILTIN_WALIGN, 2461132718Skan 2462132718Skan ARM_BUILTIN_TMIA, 2463132718Skan ARM_BUILTIN_TMIAPH, 2464132718Skan ARM_BUILTIN_TMIABB, 2465132718Skan ARM_BUILTIN_TMIABT, 2466132718Skan ARM_BUILTIN_TMIATB, 2467132718Skan ARM_BUILTIN_TMIATT, 2468132718Skan 2469132718Skan ARM_BUILTIN_TMOVMSKB, 2470132718Skan ARM_BUILTIN_TMOVMSKH, 2471132718Skan ARM_BUILTIN_TMOVMSKW, 2472132718Skan 2473132718Skan ARM_BUILTIN_TBCSTB, 2474132718Skan ARM_BUILTIN_TBCSTH, 2475132718Skan ARM_BUILTIN_TBCSTW, 2476132718Skan 2477132718Skan ARM_BUILTIN_WMADDS, 2478132718Skan ARM_BUILTIN_WMADDU, 2479132718Skan 2480132718Skan ARM_BUILTIN_WPACKHSS, 2481132718Skan ARM_BUILTIN_WPACKWSS, 2482132718Skan ARM_BUILTIN_WPACKDSS, 2483132718Skan ARM_BUILTIN_WPACKHUS, 2484132718Skan ARM_BUILTIN_WPACKWUS, 2485132718Skan ARM_BUILTIN_WPACKDUS, 2486132718Skan 2487132718Skan ARM_BUILTIN_WADDB, 2488132718Skan ARM_BUILTIN_WADDH, 2489132718Skan ARM_BUILTIN_WADDW, 2490132718Skan ARM_BUILTIN_WADDSSB, 2491132718Skan ARM_BUILTIN_WADDSSH, 2492132718Skan ARM_BUILTIN_WADDSSW, 2493132718Skan ARM_BUILTIN_WADDUSB, 2494132718Skan ARM_BUILTIN_WADDUSH, 2495132718Skan ARM_BUILTIN_WADDUSW, 2496132718Skan ARM_BUILTIN_WSUBB, 2497132718Skan ARM_BUILTIN_WSUBH, 2498132718Skan ARM_BUILTIN_WSUBW, 2499132718Skan ARM_BUILTIN_WSUBSSB, 2500132718Skan ARM_BUILTIN_WSUBSSH, 2501132718Skan ARM_BUILTIN_WSUBSSW, 2502132718Skan ARM_BUILTIN_WSUBUSB, 2503132718Skan ARM_BUILTIN_WSUBUSH, 2504132718Skan ARM_BUILTIN_WSUBUSW, 2505132718Skan 2506132718Skan ARM_BUILTIN_WAND, 2507132718Skan ARM_BUILTIN_WANDN, 2508132718Skan ARM_BUILTIN_WOR, 2509132718Skan ARM_BUILTIN_WXOR, 2510132718Skan 2511132718Skan ARM_BUILTIN_WCMPEQB, 2512132718Skan ARM_BUILTIN_WCMPEQH, 2513132718Skan ARM_BUILTIN_WCMPEQW, 2514132718Skan ARM_BUILTIN_WCMPGTUB, 2515132718Skan ARM_BUILTIN_WCMPGTUH, 2516132718Skan ARM_BUILTIN_WCMPGTUW, 2517132718Skan ARM_BUILTIN_WCMPGTSB, 2518132718Skan ARM_BUILTIN_WCMPGTSH, 2519132718Skan ARM_BUILTIN_WCMPGTSW, 2520132718Skan 2521132718Skan ARM_BUILTIN_TEXTRMSB, 2522132718Skan ARM_BUILTIN_TEXTRMSH, 2523132718Skan ARM_BUILTIN_TEXTRMSW, 2524132718Skan ARM_BUILTIN_TEXTRMUB, 2525132718Skan ARM_BUILTIN_TEXTRMUH, 2526132718Skan ARM_BUILTIN_TEXTRMUW, 2527132718Skan ARM_BUILTIN_TINSRB, 2528132718Skan ARM_BUILTIN_TINSRH, 2529132718Skan ARM_BUILTIN_TINSRW, 2530132718Skan 2531132718Skan ARM_BUILTIN_WMAXSW, 2532132718Skan ARM_BUILTIN_WMAXSH, 2533132718Skan ARM_BUILTIN_WMAXSB, 2534132718Skan ARM_BUILTIN_WMAXUW, 2535132718Skan ARM_BUILTIN_WMAXUH, 2536132718Skan ARM_BUILTIN_WMAXUB, 2537132718Skan ARM_BUILTIN_WMINSW, 2538132718Skan ARM_BUILTIN_WMINSH, 2539132718Skan ARM_BUILTIN_WMINSB, 2540132718Skan ARM_BUILTIN_WMINUW, 2541132718Skan ARM_BUILTIN_WMINUH, 2542132718Skan ARM_BUILTIN_WMINUB, 2543132718Skan 2544169689Skan ARM_BUILTIN_WMULUM, 2545169689Skan ARM_BUILTIN_WMULSM, 2546132718Skan ARM_BUILTIN_WMULUL, 2547132718Skan 2548132718Skan ARM_BUILTIN_PSADBH, 2549132718Skan ARM_BUILTIN_WSHUFH, 2550132718Skan 2551132718Skan ARM_BUILTIN_WSLLH, 2552132718Skan ARM_BUILTIN_WSLLW, 2553132718Skan ARM_BUILTIN_WSLLD, 2554132718Skan ARM_BUILTIN_WSRAH, 2555132718Skan ARM_BUILTIN_WSRAW, 2556132718Skan ARM_BUILTIN_WSRAD, 2557132718Skan ARM_BUILTIN_WSRLH, 2558132718Skan ARM_BUILTIN_WSRLW, 2559132718Skan ARM_BUILTIN_WSRLD, 2560132718Skan ARM_BUILTIN_WRORH, 2561132718Skan ARM_BUILTIN_WRORW, 2562132718Skan ARM_BUILTIN_WRORD, 2563132718Skan ARM_BUILTIN_WSLLHI, 2564132718Skan ARM_BUILTIN_WSLLWI, 2565132718Skan ARM_BUILTIN_WSLLDI, 2566132718Skan ARM_BUILTIN_WSRAHI, 2567132718Skan ARM_BUILTIN_WSRAWI, 2568132718Skan ARM_BUILTIN_WSRADI, 2569132718Skan ARM_BUILTIN_WSRLHI, 2570132718Skan ARM_BUILTIN_WSRLWI, 2571132718Skan ARM_BUILTIN_WSRLDI, 2572132718Skan ARM_BUILTIN_WRORHI, 2573132718Skan ARM_BUILTIN_WRORWI, 2574132718Skan ARM_BUILTIN_WRORDI, 2575132718Skan 2576132718Skan ARM_BUILTIN_WUNPCKIHB, 2577132718Skan ARM_BUILTIN_WUNPCKIHH, 2578132718Skan ARM_BUILTIN_WUNPCKIHW, 2579132718Skan ARM_BUILTIN_WUNPCKILB, 2580132718Skan ARM_BUILTIN_WUNPCKILH, 2581132718Skan ARM_BUILTIN_WUNPCKILW, 2582132718Skan 2583132718Skan ARM_BUILTIN_WUNPCKEHSB, 2584132718Skan ARM_BUILTIN_WUNPCKEHSH, 2585132718Skan ARM_BUILTIN_WUNPCKEHSW, 2586132718Skan ARM_BUILTIN_WUNPCKEHUB, 2587132718Skan ARM_BUILTIN_WUNPCKEHUH, 2588132718Skan ARM_BUILTIN_WUNPCKEHUW, 2589132718Skan ARM_BUILTIN_WUNPCKELSB, 2590132718Skan ARM_BUILTIN_WUNPCKELSH, 2591132718Skan ARM_BUILTIN_WUNPCKELSW, 2592132718Skan ARM_BUILTIN_WUNPCKELUB, 2593132718Skan ARM_BUILTIN_WUNPCKELUH, 2594132718Skan ARM_BUILTIN_WUNPCKELUW, 2595132718Skan 2596169689Skan ARM_BUILTIN_THREAD_POINTER, 2597169689Skan 259890075Sobrien ARM_BUILTIN_MAX 259990075Sobrien}; 260090075Sobrien#endif /* ! GCC_ARM_H */ 2601