cgen-dis.in revision 85815
1/* Disassembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4THIS FILE IS MACHINE GENERATED WITH CGEN. 5- the resultant file is machine generated, cgen-dis.in isn't 6 7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. 8 9This file is part of the GNU Binutils and GDB, the GNU debugger. 10 11This program is free software; you can redistribute it and/or modify 12it under the terms of the GNU General Public License as published by 13the Free Software Foundation; either version 2, or (at your option) 14any later version. 15 16This program is distributed in the hope that it will be useful, 17but WITHOUT ANY WARRANTY; without even the implied warranty of 18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19GNU General Public License for more details. 20 21You should have received a copy of the GNU General Public License 22along with this program; if not, write to the Free Software Foundation, Inc., 2359 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 24 25/* ??? Eventually more and more of this stuff can go to cpu-independent files. 26 Keep that in mind. */ 27 28#include "sysdep.h" 29#include <stdio.h> 30#include "ansidecl.h" 31#include "dis-asm.h" 32#include "bfd.h" 33#include "symcat.h" 34#include "@prefix@-desc.h" 35#include "@prefix@-opc.h" 36#include "opintl.h" 37 38/* Default text to print if an instruction isn't recognized. */ 39#define UNKNOWN_INSN_MSG _("*unknown*") 40 41static void print_normal 42 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int)); 43static void print_address 44 PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int)); 45static void print_keyword 46 PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int)); 47static void print_insn_normal 48 PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, 49 bfd_vma, int)); 50static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, 51 disassemble_info *, char *, int)); 52static int default_print_insn 53 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); 54 55/* -- disassembler routines inserted here */ 56 57/* Default print handler. */ 58 59static void 60print_normal (cd, dis_info, value, attrs, pc, length) 61#ifdef CGEN_PRINT_NORMAL 62 CGEN_CPU_DESC cd; 63#else 64 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 65#endif 66 PTR dis_info; 67 long value; 68 unsigned int attrs; 69#ifdef CGEN_PRINT_NORMAL 70 bfd_vma pc; 71 int length; 72#else 73 bfd_vma pc ATTRIBUTE_UNUSED; 74 int length ATTRIBUTE_UNUSED; 75#endif 76{ 77 disassemble_info *info = (disassemble_info *) dis_info; 78 79#ifdef CGEN_PRINT_NORMAL 80 CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); 81#endif 82 83 /* Print the operand as directed by the attributes. */ 84 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 85 ; /* nothing to do */ 86 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 87 (*info->fprintf_func) (info->stream, "%ld", value); 88 else 89 (*info->fprintf_func) (info->stream, "0x%lx", value); 90} 91 92/* Default address handler. */ 93 94static void 95print_address (cd, dis_info, value, attrs, pc, length) 96#ifdef CGEN_PRINT_NORMAL 97 CGEN_CPU_DESC cd; 98#else 99 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 100#endif 101 PTR dis_info; 102 bfd_vma value; 103 unsigned int attrs; 104#ifdef CGEN_PRINT_NORMAL 105 bfd_vma pc; 106 int length; 107#else 108 bfd_vma pc ATTRIBUTE_UNUSED; 109 int length ATTRIBUTE_UNUSED; 110#endif 111{ 112 disassemble_info *info = (disassemble_info *) dis_info; 113 114#ifdef CGEN_PRINT_ADDRESS 115 CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); 116#endif 117 118 /* Print the operand as directed by the attributes. */ 119 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 120 ; /* nothing to do */ 121 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) 122 (*info->print_address_func) (value, info); 123 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) 124 (*info->print_address_func) (value, info); 125 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 126 (*info->fprintf_func) (info->stream, "%ld", (long) value); 127 else 128 (*info->fprintf_func) (info->stream, "0x%lx", (long) value); 129} 130 131/* Keyword print handler. */ 132 133static void 134print_keyword (cd, dis_info, keyword_table, value, attrs) 135 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 136 PTR dis_info; 137 CGEN_KEYWORD *keyword_table; 138 long value; 139 unsigned int attrs ATTRIBUTE_UNUSED; 140{ 141 disassemble_info *info = (disassemble_info *) dis_info; 142 const CGEN_KEYWORD_ENTRY *ke; 143 144 ke = cgen_keyword_lookup_value (keyword_table, value); 145 if (ke != NULL) 146 (*info->fprintf_func) (info->stream, "%s", ke->name); 147 else 148 (*info->fprintf_func) (info->stream, "???"); 149} 150 151/* Default insn printer. 152 153 DIS_INFO is defined as `PTR' so the disassembler needn't know anything 154 about disassemble_info. */ 155 156static void 157print_insn_normal (cd, dis_info, insn, fields, pc, length) 158 CGEN_CPU_DESC cd; 159 PTR dis_info; 160 const CGEN_INSN *insn; 161 CGEN_FIELDS *fields; 162 bfd_vma pc; 163 int length; 164{ 165 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 166 disassemble_info *info = (disassemble_info *) dis_info; 167 const CGEN_SYNTAX_CHAR_TYPE *syn; 168 169 CGEN_INIT_PRINT (cd); 170 171 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 172 { 173 if (CGEN_SYNTAX_MNEMONIC_P (*syn)) 174 { 175 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); 176 continue; 177 } 178 if (CGEN_SYNTAX_CHAR_P (*syn)) 179 { 180 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); 181 continue; 182 } 183 184 /* We have an operand. */ 185 @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, 186 fields, CGEN_INSN_ATTRS (insn), pc, length); 187 } 188} 189 190/* Subroutine of print_insn. Reads an insn into the given buffers and updates 191 the extract info. 192 Returns 0 if all is well, non-zero otherwise. */ 193static int 194read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) 195 CGEN_CPU_DESC cd; 196 bfd_vma pc; 197 disassemble_info *info; 198 char *buf; 199 int buflen; 200 CGEN_EXTRACT_INFO *ex_info; 201 unsigned long *insn_value; 202{ 203 int status = (*info->read_memory_func) (pc, buf, buflen, info); 204 if (status != 0) 205 { 206 (*info->memory_error_func) (status, pc, info); 207 return -1; 208 } 209 210 ex_info->dis_info = info; 211 ex_info->valid = (1 << buflen) - 1; 212 ex_info->insn_bytes = buf; 213 214 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); 215 return 0; 216} 217 218/* Utility to print an insn. 219 BUF is the base part of the insn, target byte order, BUFLEN bytes long. 220 The result is the size of the insn in bytes or zero for an unknown insn 221 or -1 if an error occurs fetching data (memory_error_func will have 222 been called). */ 223 224static int 225print_insn (cd, pc, info, buf, buflen) 226 CGEN_CPU_DESC cd; 227 bfd_vma pc; 228 disassemble_info *info; 229 char *buf; 230 int buflen; 231{ 232 unsigned long insn_value; 233 const CGEN_INSN_LIST *insn_list; 234 CGEN_EXTRACT_INFO ex_info; 235 236 int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value); 237 if (rc != 0) 238 return rc; 239 240 /* The instructions are stored in hash lists. 241 Pick the first one and keep trying until we find the right one. */ 242 243 insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); 244 while (insn_list != NULL) 245 { 246 const CGEN_INSN *insn = insn_list->insn; 247 CGEN_FIELDS fields; 248 int length; 249 250#ifdef CGEN_VALIDATE_INSN_SUPPORTED 251 /* not needed as insn shouldn't be in hash lists if not supported */ 252 /* Supported by this cpu? */ 253 if (! @arch@_cgen_insn_supported (cd, insn)) 254 { 255 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 256 continue; 257 } 258#endif 259 260 /* Basic bit mask must be correct. */ 261 /* ??? May wish to allow target to defer this check until the extract 262 handler. */ 263 if ((insn_value & CGEN_INSN_BASE_MASK (insn)) 264 == CGEN_INSN_BASE_VALUE (insn)) 265 { 266 /* Printing is handled in two passes. The first pass parses the 267 machine insn and extracts the fields. The second pass prints 268 them. */ 269 270 /* Make sure the entire insn is loaded into insn_value, if it 271 can fit. */ 272 if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && 273 (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 274 { 275 unsigned long full_insn_value; 276 int rc = read_insn (cd, pc, info, buf, 277 CGEN_INSN_BITSIZE (insn) / 8, 278 & ex_info, & full_insn_value); 279 if (rc != 0) 280 return rc; 281 length = CGEN_EXTRACT_FN (cd, insn) 282 (cd, insn, &ex_info, full_insn_value, &fields, pc); 283 } 284 else 285 length = CGEN_EXTRACT_FN (cd, insn) 286 (cd, insn, &ex_info, insn_value, &fields, pc); 287 288 /* length < 0 -> error */ 289 if (length < 0) 290 return length; 291 if (length > 0) 292 { 293 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); 294 /* length is in bits, result is in bytes */ 295 return length / 8; 296 } 297 } 298 299 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 300 } 301 302 return 0; 303} 304 305/* Default value for CGEN_PRINT_INSN. 306 The result is the size of the insn in bytes or zero for an unknown insn 307 or -1 if an error occured fetching bytes. */ 308 309#ifndef CGEN_PRINT_INSN 310#define CGEN_PRINT_INSN default_print_insn 311#endif 312 313static int 314default_print_insn (cd, pc, info) 315 CGEN_CPU_DESC cd; 316 bfd_vma pc; 317 disassemble_info *info; 318{ 319 char buf[CGEN_MAX_INSN_SIZE]; 320 int status; 321 322 /* Read the base part of the insn. */ 323 324 status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info); 325 if (status != 0) 326 { 327 (*info->memory_error_func) (status, pc, info); 328 return -1; 329 } 330 331 return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8); 332} 333 334/* Main entry point. 335 Print one instruction from PC on INFO->STREAM. 336 Return the size of the instruction (in bytes). */ 337 338int 339print_insn_@arch@ (pc, info) 340 bfd_vma pc; 341 disassemble_info *info; 342{ 343 static CGEN_CPU_DESC cd = 0; 344 static int prev_isa; 345 static int prev_mach; 346 static int prev_endian; 347 int length; 348 int isa,mach; 349 int endian = (info->endian == BFD_ENDIAN_BIG 350 ? CGEN_ENDIAN_BIG 351 : CGEN_ENDIAN_LITTLE); 352 enum bfd_architecture arch; 353 354 /* ??? gdb will set mach but leave the architecture as "unknown" */ 355#ifndef CGEN_BFD_ARCH 356#define CGEN_BFD_ARCH bfd_arch_@arch@ 357#endif 358 arch = info->arch; 359 if (arch == bfd_arch_unknown) 360 arch = CGEN_BFD_ARCH; 361 362 /* There's no standard way to compute the isa number (e.g. for arm thumb) 363 so we leave it to the target. */ 364#ifdef CGEN_COMPUTE_ISA 365 isa = CGEN_COMPUTE_ISA (info); 366#else 367 isa = 0; 368#endif 369 370 mach = info->mach; 371 372 /* If we've switched cpu's, close the current table and open a new one. */ 373 if (cd 374 && (isa != prev_isa 375 || mach != prev_mach 376 || endian != prev_endian)) 377 { 378 @arch@_cgen_cpu_close (cd); 379 cd = 0; 380 } 381 382 /* If we haven't initialized yet, initialize the opcode table. */ 383 if (! cd) 384 { 385 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); 386 const char *mach_name; 387 388 if (!arch_type) 389 abort (); 390 mach_name = arch_type->printable_name; 391 392 prev_isa = isa; 393 prev_mach = mach; 394 prev_endian = endian; 395 cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, 396 CGEN_CPU_OPEN_BFDMACH, mach_name, 397 CGEN_CPU_OPEN_ENDIAN, prev_endian, 398 CGEN_CPU_OPEN_END); 399 if (!cd) 400 abort (); 401 @arch@_cgen_init_dis (cd); 402 } 403 404 /* We try to have as much common code as possible. 405 But at this point some targets need to take over. */ 406 /* ??? Some targets may need a hook elsewhere. Try to avoid this, 407 but if not possible try to move this hook elsewhere rather than 408 have two hooks. */ 409 length = CGEN_PRINT_INSN (cd, pc, info); 410 if (length > 0) 411 return length; 412 if (length < 0) 413 return -1; 414 415 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); 416 return cd->default_insn_bitsize / 8; 417} 418