sh.h revision 89857
1139776Simp/* coff information for Hitachi SH 21541Srgrimes 31541Srgrimes Copyright 2001 Free Software Foundation, Inc. 41541Srgrimes 51541Srgrimes This program is free software; you can redistribute it and/or modify 61541Srgrimes it under the terms of the GNU General Public License as published by 71541Srgrimes the Free Software Foundation; either version 2 of the License, or 81541Srgrimes (at your option) any later version. 91541Srgrimes 101541Srgrimes This program is distributed in the hope that it will be useful, 111541Srgrimes but WITHOUT ANY WARRANTY; without even the implied warranty of 121541Srgrimes MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 131541Srgrimes GNU General Public License for more details. 141541Srgrimes 151541Srgrimes You should have received a copy of the GNU General Public License 161541Srgrimes along with this program; if not, write to the Free Software 171541Srgrimes Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 181541Srgrimes 191541Srgrimes#ifdef COFF_WITH_PE 201541Srgrimes#define L_LNNO_SIZE 2 211541Srgrimes#else 221541Srgrimes#define L_LNNO_SIZE 4 231541Srgrimes#endif 241541Srgrimes#define INCLUDE_COMDAT_FIELDS_IN_AUXENT 251541Srgrimes#include "coff/external.h" 261541Srgrimes 271541Srgrimes#define SH_ARCH_MAGIC_BIG 0x0500 281541Srgrimes#define SH_ARCH_MAGIC_LITTLE 0x0550 /* Little endian SH */ 291541Srgrimes#define SH_ARCH_MAGIC_WINCE 0x01a2 /* Windows CE - little endian */ 301541Srgrimes#define SH_PE_MAGIC 0x010b 311541Srgrimes 3222521Sdyson#define SHBADMAG(x) \ 331541Srgrimes (((x).f_magic != SH_ARCH_MAGIC_BIG) && \ 3422521Sdyson ((x).f_magic != SH_ARCH_MAGIC_WINCE) && \ 3522521Sdyson ((x).f_magic != SH_ARCH_MAGIC_LITTLE)) 3622521Sdyson 3722521Sdyson/* Define some NT default values. */ 3822521Sdyson/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */ 3950477Speter#define NT_SECTION_ALIGNMENT 0x1000 401541Srgrimes#define NT_FILE_ALIGNMENT 0x200 411541Srgrimes#define NT_DEF_RESERVE 0x100000 421541Srgrimes#define NT_DEF_COMMIT 0x1000 431541Srgrimes 441541Srgrimes/********************** RELOCATION DIRECTIVES **********************/ 4577130Sru 461541Srgrimes/* The external reloc has an offset field, because some of the reloc 4796755Strhodes types on the h8 don't have room in the instruction for the entire 481541Srgrimes offset - eg the strange jump and high page addressing modes. */ 4996755Strhodes 501541Srgrimes#ifndef COFF_WITH_PE 5135256Sdesstruct external_reloc 521541Srgrimes{ 531541Srgrimes char r_vaddr[4]; 541541Srgrimes char r_symndx[4]; 551541Srgrimes char r_offset[4]; 5696755Strhodes char r_type[2]; 571541Srgrimes char r_stuff[2]; 581541Srgrimes}; 5996755Strhodes#else 601541Srgrimesstruct external_reloc 611541Srgrimes{ 621541Srgrimes char r_vaddr[4]; 631541Srgrimes char r_symndx[4]; 641541Srgrimes char r_type[2]; 651541Srgrimes}; 661541Srgrimes#endif 671541Srgrimes 6877130Sru#define RELOC struct external_reloc 6977130Sru#ifdef COFF_WITH_PE 701541Srgrimes#define RELSZ 10 711541Srgrimes#else 721541Srgrimes#define RELSZ 16 731541Srgrimes#endif 741541Srgrimes 751541Srgrimes/* SH relocation types. Not all of these are actually used. */ 761541Srgrimes 771541Srgrimes#define R_SH_UNUSED 0 /* only used internally */ 7896755Strhodes#define R_SH_IMM32CE 2 /* 32 bit immediate for WinCE */ 791541Srgrimes#define R_SH_PCREL8 3 /* 8 bit pcrel */ 801541Srgrimes#define R_SH_PCREL16 4 /* 16 bit pcrel */ 8126963Salex#define R_SH_HIGH8 5 /* high 8 bits of 24 bit address */ 821541Srgrimes#define R_SH_LOW16 7 /* low 16 bits of 24 bit immediate */ 831541Srgrimes#define R_SH_IMM24 6 /* 24 bit immediate */ 841541Srgrimes#define R_SH_PCDISP8BY4 9 /* PC rel 8 bits *4 +ve */ 851541Srgrimes#define R_SH_PCDISP8BY2 10 /* PC rel 8 bits *2 +ve */ 861541Srgrimes#define R_SH_PCDISP8 11 /* 8 bit branch */ 871541Srgrimes#define R_SH_PCDISP 12 /* 12 bit branch */ 881541Srgrimes#define R_SH_IMM32 14 /* 32 bit immediate */ 891541Srgrimes#define R_SH_IMM8 16 /* 8 bit immediate */ 901541Srgrimes#define R_SH_IMAGEBASE 16 /* Windows CE */ 911541Srgrimes#define R_SH_IMM8BY2 17 /* 8 bit immediate *2 */ 9222521Sdyson#define R_SH_IMM8BY4 18 /* 8 bit immediate *4 */ 9322521Sdyson#define R_SH_IMM4 19 /* 4 bit immediate */ 9422521Sdyson#define R_SH_IMM4BY2 20 /* 4 bit immediate *2 */ 9522521Sdyson#define R_SH_IMM4BY4 21 /* 4 bit immediate *4 */ 9622521Sdyson#define R_SH_PCRELIMM8BY2 22 /* PC rel 8 bits *2 unsigned */ 971541Srgrimes#define R_SH_PCRELIMM8BY4 23 /* PC rel 8 bits *4 unsigned */ 9822521Sdyson#define R_SH_IMM16 24 /* 16 bit immediate */ 9922521Sdyson 10022521Sdyson/* The switch table reloc types are used for relaxing. They are 10122521Sdyson generated for expressions such as 10222521Sdyson .word L1 - L2 10322521Sdyson The r_offset field holds the difference between the reloc address 10422521Sdyson and L2. */ 10522521Sdyson#define R_SH_SWITCH8 33 /* 8 bit switch table entry */ 10622521Sdyson#define R_SH_SWITCH16 25 /* 16 bit switch table entry */ 1071541Srgrimes#define R_SH_SWITCH32 26 /* 32 bit switch table entry */ 1081541Srgrimes 1091541Srgrimes/* The USES reloc type is used for relaxing. The compiler will 1101541Srgrimes generate .uses pseudo-ops when it finds a function call which it 1111541Srgrimes can relax. The r_offset field of the USES reloc holds the PC 1121541Srgrimes relative offset to the instruction which loads the register used in 1131541Srgrimes the function call. */ 1141541Srgrimes#define R_SH_USES 27 /* .uses pseudo-op */ 1151541Srgrimes 1161541Srgrimes/* The COUNT reloc type is used for relaxing. The assembler will 1171541Srgrimes generate COUNT relocs for addresses referred to by the register 1181541Srgrimes loads associated with USES relocs. The r_offset field of the COUNT 1191541Srgrimes reloc holds the number of times the address is referenced in the 1201541Srgrimes object file. */ 1218876Srgrimes#define R_SH_COUNT 28 /* Count of constant pool uses */ 1221541Srgrimes 1231541Srgrimes/* The ALIGN reloc type is used for relaxing. The r_offset field is 1241541Srgrimes the power of two to which subsequent portions of the object file 1251541Srgrimes must be aligned. */ 12677130Sru#define R_SH_ALIGN 29 /* .align pseudo-op */ 1271541Srgrimes 1281541Srgrimes/* The CODE and DATA reloc types are used for aligning load and store 1291541Srgrimes instructions. The assembler will generate a CODE reloc before a 1301541Srgrimes block of instructions. It will generate a DATA reloc before data. 1318876Srgrimes A section should be processed assuming it contains data, unless a 1321541Srgrimes CODE reloc is seen. The only relevant pieces of information in the 1331541Srgrimes CODE and DATA relocs are the section and the address. The symbol 1341541Srgrimes and offset are meaningless. */ 1351541Srgrimes#define R_SH_CODE 30 /* start of code */ 1361541Srgrimes#define R_SH_DATA 31 /* start of data */ 1371541Srgrimes 1381541Srgrimes/* The LABEL reloc type is used for aligning load and store 1391541Srgrimes instructions. The assembler will generate a LABEL reloc for each 14096755Strhodes label within a block of instructions. This permits the linker to 1411541Srgrimes avoid swapping instructions which are the targets of branches. */ 1421541Srgrimes#define R_SH_LABEL 32 /* label */ 1431541Srgrimes 1441541Srgrimes/* NB: R_SH_SWITCH8 is 33 */ 1458876Srgrimes 1461541Srgrimes#define R_SH_LOOP_START 34 1471541Srgrimes#define R_SH_LOOP_END 35 1481541Srgrimes