c-avr.texi revision 214571
1@c Copyright 2006 2@c Free Software Foundation, Inc. 3@c This is part of the GAS manual. 4@c For copying conditions, see the file as.texinfo. 5 6@ifset GENERIC 7@page 8@node AVR-Dependent 9@chapter AVR Dependent Features 10@end ifset 11 12@ifclear GENERIC 13@node Machine Dependencies 14@chapter AVR Dependent Features 15@end ifclear 16 17@cindex AVR support 18@menu 19* AVR Options:: Options 20* AVR Syntax:: Syntax 21* AVR Opcodes:: Opcodes 22@end menu 23 24@node AVR Options 25@section Options 26@cindex AVR options (none) 27@cindex options for AVR (none) 28 29@table @code 30 31@cindex @code{-mmcu=} command line option, AVR 32@item -mmcu=@var{mcu} 33Specify ATMEL AVR instruction set or MCU type. 34 35Instruction set avr1 is for the minimal AVR core, not supported by the C 36compiler, only for assembler programs (MCU types: at90s1200, attiny10, 37attiny11, attiny12, attiny15, attiny28). 38 39Instruction set avr2 (default) is for the classic AVR core with up to 408K program memory space (MCU types: at90s2313, at90s2323, attiny22, 41attiny26, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, 42at90s8515, at90c8534, at90s8535, at86rf401, attiny13, attiny2313, 43attiny261, attiny461, attiny861, attiny24, attiny44, attiny84, attiny25, 44attiny45, attiny85). 45 46Instruction set avr3 is for the classic AVR core with up to 128K program 47memory space (MCU types: atmega103, atmega603, at43usb320, at43usb355, 48at76c711). 49 50Instruction set avr4 is for the enhanced AVR core with up to 8K program 51memory space (MCU types: atmega48, atmega8, atmega83, atmega85, atmega88, 52atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm3). 53 54Instruction set avr5 is for the enhanced AVR core with up to 128K program 55memory space (MCU types: atmega16, atmega161, atmega162, atmega163, 56atmega164p, atmega165, atmega165p, atmega168, atmega169, atmega169p, 57atmega32, atmega323, atmega324p, atmega325, atmega325p, atmega329, 58atmega329p, atmega3250, atmega3250p, atmega3290, atmega3290p, atmega406, 59atmega64, atmega640, atmega644, atmega644p, atmega128, atmega1280, 60atmega1281, atmega645, atmega649, atmega6450, atmega6490, atmega16hva, 61at90can32, at90can64, at90can128, at90usb82, at90usb162, at90usb646, 62at90usb647, at90usb1286, at90usb1287, at94k). 63 64Instruction set avr6 is for the enhanced AVR core with 256K program 65memory space (MCU types: atmega2560, atmega2561). 66 67@cindex @code{-mall-opcodes} command line option, AVR 68@item -mall-opcodes 69Accept all AVR opcodes, even if not supported by @code{-mmcu}. 70 71@cindex @code{-mno-skip-bug} command line option, AVR 72@item -mno-skip-bug 73This option disable warnings for skipping two-word instructions. 74 75@cindex @code{-mno-wrap} command line option, AVR 76@item -mno-wrap 77This option reject @code{rjmp/rcall} instructions with 8K wrap-around. 78 79@end table 80 81 82@node AVR Syntax 83@section Syntax 84@menu 85* AVR-Chars:: Special Characters 86* AVR-Regs:: Register Names 87* AVR-Modifiers:: Relocatable Expression Modifiers 88@end menu 89 90@node AVR-Chars 91@subsection Special Characters 92 93@cindex line comment character, AVR 94@cindex AVR line comment character 95 96The presence of a @samp{;} on a line indicates the start of a comment 97that extends to the end of the current line. If a @samp{#} appears as 98the first character of a line, the whole line is treated as a comment. 99 100@cindex line separator, AVR 101@cindex statement separator, AVR 102@cindex AVR line separator 103 104The @samp{$} character can be used instead of a newline to separate 105statements. 106 107@node AVR-Regs 108@subsection Register Names 109 110@cindex AVR register names 111@cindex register names, AVR 112 113The AVR has 32 x 8-bit general purpose working registers @samp{r0}, 114@samp{r1}, ... @samp{r31}. 115Six of the 32 registers can be used as three 16-bit indirect address 116register pointers for Data Space addressing. One of the these address 117pointers can also be used as an address pointer for look up tables in 118Flash program memory. These added function registers are the 16-bit 119@samp{X}, @samp{Y} and @samp{Z} - registers. 120 121@smallexample 122X = @r{r26:r27} 123Y = @r{r28:r29} 124Z = @r{r30:r31} 125@end smallexample 126 127@node AVR-Modifiers 128@subsection Relocatable Expression Modifiers 129 130@cindex AVR modifiers 131@cindex syntax, AVR 132 133The assembler supports several modifiers when using relocatable addresses 134in AVR instruction operands. The general syntax is the following: 135 136@smallexample 137modifier(relocatable-expression) 138@end smallexample 139 140@table @code 141@cindex symbol modifiers 142 143@item lo8 144 145This modifier allows you to use bits 0 through 7 of 146an address expression as 8 bit relocatable expression. 147 148@item hi8 149 150This modifier allows you to use bits 7 through 15 of an address expression 151as 8 bit relocatable expression. This is useful with, for example, the 152AVR @samp{ldi} instruction and @samp{lo8} modifier. 153 154For example 155 156@smallexample 157ldi r26, lo8(sym+10) 158ldi r27, hi8(sym+10) 159@end smallexample 160 161@item hh8 162 163This modifier allows you to use bits 16 through 23 of 164an address expression as 8 bit relocatable expression. 165Also, can be useful for loading 32 bit constants. 166 167@item hlo8 168 169Synonym of @samp{hh8}. 170 171@item hhi8 172 173This modifier allows you to use bits 24 through 31 of 174an expression as 8 bit expression. This is useful with, for example, the 175AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8}, 176@samp{hhi8}, modifier. 177 178For example 179 180@smallexample 181ldi r26, lo8(285774925) 182ldi r27, hi8(285774925) 183ldi r28, hlo8(285774925) 184ldi r29, hhi8(285774925) 185; r29,r28,r27,r26 = 285774925 186@end smallexample 187 188@item pm_lo8 189 190This modifier allows you to use bits 0 through 7 of 191an address expression as 8 bit relocatable expression. 192This modifier useful for addressing data or code from 193Flash/Program memory. The using of @samp{pm_lo8} similar 194to @samp{lo8}. 195 196@item pm_hi8 197 198This modifier allows you to use bits 8 through 15 of 199an address expression as 8 bit relocatable expression. 200This modifier useful for addressing data or code from 201Flash/Program memory. 202 203@item pm_hh8 204 205This modifier allows you to use bits 15 through 23 of 206an address expression as 8 bit relocatable expression. 207This modifier useful for addressing data or code from 208Flash/Program memory. 209 210@end table 211 212@node AVR Opcodes 213@section Opcodes 214 215@cindex AVR opcode summary 216@cindex opcode summary, AVR 217@cindex mnemonics, AVR 218@cindex instruction summary, AVR 219For detailed information on the AVR machine instruction set, see 220@url{www.atmel.com/products/AVR}. 221 222@code{@value{AS}} implements all the standard AVR opcodes. 223The following table summarizes the AVR opcodes, and their arguments. 224 225@smallexample 226@i{Legend:} 227 r @r{any register} 228 d @r{`ldi' register (r16-r31)} 229 v @r{`movw' even register (r0, r2, ..., r28, r30)} 230 a @r{`fmul' register (r16-r23)} 231 w @r{`adiw' register (r24,r26,r28,r30)} 232 e @r{pointer registers (X,Y,Z)} 233 b @r{base pointer register and displacement ([YZ]+disp)} 234 z @r{Z pointer register (for [e]lpm Rd,Z[+])} 235 M @r{immediate value from 0 to 255} 236 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible} 237 s @r{immediate value from 0 to 7} 238 P @r{Port address value from 0 to 63. (in, out)} 239 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)} 240 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')} 241 i @r{immediate value} 242 l @r{signed pc relative offset from -64 to 63} 243 L @r{signed pc relative offset from -2048 to 2047} 244 h @r{absolute code address (call, jmp)} 245 S @r{immediate value from 0 to 7 (S = s << 4)} 246 ? @r{use this opcode entry if no parameters, else use next opcode entry} 247 2481001010010001000 clc 2491001010011011000 clh 2501001010011111000 cli 2511001010010101000 cln 2521001010011001000 cls 2531001010011101000 clt 2541001010010111000 clv 2551001010010011000 clz 2561001010000001000 sec 2571001010001011000 seh 2581001010001111000 sei 2591001010000101000 sen 2601001010001001000 ses 2611001010001101000 set 2621001010000111000 sev 2631001010000011000 sez 264100101001SSS1000 bclr S 265100101000SSS1000 bset S 2661001010100001001 icall 2671001010000001001 ijmp 2681001010111001000 lpm ? 2691001000ddddd010+ lpm r,z 2701001010111011000 elpm ? 2711001000ddddd011+ elpm r,z 2720000000000000000 nop 2731001010100001000 ret 2741001010100011000 reti 2751001010110001000 sleep 2761001010110011000 break 2771001010110101000 wdr 2781001010111101000 spm 279000111rdddddrrrr adc r,r 280000011rdddddrrrr add r,r 281001000rdddddrrrr and r,r 282000101rdddddrrrr cp r,r 283000001rdddddrrrr cpc r,r 284000100rdddddrrrr cpse r,r 285001001rdddddrrrr eor r,r 286001011rdddddrrrr mov r,r 287100111rdddddrrrr mul r,r 288001010rdddddrrrr or r,r 289000010rdddddrrrr sbc r,r 290000110rdddddrrrr sub r,r 291001001rdddddrrrr clr r 292000011rdddddrrrr lsl r 293000111rdddddrrrr rol r 294001000rdddddrrrr tst r 2950111KKKKddddKKKK andi d,M 2960111KKKKddddKKKK cbr d,n 2971110KKKKddddKKKK ldi d,M 29811101111dddd1111 ser d 2990110KKKKddddKKKK ori d,M 3000110KKKKddddKKKK sbr d,M 3010011KKKKddddKKKK cpi d,M 3020100KKKKddddKKKK sbci d,M 3030101KKKKddddKKKK subi d,M 3041111110rrrrr0sss sbrc r,s 3051111111rrrrr0sss sbrs r,s 3061111100ddddd0sss bld r,s 3071111101ddddd0sss bst r,s 30810110PPdddddPPPP in r,P 30910111PPrrrrrPPPP out P,r 31010010110KKddKKKK adiw w,K 31110010111KKddKKKK sbiw w,K 31210011000pppppsss cbi p,s 31310011010pppppsss sbi p,s 31410011001pppppsss sbic p,s 31510011011pppppsss sbis p,s 316111101lllllll000 brcc l 317111100lllllll000 brcs l 318111100lllllll001 breq l 319111101lllllll100 brge l 320111101lllllll101 brhc l 321111100lllllll101 brhs l 322111101lllllll111 brid l 323111100lllllll111 brie l 324111100lllllll000 brlo l 325111100lllllll100 brlt l 326111100lllllll010 brmi l 327111101lllllll001 brne l 328111101lllllll010 brpl l 329111101lllllll000 brsh l 330111101lllllll110 brtc l 331111100lllllll110 brts l 332111101lllllll011 brvc l 333111100lllllll011 brvs l 334111101lllllllsss brbc s,l 335111100lllllllsss brbs s,l 3361101LLLLLLLLLLLL rcall L 3371100LLLLLLLLLLLL rjmp L 3381001010hhhhh111h call h 3391001010hhhhh110h jmp h 3401001010rrrrr0101 asr r 3411001010rrrrr0000 com r 3421001010rrrrr1010 dec r 3431001010rrrrr0011 inc r 3441001010rrrrr0110 lsr r 3451001010rrrrr0001 neg r 3461001000rrrrr1111 pop r 3471001001rrrrr1111 push r 3481001010rrrrr0111 ror r 3491001010rrrrr0010 swap r 35000000001ddddrrrr movw v,v 35100000010ddddrrrr muls d,d 352000000110ddd0rrr mulsu a,a 353000000110ddd1rrr fmul a,a 354000000111ddd0rrr fmuls a,a 355000000111ddd1rrr fmulsu a,a 3561001001ddddd0000 sts i,r 3571001000ddddd0000 lds r,i 35810o0oo0dddddbooo ldd r,b 359100!000dddddee-+ ld r,e 36010o0oo1rrrrrbooo std b,r 361100!001rrrrree-+ st e,r 3621001010100011001 eicall 3631001010000011001 eijmp 364@end smallexample 365