1330887Snp/*- 2330887Snp * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3330887Snp * 4330887Snp * Copyright (c) 2018 Chelsio Communications, Inc. 5330887Snp * All rights reserved. 6330887Snp * 7330887Snp * Redistribution and use in source and binary forms, with or without 8330887Snp * modification, are permitted provided that the following conditions 9330887Snp * are met: 10330887Snp * 1. Redistributions of source code must retain the above copyright 11330887Snp * notice, this list of conditions and the following disclaimer. 12330887Snp * 2. Redistributions in binary form must reproduce the above copyright 13330887Snp * notice, this list of conditions and the following disclaimer in the 14330887Snp * documentation and/or other materials provided with the distribution. 15330887Snp * 16330887Snp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17330887Snp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18330887Snp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19330887Snp * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20330887Snp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21330887Snp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22330887Snp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23330887Snp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24330887Snp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25330887Snp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26330887Snp * SUCH DAMAGE. 27330887Snp */ 28330887Snp 29330887Snp#include <sys/cdefs.h> 30330887Snp__FBSDID("$FreeBSD: stable/11/usr.sbin/cxgbetool/tcbshowt4.c 339393 2018-10-16 22:09:33Z np $"); 31330887Snp 32330887Snp/* Auto-generated file. Avoid direct editing. */ 33330887Snp/* Edits will be lost when file regenerated. */ 34330887Snp#include <stdio.h> 35330887Snp#include "tcb_common.h" 36330887Snp 37330887Snpvoid t4_display_tcb_aux_0 (_TCBVAR *tvp, int aux) 38330887Snp{ 39330887Snp 40330887Snp 41330887Snp 42330887Snp 43330887Snp 44330887Snp 45330887Snp 46330887Snp PR("STATE:\n"); 47330887Snp PR(" %-12s (%-2u), %s, lock_tid %u, init %u\n", 48330887Snp spr_tcp_state(val("t_state")), 49330887Snp val("t_state"), 50330887Snp spr_ip_version(val("ip_version")), 51330887Snp val("lock_tid"), 52330887Snp val("init") 53330887Snp ); 54330887Snp PR(" l2t_ix 0x%x, smac sel 0x%x, tos 0x%x\n", 55330887Snp val("l2t_ix"), 56330887Snp val("smac_sel"), 57330887Snp val("tos") 58330887Snp ); 59330887Snp PR(" maxseg %u, recv_scaleflag %u, recv_tstmp %u, recv_sack %u\n", 60330887Snp val("t_maxseg"), val("recv_scale"), 61330887Snp val("recv_tstmp"), val("recv_sack")); 62330887Snp 63330887Snp 64330887Snp PR("TIMERS:\n"); /* **************************************** */ 65330887Snp PR(" timer %u, dack_timer %u\n", 66330887Snp val("timer"), val("dack_timer")); 67330887Snp PR(" mod_schd: tx: %u, rx: %u, reason 0x%1x\n", 68330887Snp val("mod_schd_tx"), 69330887Snp val("mod_schd_rx"), 70330887Snp ((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) | 71330887Snp val("mod_schd_reason0")) 72330887Snp ); 73330887Snp 74330887Snp 75330887Snp PR(" max_rt %-2u, rxtshift %u, keepalive %u\n", 76330887Snp val("max_rt"), val("t_rxtshift"), 77330887Snp val("keepalive")); 78330887Snp PR(" timestamp_offset 0x%x, timestamp 0x%x\n", 79330887Snp val("timestamp_offset"),val("timestamp")); 80330887Snp 81330887Snp 82330887Snp PR(" t_rtt_ts_recent_age %u t_rttseq_recent %u\n", 83330887Snp val("t_rtt_ts_recent_age"), val("t_rtseq_recent")); 84330887Snp PR(" t_srtt %u, t_rttvar %u\n", 85330887Snp val("t_srtt"),val("t_rttvar")); 86330887Snp 87330887Snp 88330887Snp 89330887Snp 90330887Snp 91330887Snp 92330887Snp PR("TRANSMIT BUFFER:\n"); /* *************************** */ 93330887Snp PR(" snd_una %u, snd_nxt %u, snd_max %u, tx_max %u\n", 94330887Snp val("snd_una"),val("snd_nxt"), 95330887Snp val("snd_max"),val("tx_max")); 96330887Snp PR(" core_fin %u, tx_hdr_offset %u\n", 97330887Snp val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una")) 98330887Snp ); 99330887Snp if (val("recv_scale") && !val("active_open")) { 100330887Snp PR(" rcv_adv %-5u << %-2u == %u (recv_scaleflag %u rcv_scale %u active open %u)\n", 101330887Snp val("rcv_adv"), val("rcv_scale"), 102330887Snp val("rcv_adv") << val("rcv_scale"), 103330887Snp val("recv_scale"), val("rcv_scale"), val("active_open")); 104330887Snp } else { 105330887Snp PR(" rcv_adv %-5u (rcv_scale %-2u recv_scaleflag %u active_open %u)\n", 106330887Snp val("rcv_adv"), val("rcv_scale"), 107330887Snp val("recv_scale"), val("active_open")); 108330887Snp } 109330887Snp 110330887Snp PR(" snd_cwnd %-5u snd_ssthresh %u snd_rec %u\n", 111330887Snp val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec") 112330887Snp ); 113330887Snp 114330887Snp 115330887Snp 116330887Snp 117330887Snp PR(" cctrl: sel %s, ecn %u, ece %u, cwr %u, rfr %u\n", 118330887Snp spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")), 119330887Snp val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"), 120330887Snp val("cctrl_rfr")); 121330887Snp PR(" t_dupacks %u, dupack_count_odd %u, fast_recovery %u\n", 122330887Snp val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery")); 123330887Snp PR(" core_more %u, core_urg, %u core_push %u,", 124330887Snp val("core_more"),val("core_urg"),val("core_push")); 125330887Snp PR(" core_flush %u\n",val("core_flush")); 126330887Snp PR(" nagle %u, ssws_disable %u, turbo %u,", 127330887Snp val("nagle"), val("ssws_disabled"), val("turbo")); 128330887Snp PR(" tx_pdu_out %u\n",val("tx_pdu_out")); 129330887Snp PR(" tx_pace_auto %u, tx_pace_fixed %u, tx_queue %u", 130330887Snp val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue")); 131330887Snp 132330887Snp 133330887Snp PR(" tx_quiesce %u\n",val("tx_quiesce")); 134330887Snp PR(" tx_channel %u, tx_channel1 %u, tx_channel0 %u\n", 135330887Snp val("tx_channel"), 136330887Snp (val("tx_channel")>>1)&1, 137330887Snp val("tx_channel")&1 138330887Snp ); 139330887Snp 140330887Snp 141330887Snp 142330887Snp 143330887Snp PR(" tx_hdr_ptr 0x%-6x tx_last_ptr 0x%-6x tx_compact %u\n", 144330887Snp val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact")); 145330887Snp 146330887Snp 147330887Snp 148330887Snp 149330887Snp PR("RECEIVE BUFFER:\n"); /* *************************** */ 150330887Snp PR(" last_ack_sent %-10u rx_compact %u\n", 151330887Snp val("ts_last_ack_sent"),val("rx_compact")); 152330887Snp PR(" rcv_nxt %-10u hdr_off %-10u\n", 153330887Snp val("rcv_nxt"), val("rx_hdr_offset")); 154330887Snp PR(" frag0_idx %-10u length %-10u frag0_ptr 0x%-8x\n", 155330887Snp val("rx_frag0_start_idx"), 156330887Snp val("rx_frag0_len"), 157330887Snp val("rx_ptr")); 158330887Snp PR(" frag1_idx %-10u length %-10u ", 159330887Snp val("rx_frag1_start_idx_offset"), 160330887Snp val("rx_frag1_len")); 161330887Snp 162330887Snp 163330887Snp 164330887Snp 165330887Snp if (val("ulp_type")!=4) { /* RDMA has FRAG1 idx && len, but no ptr? Should I not display frag1 at all? */ 166330887Snp PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr")); 167330887Snp } else { 168330887Snp PR("\n"); 169330887Snp } 170330887Snp 171330887Snp 172330887Snp if (val("ulp_type") !=6 && val("ulp_type") != 5 && val("ulp_type") !=4) { 173330887Snp PR(" frag2_idx %-10u length %-10u frag2_ptr 0x%-8x\n", 174330887Snp val("rx_frag2_start_idx_offset"), 175330887Snp val("rx_frag2_len"), 176330887Snp val("rx_frag2_ptr")); 177330887Snp PR(" frag3_idx %-10u length %-10u frag3_ptr 0x%-8x\n", 178330887Snp val("rx_frag3_start_idx_offset"), 179330887Snp val("rx_frag3_len"), 180330887Snp val("rx_frag3_ptr")); 181330887Snp } 182330887Snp 183330887Snp 184330887Snp 185330887Snp 186330887Snp 187330887Snp 188330887Snp PR(" peer_fin %u, rx_pdu_out %u, pdu_len %u\n", 189330887Snp val("peer_fin"),val("rx_pdu_out"), val("pdu_len")); 190330887Snp 191330887Snp 192330887Snp 193330887Snp 194330887Snp if (val("recv_scale")) { 195330887Snp PR(" rcv_wnd %u >> snd_scale %u == %u, recv_scaleflag = %u\n", 196330887Snp val("rcv_wnd"), val("snd_scale"), 197330887Snp val("rcv_wnd") >> val("snd_scale"), 198330887Snp val("recv_scale")); 199330887Snp } else { 200330887Snp PR(" rcv_wnd %u. (snd_scale %u, recv_scaleflag = %u)\n", 201330887Snp val("rcv_wnd"), val("snd_scale"), 202330887Snp val("recv_scale")); 203330887Snp } 204330887Snp 205330887Snp 206330887Snp 207330887Snp 208330887Snp PR(" dack_mss %u dack %u, dack_not_acked: %u\n", 209330887Snp val("dack_mss"),val("dack"),val("dack_not_acked")); 210330887Snp PR(" rcv_coal %u rcv_co_psh %u rcv_co_last_psh %u heart %u\n", 211330887Snp val("rcv_coalesce_enable"), 212330887Snp val("rcv_coalesce_push"), 213330887Snp val("rcv_coalesce_last_psh"), 214330887Snp val("rcv_coalesce_heartbeat")); 215330887Snp 216330887Snp PR(" rx_channel %u rx_quiesce %u rx_flow_ctrl_dis %u,", 217330887Snp val("rx_channel"), val("rx_quiesce"), 218330887Snp val("rx_flow_control_disable")); 219330887Snp PR(" rx_flow_ctrl_ddp %u\n", 220330887Snp val("rx_flow_control_ddp")); 221330887Snp 222330887Snp 223330887Snp PR("MISCELANEOUS:\n"); /* *************************** */ 224330887Snp PR(" pend_ctl: 0x%1x, unused_flags: 0x%x, main_slush: 0x%x\n", 225330887Snp ((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) | 226330887Snp val("pend_ctl0")), 227330887Snp val("unused"),val("main_slush")); 228330887Snp PR(" Migrating %u, ask_mode %u, non_offload %u, rss_info %u\n", 229330887Snp val("migrating"), 230330887Snp val("ask_mode"), val("non_offload"), val("rss_info")); 231330887Snp PR(" ULP: ulp_type %u (%s), ulp_raw %u\n", 232330887Snp val("ulp_type"), spr_ulp_type(val("ulp_type")),val("ulp_raw")); 233330887Snp PR(" RDMA: error %u, flm_err %u\n", 234330887Snp val("rdma_error"), val("rdma_flm_error")); 235330887Snp 236330887Snp 237330887Snp} 238330887Snpvoid t4_display_tcb_aux_1 (_TCBVAR *tvp, int aux) 239330887Snp{ 240330887Snp 241330887Snp 242330887Snp 243330887Snp PR(" aux1_slush0: 0x%x aux1_slush1 0x%x\n", 244330887Snp val("aux1_slush0"), val("aux1_slush1")); 245330887Snp PR(" pdu_hdr_len %u\n",val("pdu_hdr_len")); 246330887Snp 247330887Snp 248330887Snp 249330887Snp} 250330887Snpvoid t4_display_tcb_aux_2 (_TCBVAR *tvp, int aux) 251330887Snp{ 252330887Snp 253330887Snp 254330887Snp 255330887Snp 256330887Snp PR(" qp_id %u, pd_id %u, stag %u\n", 257330887Snp val("qp_id"), val("pd_id"),val("stag")); 258330887Snp PR(" irs_ulp %u, iss_ulp %u\n", 259330887Snp val("irs_ulp"),val("iss_ulp")); 260330887Snp PR(" tx_pdu_len %u\n", 261330887Snp val("tx_pdu_len")); 262330887Snp PR(" cq_idx_sq %u, cq_idx_rq %u\n", 263330887Snp val("cq_idx_sq"),val("cq_idx_rq")); 264330887Snp PR(" rq_start %u, rq_MSN %u, rq_max_off %u, rq_write_ptr %u\n", 265330887Snp val("rq_start"),val("rq_msn"),val("rq_max_offset"), 266330887Snp val("rq_write_ptr")); 267330887Snp PR(" L_valid %u, rdmap opcode %u\n", 268330887Snp val("ord_l_bit_vld"),val("rdmap_opcode")); 269330887Snp PR(" tx_flush: %u, tx_oos_rxmt %u, tx_oos_txmt %u\n", 270330887Snp val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt")); 271330887Snp 272330887Snp 273330887Snp 274330887Snp 275330887Snp} 276330887Snpvoid t4_display_tcb_aux_3 (_TCBVAR *tvp, int aux) 277330887Snp{ 278330887Snp 279330887Snp 280330887Snp 281330887Snp 282330887Snp PR(" aux3_slush: 0x%x, unused: buf0 0x%x, buf1: 0x%x, main: 0x%x\n", 283330887Snp val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused"), 284330887Snp val("ddp_main_unused")); 285330887Snp 286330887Snp 287330887Snp 288330887Snp 289330887Snp 290330887Snp PR(" DDP: DDPOFF ActBuf IndOut WaitFrag Rx2Tx BufInf\n"); 291330887Snp PR(" %u %u %u %u %u %u\n", 292330887Snp val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"), 293330887Snp val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf") 294330887Snp ); 295330887Snp 296330887Snp 297330887Snp 298330887Snp 299330887Snp 300330887Snp PR(" Ind PshfEn PushDis Flush NoInvalidate\n"); 301330887Snp PR(" Buf0: %u %u %u %u %u\n", 302330887Snp val("ddp_buf0_indicate"), 303330887Snp val("ddp_pshf_enable_0"), val("ddp_push_disable_0"), 304330887Snp val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0") 305330887Snp ); 306330887Snp PR(" Buf1: %u %u %u %u %u\n", 307330887Snp val("ddp_buf1_indicate"), 308330887Snp val("ddp_pshf_enable_1"), val("ddp_push_disable_1"), 309330887Snp val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1") 310330887Snp ); 311330887Snp 312330887Snp 313330887Snp 314330887Snp 315330887Snp 316330887Snp 317330887Snp 318330887Snp 319330887Snp 320330887Snp 321330887Snp PR(" Valid Offset Length Tag\n"); 322330887Snp PR(" Buf0: %u 0x%6.6x 0x%6.6x 0x%8.8x", 323330887Snp val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"), 324330887Snp val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag") 325330887Snp 326330887Snp 327330887Snp ); 328330887Snp if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { 329330887Snp PR(" (Active)\n"); 330330887Snp } else { 331330887Snp PR(" (Inactive)\n"); 332330887Snp } 333330887Snp 334330887Snp 335330887Snp PR(" Buf1: %u 0x%6.6x 0x%6.6x 0x%8.8x", 336330887Snp val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"), 337330887Snp val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag") 338330887Snp 339330887Snp 340330887Snp ); 341330887Snp 342330887Snp 343330887Snp if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { 344330887Snp PR(" (Active)\n"); 345330887Snp } else { 346330887Snp PR(" (Inactive)\n"); 347330887Snp } 348330887Snp 349330887Snp 350330887Snp 351330887Snp 352330887Snp 353330887Snp 354330887Snp if (1==val("ddp_off")) { 355330887Snp PR(" DDP is off (which also disables indicate)\n"); 356330887Snp } else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { 357330887Snp PR(" Data being DDP'ed to buf 0, "); 358330887Snp PR("which has %u - %u = %u bytes of space left\n", 359330887Snp val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), 360330887Snp val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") 361330887Snp ); 362330887Snp if (1==val("ddp_buf1_valid")) { 363330887Snp PR(" And buf1, which is also valid, has %u - %u = %u bytes of space left\n", 364330887Snp val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), 365330887Snp val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") 366330887Snp ); 367330887Snp } 368330887Snp } else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { 369330887Snp PR(" Data being DDP'ed to buf 1, "); 370330887Snp PR("which has %u - %u = %u bytes of space left\n", 371330887Snp val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), 372330887Snp val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") 373330887Snp ); 374330887Snp if (1==val("ddp_buf0_valid")) { 375330887Snp PR(" And buf0, which is also valid, has %u - %u = %u bytes of space left\n", 376330887Snp val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), 377330887Snp val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") 378330887Snp ); 379330887Snp } 380330887Snp } else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) { 381330887Snp PR(" !!! Invalid DDP buf 1 valid, but buf 0 active.\n"); 382330887Snp } else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { 383330887Snp PR(" !!! Invalid DDP buf 0 valid, but buf 1 active.\n"); 384330887Snp } else { 385330887Snp PR(" DDP is enabled, but no buffers are active && valid.\n"); 386330887Snp 387330887Snp 388330887Snp 389330887Snp 390330887Snp if (0==val("ddp_indicate_out")) { 391330887Snp if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) { 392330887Snp PR(" 0 length Indicate buffers "); 393330887Snp if (0==val("rx_hdr_offset")) { 394330887Snp PR("will cause new data to be held in PMRX.\n"); 395330887Snp } else { 396330887Snp PR("is causing %u bytes to be held in PMRX\n", 397330887Snp val("rx_hdr_offset")); 398330887Snp } 399330887Snp } else { 400330887Snp PR(" Data being indicated to host\n"); 401330887Snp } 402330887Snp } else if (1==val("ddp_indicate_out")) { 403330887Snp PR(" Indicate is off, which "); 404330887Snp if (0==val("rx_hdr_offset")) { 405330887Snp PR("will cause new data to be held in PMRX.\n"); 406330887Snp } else { 407330887Snp PR("is causing %u bytes to be held in PMRX\n", 408330887Snp val("rx_hdr_offset")); 409330887Snp } 410330887Snp } 411330887Snp } 412330887Snp 413330887Snp 414330887Snp 415330887Snp 416330887Snp} 417