bhyvectl.c revision 330623
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: stable/11/usr.sbin/bhyvectl/bhyvectl.c 330623 2018-03-07 20:50:28Z jhb $ 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/11/usr.sbin/bhyvectl/bhyvectl.c 330623 2018-03-07 20:50:28Z jhb $"); 33 34#include <sys/param.h> 35#include <sys/types.h> 36#include <sys/sysctl.h> 37#include <sys/errno.h> 38#include <sys/mman.h> 39#include <sys/cpuset.h> 40 41#include <stdio.h> 42#include <stdlib.h> 43#include <stdbool.h> 44#include <string.h> 45#include <unistd.h> 46#include <libgen.h> 47#include <libutil.h> 48#include <fcntl.h> 49#include <getopt.h> 50#include <time.h> 51#include <assert.h> 52#include <libutil.h> 53 54#include <machine/cpufunc.h> 55#include <machine/specialreg.h> 56#include <machine/vmm.h> 57#include <machine/vmm_dev.h> 58#include <vmmapi.h> 59 60#include "amd/vmcb.h" 61#include "intel/vmcs.h" 62 63#define MB (1UL << 20) 64#define GB (1UL << 30) 65 66#define REQ_ARG required_argument 67#define NO_ARG no_argument 68#define OPT_ARG optional_argument 69 70static const char *progname; 71 72static void 73usage(bool cpu_intel) 74{ 75 76 (void)fprintf(stderr, 77 "Usage: %s --vm=<vmname>\n" 78 " [--cpu=<vcpu_number>]\n" 79 " [--create]\n" 80 " [--destroy]\n" 81 " [--get-all]\n" 82 " [--get-stats]\n" 83 " [--set-desc-ds]\n" 84 " [--get-desc-ds]\n" 85 " [--set-desc-es]\n" 86 " [--get-desc-es]\n" 87 " [--set-desc-gs]\n" 88 " [--get-desc-gs]\n" 89 " [--set-desc-fs]\n" 90 " [--get-desc-fs]\n" 91 " [--set-desc-cs]\n" 92 " [--get-desc-cs]\n" 93 " [--set-desc-ss]\n" 94 " [--get-desc-ss]\n" 95 " [--set-desc-tr]\n" 96 " [--get-desc-tr]\n" 97 " [--set-desc-ldtr]\n" 98 " [--get-desc-ldtr]\n" 99 " [--set-desc-gdtr]\n" 100 " [--get-desc-gdtr]\n" 101 " [--set-desc-idtr]\n" 102 " [--get-desc-idtr]\n" 103 " [--run]\n" 104 " [--capname=<capname>]\n" 105 " [--getcap]\n" 106 " [--setcap=<0|1>]\n" 107 " [--desc-base=<BASE>]\n" 108 " [--desc-limit=<LIMIT>]\n" 109 " [--desc-access=<ACCESS>]\n" 110 " [--set-cr0=<CR0>]\n" 111 " [--get-cr0]\n" 112 " [--set-cr3=<CR3>]\n" 113 " [--get-cr3]\n" 114 " [--set-cr4=<CR4>]\n" 115 " [--get-cr4]\n" 116 " [--set-dr0=<DR0>]\n" 117 " [--get-dr0]\n" 118 " [--set-dr1=<DR1>]\n" 119 " [--get-dr1]\n" 120 " [--set-dr2=<DR2>]\n" 121 " [--get-dr2]\n" 122 " [--set-dr3=<DR3>]\n" 123 " [--get-dr3]\n" 124 " [--set-dr6=<DR6>]\n" 125 " [--get-dr6]\n" 126 " [--set-dr7=<DR7>]\n" 127 " [--get-dr7]\n" 128 " [--set-rsp=<RSP>]\n" 129 " [--get-rsp]\n" 130 " [--set-rip=<RIP>]\n" 131 " [--get-rip]\n" 132 " [--get-rax]\n" 133 " [--set-rax=<RAX>]\n" 134 " [--get-rbx]\n" 135 " [--get-rcx]\n" 136 " [--get-rdx]\n" 137 " [--get-rsi]\n" 138 " [--get-rdi]\n" 139 " [--get-rbp]\n" 140 " [--get-r8]\n" 141 " [--get-r9]\n" 142 " [--get-r10]\n" 143 " [--get-r11]\n" 144 " [--get-r12]\n" 145 " [--get-r13]\n" 146 " [--get-r14]\n" 147 " [--get-r15]\n" 148 " [--set-rflags=<RFLAGS>]\n" 149 " [--get-rflags]\n" 150 " [--set-cs]\n" 151 " [--get-cs]\n" 152 " [--set-ds]\n" 153 " [--get-ds]\n" 154 " [--set-es]\n" 155 " [--get-es]\n" 156 " [--set-fs]\n" 157 " [--get-fs]\n" 158 " [--set-gs]\n" 159 " [--get-gs]\n" 160 " [--set-ss]\n" 161 " [--get-ss]\n" 162 " [--get-tr]\n" 163 " [--get-ldtr]\n" 164 " [--set-x2apic-state=<state>]\n" 165 " [--get-x2apic-state]\n" 166 " [--unassign-pptdev=<bus/slot/func>]\n" 167 " [--set-mem=<memory in units of MB>]\n" 168 " [--get-lowmem]\n" 169 " [--get-highmem]\n" 170 " [--get-gpa-pmap]\n" 171 " [--assert-lapic-lvt=<pin>]\n" 172 " [--inject-nmi]\n" 173 " [--force-reset]\n" 174 " [--force-poweroff]\n" 175 " [--get-rtc-time]\n" 176 " [--set-rtc-time=<secs>]\n" 177 " [--get-rtc-nvram]\n" 178 " [--set-rtc-nvram=<val>]\n" 179 " [--rtc-nvram-offset=<offset>]\n" 180 " [--get-active-cpus]\n" 181 " [--get-suspended-cpus]\n" 182 " [--get-intinfo]\n" 183 " [--get-eptp]\n" 184 " [--set-exception-bitmap]\n" 185 " [--get-exception-bitmap]\n" 186 " [--get-tsc-offset]\n" 187 " [--get-guest-pat]\n" 188 " [--get-io-bitmap-address]\n" 189 " [--get-msr-bitmap]\n" 190 " [--get-msr-bitmap-address]\n" 191 " [--get-guest-sysenter]\n" 192 " [--get-exit-reason]\n", 193 progname); 194 195 if (cpu_intel) { 196 (void)fprintf(stderr, 197 " [--get-vmcs-pinbased-ctls]\n" 198 " [--get-vmcs-procbased-ctls]\n" 199 " [--get-vmcs-procbased-ctls2]\n" 200 " [--get-vmcs-entry-interruption-info]\n" 201 " [--set-vmcs-entry-interruption-info=<info>]\n" 202 " [--get-vmcs-guest-physical-address\n" 203 " [--get-vmcs-guest-linear-address\n" 204 " [--get-vmcs-host-pat]\n" 205 " [--get-vmcs-host-cr0]\n" 206 " [--get-vmcs-host-cr3]\n" 207 " [--get-vmcs-host-cr4]\n" 208 " [--get-vmcs-host-rip]\n" 209 " [--get-vmcs-host-rsp]\n" 210 " [--get-vmcs-cr0-mask]\n" 211 " [--get-vmcs-cr0-shadow]\n" 212 " [--get-vmcs-cr4-mask]\n" 213 " [--get-vmcs-cr4-shadow]\n" 214 " [--get-vmcs-cr3-targets]\n" 215 " [--get-vmcs-apic-access-address]\n" 216 " [--get-vmcs-virtual-apic-address]\n" 217 " [--get-vmcs-tpr-threshold]\n" 218 " [--get-vmcs-vpid]\n" 219 " [--get-vmcs-instruction-error]\n" 220 " [--get-vmcs-exit-ctls]\n" 221 " [--get-vmcs-entry-ctls]\n" 222 " [--get-vmcs-link]\n" 223 " [--get-vmcs-exit-qualification]\n" 224 " [--get-vmcs-exit-interruption-info]\n" 225 " [--get-vmcs-exit-interruption-error]\n" 226 " [--get-vmcs-interruptibility]\n" 227 ); 228 } else { 229 (void)fprintf(stderr, 230 " [--get-vmcb-intercepts]\n" 231 " [--get-vmcb-asid]\n" 232 " [--get-vmcb-exit-details]\n" 233 " [--get-vmcb-tlb-ctrl]\n" 234 " [--get-vmcb-virq]\n" 235 " [--get-avic-apic-bar]\n" 236 " [--get-avic-backing-page]\n" 237 " [--get-avic-table]\n" 238 ); 239 } 240 exit(1); 241} 242 243static int get_rtc_time, set_rtc_time; 244static int get_rtc_nvram, set_rtc_nvram; 245static int rtc_nvram_offset; 246static uint8_t rtc_nvram_value; 247static time_t rtc_secs; 248 249static int get_stats, getcap, setcap, capval, get_gpa_pmap; 250static int inject_nmi, assert_lapic_lvt; 251static int force_reset, force_poweroff; 252static const char *capname; 253static int create, destroy, get_memmap, get_memseg; 254static int get_intinfo; 255static int get_active_cpus, get_suspended_cpus; 256static uint64_t memsize; 257static int set_cr0, get_cr0, set_cr3, get_cr3, set_cr4, get_cr4; 258static int set_efer, get_efer; 259static int set_dr0, get_dr0; 260static int set_dr1, get_dr1; 261static int set_dr2, get_dr2; 262static int set_dr3, get_dr3; 263static int set_dr6, get_dr6; 264static int set_dr7, get_dr7; 265static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags; 266static int set_rax, get_rax; 267static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp; 268static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15; 269static int set_desc_ds, get_desc_ds; 270static int set_desc_es, get_desc_es; 271static int set_desc_fs, get_desc_fs; 272static int set_desc_gs, get_desc_gs; 273static int set_desc_cs, get_desc_cs; 274static int set_desc_ss, get_desc_ss; 275static int set_desc_gdtr, get_desc_gdtr; 276static int set_desc_idtr, get_desc_idtr; 277static int set_desc_tr, get_desc_tr; 278static int set_desc_ldtr, get_desc_ldtr; 279static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr; 280static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr; 281static int set_x2apic_state, get_x2apic_state; 282enum x2apic_state x2apic_state; 283static int unassign_pptdev, bus, slot, func; 284static int run; 285 286/* 287 * VMCB specific. 288 */ 289static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl; 290static int get_vmcb_virq, get_avic_table; 291 292/* 293 * VMCS-specific fields 294 */ 295static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2; 296static int get_eptp, get_io_bitmap, get_tsc_offset; 297static int get_vmcs_entry_interruption_info, set_vmcs_entry_interruption_info; 298static int get_vmcs_interruptibility; 299uint32_t vmcs_entry_interruption_info; 300static int get_vmcs_gpa, get_vmcs_gla; 301static int get_exception_bitmap, set_exception_bitmap, exception_bitmap; 302static int get_cr0_mask, get_cr0_shadow; 303static int get_cr4_mask, get_cr4_shadow; 304static int get_cr3_targets; 305static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold; 306static int get_msr_bitmap, get_msr_bitmap_address; 307static int get_vpid_asid; 308static int get_inst_err, get_exit_ctls, get_entry_ctls; 309static int get_host_cr0, get_host_cr3, get_host_cr4; 310static int get_host_rip, get_host_rsp; 311static int get_guest_pat, get_host_pat; 312static int get_guest_sysenter, get_vmcs_link; 313static int get_exit_reason, get_vmcs_exit_qualification; 314static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error; 315static int get_vmcs_exit_inst_length; 316 317static uint64_t desc_base; 318static uint32_t desc_limit, desc_access; 319 320static int get_all; 321 322static void 323dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu) 324{ 325 printf("vm exit[%d]\n", vcpu); 326 printf("\trip\t\t0x%016lx\n", vmexit->rip); 327 printf("\tinst_length\t%d\n", vmexit->inst_length); 328 switch (vmexit->exitcode) { 329 case VM_EXITCODE_INOUT: 330 printf("\treason\t\tINOUT\n"); 331 printf("\tdirection\t%s\n", vmexit->u.inout.in ? "IN" : "OUT"); 332 printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes); 333 printf("\tflags\t\t%s%s\n", 334 vmexit->u.inout.string ? "STRING " : "", 335 vmexit->u.inout.rep ? "REP " : ""); 336 printf("\tport\t\t0x%04x\n", vmexit->u.inout.port); 337 printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax); 338 break; 339 case VM_EXITCODE_VMX: 340 printf("\treason\t\tVMX\n"); 341 printf("\tstatus\t\t%d\n", vmexit->u.vmx.status); 342 printf("\texit_reason\t0x%08x (%u)\n", 343 vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason); 344 printf("\tqualification\t0x%016lx\n", 345 vmexit->u.vmx.exit_qualification); 346 printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type); 347 printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error); 348 break; 349 case VM_EXITCODE_SVM: 350 printf("\treason\t\tSVM\n"); 351 printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode); 352 printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1); 353 printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2); 354 break; 355 default: 356 printf("*** unknown vm run exitcode %d\n", vmexit->exitcode); 357 break; 358 } 359} 360 361/* AMD 6th generation and Intel compatible MSRs */ 362#define MSR_AMD6TH_START 0xC0000000 363#define MSR_AMD6TH_END 0xC0001FFF 364/* AMD 7th and 8th generation compatible MSRs */ 365#define MSR_AMD7TH_START 0xC0010000 366#define MSR_AMD7TH_END 0xC0011FFF 367 368static const char * 369msr_name(uint32_t msr) 370{ 371 static char buf[32]; 372 373 switch(msr) { 374 case MSR_TSC: 375 return ("MSR_TSC"); 376 case MSR_EFER: 377 return ("MSR_EFER"); 378 case MSR_STAR: 379 return ("MSR_STAR"); 380 case MSR_LSTAR: 381 return ("MSR_LSTAR"); 382 case MSR_CSTAR: 383 return ("MSR_CSTAR"); 384 case MSR_SF_MASK: 385 return ("MSR_SF_MASK"); 386 case MSR_FSBASE: 387 return ("MSR_FSBASE"); 388 case MSR_GSBASE: 389 return ("MSR_GSBASE"); 390 case MSR_KGSBASE: 391 return ("MSR_KGSBASE"); 392 case MSR_SYSENTER_CS_MSR: 393 return ("MSR_SYSENTER_CS_MSR"); 394 case MSR_SYSENTER_ESP_MSR: 395 return ("MSR_SYSENTER_ESP_MSR"); 396 case MSR_SYSENTER_EIP_MSR: 397 return ("MSR_SYSENTER_EIP_MSR"); 398 case MSR_PAT: 399 return ("MSR_PAT"); 400 } 401 snprintf(buf, sizeof(buf), "MSR %#08x", msr); 402 403 return (buf); 404} 405 406static inline void 407print_msr_pm(uint64_t msr, int vcpu, int readable, int writeable) 408{ 409 410 if (readable || writeable) { 411 printf("%-20s[%d]\t\t%c%c\n", msr_name(msr), vcpu, 412 readable ? 'R' : '-', writeable ? 'W' : '-'); 413 } 414} 415 416/* 417 * Reference APM vol2, section 15.11 MSR Intercepts. 418 */ 419static void 420dump_amd_msr_pm(const char *bitmap, int vcpu) 421{ 422 int byte, bit, readable, writeable; 423 uint32_t msr; 424 425 for (msr = 0; msr < 0x2000; msr++) { 426 byte = msr / 4; 427 bit = (msr % 4) * 2; 428 429 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */ 430 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 431 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 432 print_msr_pm(msr, vcpu, readable, writeable); 433 434 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */ 435 byte += 2048; 436 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 437 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 438 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable, 439 writeable); 440 441 /* MSR 0xC0010000 to 0xC0011FF is only for AMD */ 442 byte += 4096; 443 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 444 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 445 print_msr_pm(msr + MSR_AMD7TH_START, vcpu, readable, 446 writeable); 447 } 448} 449 450/* 451 * Reference Intel SDM Vol3 Section 24.6.9 MSR-Bitmap Address 452 */ 453static void 454dump_intel_msr_pm(const char *bitmap, int vcpu) 455{ 456 int byte, bit, readable, writeable; 457 uint32_t msr; 458 459 for (msr = 0; msr < 0x2000; msr++) { 460 byte = msr / 8; 461 bit = msr & 0x7; 462 463 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */ 464 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 465 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1; 466 print_msr_pm(msr, vcpu, readable, writeable); 467 468 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */ 469 byte += 1024; 470 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 471 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1; 472 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable, 473 writeable); 474 } 475} 476 477static int 478dump_msr_bitmap(int vcpu, uint64_t addr, bool cpu_intel) 479{ 480 int error, fd, map_size; 481 const char *bitmap; 482 483 error = -1; 484 bitmap = MAP_FAILED; 485 486 fd = open("/dev/mem", O_RDONLY, 0); 487 if (fd < 0) { 488 perror("Couldn't open /dev/mem"); 489 goto done; 490 } 491 492 if (cpu_intel) 493 map_size = PAGE_SIZE; 494 else 495 map_size = 2 * PAGE_SIZE; 496 497 bitmap = mmap(NULL, map_size, PROT_READ, MAP_SHARED, fd, addr); 498 if (bitmap == MAP_FAILED) { 499 perror("mmap failed"); 500 goto done; 501 } 502 503 if (cpu_intel) 504 dump_intel_msr_pm(bitmap, vcpu); 505 else 506 dump_amd_msr_pm(bitmap, vcpu); 507 508 error = 0; 509done: 510 if (bitmap != MAP_FAILED) 511 munmap((void *)bitmap, map_size); 512 if (fd >= 0) 513 close(fd); 514 515 return (error); 516} 517 518static int 519vm_get_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t *ret_val) 520{ 521 522 return (vm_get_register(ctx, vcpu, VMCS_IDENT(field), ret_val)); 523} 524 525static int 526vm_set_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t val) 527{ 528 529 return (vm_set_register(ctx, vcpu, VMCS_IDENT(field), val)); 530} 531 532static int 533vm_get_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 534 uint64_t *ret_val) 535{ 536 537 return (vm_get_register(ctx, vcpu, VMCB_ACCESS(off, bytes), ret_val)); 538} 539 540static int 541vm_set_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 542 uint64_t val) 543{ 544 545 return (vm_set_register(ctx, vcpu, VMCB_ACCESS(off, bytes), val)); 546} 547 548enum { 549 VMNAME = 1000, /* avoid collision with return values from getopt */ 550 VCPU, 551 SET_MEM, 552 SET_EFER, 553 SET_CR0, 554 SET_CR3, 555 SET_CR4, 556 SET_DR0, 557 SET_DR1, 558 SET_DR2, 559 SET_DR3, 560 SET_DR6, 561 SET_DR7, 562 SET_RSP, 563 SET_RIP, 564 SET_RAX, 565 SET_RFLAGS, 566 DESC_BASE, 567 DESC_LIMIT, 568 DESC_ACCESS, 569 SET_CS, 570 SET_DS, 571 SET_ES, 572 SET_FS, 573 SET_GS, 574 SET_SS, 575 SET_TR, 576 SET_LDTR, 577 SET_X2APIC_STATE, 578 SET_EXCEPTION_BITMAP, 579 SET_VMCS_ENTRY_INTERRUPTION_INFO, 580 SET_CAP, 581 CAPNAME, 582 UNASSIGN_PPTDEV, 583 GET_GPA_PMAP, 584 ASSERT_LAPIC_LVT, 585 SET_RTC_TIME, 586 SET_RTC_NVRAM, 587 RTC_NVRAM_OFFSET, 588}; 589 590static void 591print_cpus(const char *banner, const cpuset_t *cpus) 592{ 593 int i, first; 594 595 first = 1; 596 printf("%s:\t", banner); 597 if (!CPU_EMPTY(cpus)) { 598 for (i = 0; i < CPU_SETSIZE; i++) { 599 if (CPU_ISSET(i, cpus)) { 600 printf("%s%d", first ? " " : ", ", i); 601 first = 0; 602 } 603 } 604 } else 605 printf(" (none)"); 606 printf("\n"); 607} 608 609static void 610print_intinfo(const char *banner, uint64_t info) 611{ 612 int type; 613 614 printf("%s:\t", banner); 615 if (info & VM_INTINFO_VALID) { 616 type = info & VM_INTINFO_TYPE; 617 switch (type) { 618 case VM_INTINFO_HWINTR: 619 printf("extint"); 620 break; 621 case VM_INTINFO_NMI: 622 printf("nmi"); 623 break; 624 case VM_INTINFO_SWINTR: 625 printf("swint"); 626 break; 627 default: 628 printf("exception"); 629 break; 630 } 631 printf(" vector %d", (int)VM_INTINFO_VECTOR(info)); 632 if (info & VM_INTINFO_DEL_ERRCODE) 633 printf(" errcode %#x", (u_int)(info >> 32)); 634 } else { 635 printf("n/a"); 636 } 637 printf("\n"); 638} 639 640static bool 641cpu_vendor_intel(void) 642{ 643 u_int regs[4]; 644 char cpu_vendor[13]; 645 646 do_cpuid(0, regs); 647 ((u_int *)&cpu_vendor)[0] = regs[1]; 648 ((u_int *)&cpu_vendor)[1] = regs[3]; 649 ((u_int *)&cpu_vendor)[2] = regs[2]; 650 cpu_vendor[12] = '\0'; 651 652 if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { 653 return (false); 654 } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) { 655 return (true); 656 } else { 657 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor); 658 exit(1); 659 } 660} 661 662static int 663get_all_registers(struct vmctx *ctx, int vcpu) 664{ 665 uint64_t cr0, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 666 uint64_t rsp, rip, rflags, efer; 667 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp; 668 uint64_t r8, r9, r10, r11, r12, r13, r14, r15; 669 int error = 0; 670 671 if (!error && (get_efer || get_all)) { 672 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_EFER, &efer); 673 if (error == 0) 674 printf("efer[%d]\t\t0x%016lx\n", vcpu, efer); 675 } 676 677 if (!error && (get_cr0 || get_all)) { 678 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR0, &cr0); 679 if (error == 0) 680 printf("cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 681 } 682 683 if (!error && (get_cr3 || get_all)) { 684 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR3, &cr3); 685 if (error == 0) 686 printf("cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 687 } 688 689 if (!error && (get_cr4 || get_all)) { 690 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR4, &cr4); 691 if (error == 0) 692 printf("cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 693 } 694 695 if (!error && (get_dr0 || get_all)) { 696 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR0, &dr0); 697 if (error == 0) 698 printf("dr0[%d]\t\t0x%016lx\n", vcpu, dr0); 699 } 700 701 if (!error && (get_dr1 || get_all)) { 702 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR1, &dr1); 703 if (error == 0) 704 printf("dr1[%d]\t\t0x%016lx\n", vcpu, dr1); 705 } 706 707 if (!error && (get_dr2 || get_all)) { 708 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR2, &dr2); 709 if (error == 0) 710 printf("dr2[%d]\t\t0x%016lx\n", vcpu, dr2); 711 } 712 713 if (!error && (get_dr3 || get_all)) { 714 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR3, &dr3); 715 if (error == 0) 716 printf("dr3[%d]\t\t0x%016lx\n", vcpu, dr3); 717 } 718 719 if (!error && (get_dr6 || get_all)) { 720 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR6, &dr6); 721 if (error == 0) 722 printf("dr6[%d]\t\t0x%016lx\n", vcpu, dr6); 723 } 724 725 if (!error && (get_dr7 || get_all)) { 726 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR7, &dr7); 727 if (error == 0) 728 printf("dr7[%d]\t\t0x%016lx\n", vcpu, dr7); 729 } 730 731 if (!error && (get_rsp || get_all)) { 732 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSP, &rsp); 733 if (error == 0) 734 printf("rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 735 } 736 737 if (!error && (get_rip || get_all)) { 738 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RIP, &rip); 739 if (error == 0) 740 printf("rip[%d]\t\t0x%016lx\n", vcpu, rip); 741 } 742 743 if (!error && (get_rax || get_all)) { 744 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RAX, &rax); 745 if (error == 0) 746 printf("rax[%d]\t\t0x%016lx\n", vcpu, rax); 747 } 748 749 if (!error && (get_rbx || get_all)) { 750 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBX, &rbx); 751 if (error == 0) 752 printf("rbx[%d]\t\t0x%016lx\n", vcpu, rbx); 753 } 754 755 if (!error && (get_rcx || get_all)) { 756 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RCX, &rcx); 757 if (error == 0) 758 printf("rcx[%d]\t\t0x%016lx\n", vcpu, rcx); 759 } 760 761 if (!error && (get_rdx || get_all)) { 762 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDX, &rdx); 763 if (error == 0) 764 printf("rdx[%d]\t\t0x%016lx\n", vcpu, rdx); 765 } 766 767 if (!error && (get_rsi || get_all)) { 768 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSI, &rsi); 769 if (error == 0) 770 printf("rsi[%d]\t\t0x%016lx\n", vcpu, rsi); 771 } 772 773 if (!error && (get_rdi || get_all)) { 774 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDI, &rdi); 775 if (error == 0) 776 printf("rdi[%d]\t\t0x%016lx\n", vcpu, rdi); 777 } 778 779 if (!error && (get_rbp || get_all)) { 780 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBP, &rbp); 781 if (error == 0) 782 printf("rbp[%d]\t\t0x%016lx\n", vcpu, rbp); 783 } 784 785 if (!error && (get_r8 || get_all)) { 786 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R8, &r8); 787 if (error == 0) 788 printf("r8[%d]\t\t0x%016lx\n", vcpu, r8); 789 } 790 791 if (!error && (get_r9 || get_all)) { 792 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R9, &r9); 793 if (error == 0) 794 printf("r9[%d]\t\t0x%016lx\n", vcpu, r9); 795 } 796 797 if (!error && (get_r10 || get_all)) { 798 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R10, &r10); 799 if (error == 0) 800 printf("r10[%d]\t\t0x%016lx\n", vcpu, r10); 801 } 802 803 if (!error && (get_r11 || get_all)) { 804 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R11, &r11); 805 if (error == 0) 806 printf("r11[%d]\t\t0x%016lx\n", vcpu, r11); 807 } 808 809 if (!error && (get_r12 || get_all)) { 810 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R12, &r12); 811 if (error == 0) 812 printf("r12[%d]\t\t0x%016lx\n", vcpu, r12); 813 } 814 815 if (!error && (get_r13 || get_all)) { 816 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R13, &r13); 817 if (error == 0) 818 printf("r13[%d]\t\t0x%016lx\n", vcpu, r13); 819 } 820 821 if (!error && (get_r14 || get_all)) { 822 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R14, &r14); 823 if (error == 0) 824 printf("r14[%d]\t\t0x%016lx\n", vcpu, r14); 825 } 826 827 if (!error && (get_r15 || get_all)) { 828 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R15, &r15); 829 if (error == 0) 830 printf("r15[%d]\t\t0x%016lx\n", vcpu, r15); 831 } 832 833 if (!error && (get_rflags || get_all)) { 834 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 835 &rflags); 836 if (error == 0) 837 printf("rflags[%d]\t0x%016lx\n", vcpu, rflags); 838 } 839 840 return (error); 841} 842 843static int 844get_all_segments(struct vmctx *ctx, int vcpu) 845{ 846 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 847 int error = 0; 848 849 if (!error && (get_desc_ds || get_all)) { 850 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_DS, 851 &desc_base, &desc_limit, &desc_access); 852 if (error == 0) { 853 printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 854 vcpu, desc_base, desc_limit, desc_access); 855 } 856 } 857 858 if (!error && (get_desc_es || get_all)) { 859 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_ES, 860 &desc_base, &desc_limit, &desc_access); 861 if (error == 0) { 862 printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 863 vcpu, desc_base, desc_limit, desc_access); 864 } 865 } 866 867 if (!error && (get_desc_fs || get_all)) { 868 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_FS, 869 &desc_base, &desc_limit, &desc_access); 870 if (error == 0) { 871 printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 872 vcpu, desc_base, desc_limit, desc_access); 873 } 874 } 875 876 if (!error && (get_desc_gs || get_all)) { 877 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GS, 878 &desc_base, &desc_limit, &desc_access); 879 if (error == 0) { 880 printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 881 vcpu, desc_base, desc_limit, desc_access); 882 } 883 } 884 885 if (!error && (get_desc_ss || get_all)) { 886 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS, 887 &desc_base, &desc_limit, &desc_access); 888 if (error == 0) { 889 printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 890 vcpu, desc_base, desc_limit, desc_access); 891 } 892 } 893 894 if (!error && (get_desc_cs || get_all)) { 895 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_CS, 896 &desc_base, &desc_limit, &desc_access); 897 if (error == 0) { 898 printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 899 vcpu, desc_base, desc_limit, desc_access); 900 } 901 } 902 903 if (!error && (get_desc_tr || get_all)) { 904 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR, 905 &desc_base, &desc_limit, &desc_access); 906 if (error == 0) { 907 printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 908 vcpu, desc_base, desc_limit, desc_access); 909 } 910 } 911 912 if (!error && (get_desc_ldtr || get_all)) { 913 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 914 &desc_base, &desc_limit, &desc_access); 915 if (error == 0) { 916 printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 917 vcpu, desc_base, desc_limit, desc_access); 918 } 919 } 920 921 if (!error && (get_desc_gdtr || get_all)) { 922 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 923 &desc_base, &desc_limit, &desc_access); 924 if (error == 0) { 925 printf("gdtr[%d]\t\t0x%016lx/0x%08x\n", 926 vcpu, desc_base, desc_limit); 927 } 928 } 929 930 if (!error && (get_desc_idtr || get_all)) { 931 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 932 &desc_base, &desc_limit, &desc_access); 933 if (error == 0) { 934 printf("idtr[%d]\t\t0x%016lx/0x%08x\n", 935 vcpu, desc_base, desc_limit); 936 } 937 } 938 939 if (!error && (get_cs || get_all)) { 940 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CS, &cs); 941 if (error == 0) 942 printf("cs[%d]\t\t0x%04lx\n", vcpu, cs); 943 } 944 945 if (!error && (get_ds || get_all)) { 946 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DS, &ds); 947 if (error == 0) 948 printf("ds[%d]\t\t0x%04lx\n", vcpu, ds); 949 } 950 951 if (!error && (get_es || get_all)) { 952 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_ES, &es); 953 if (error == 0) 954 printf("es[%d]\t\t0x%04lx\n", vcpu, es); 955 } 956 957 if (!error && (get_fs || get_all)) { 958 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_FS, &fs); 959 if (error == 0) 960 printf("fs[%d]\t\t0x%04lx\n", vcpu, fs); 961 } 962 963 if (!error && (get_gs || get_all)) { 964 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_GS, &gs); 965 if (error == 0) 966 printf("gs[%d]\t\t0x%04lx\n", vcpu, gs); 967 } 968 969 if (!error && (get_ss || get_all)) { 970 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_SS, &ss); 971 if (error == 0) 972 printf("ss[%d]\t\t0x%04lx\n", vcpu, ss); 973 } 974 975 if (!error && (get_tr || get_all)) { 976 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_TR, &tr); 977 if (error == 0) 978 printf("tr[%d]\t\t0x%04lx\n", vcpu, tr); 979 } 980 981 if (!error && (get_ldtr || get_all)) { 982 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_LDTR, &ldtr); 983 if (error == 0) 984 printf("ldtr[%d]\t\t0x%04lx\n", vcpu, ldtr); 985 } 986 987 return (error); 988} 989 990static int 991get_misc_vmcs(struct vmctx *ctx, int vcpu) 992{ 993 uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64; 994 int error = 0; 995 996 if (!error && (get_cr0_mask || get_all)) { 997 uint64_t cr0mask; 998 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_MASK, &cr0mask); 999 if (error == 0) 1000 printf("cr0_mask[%d]\t\t0x%016lx\n", vcpu, cr0mask); 1001 } 1002 1003 if (!error && (get_cr0_shadow || get_all)) { 1004 uint64_t cr0shadow; 1005 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_SHADOW, 1006 &cr0shadow); 1007 if (error == 0) 1008 printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpu, cr0shadow); 1009 } 1010 1011 if (!error && (get_cr4_mask || get_all)) { 1012 uint64_t cr4mask; 1013 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_MASK, &cr4mask); 1014 if (error == 0) 1015 printf("cr4_mask[%d]\t\t0x%016lx\n", vcpu, cr4mask); 1016 } 1017 1018 if (!error && (get_cr4_shadow || get_all)) { 1019 uint64_t cr4shadow; 1020 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_SHADOW, 1021 &cr4shadow); 1022 if (error == 0) 1023 printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpu, cr4shadow); 1024 } 1025 1026 if (!error && (get_cr3_targets || get_all)) { 1027 uint64_t target_count, target_addr; 1028 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET_COUNT, 1029 &target_count); 1030 if (error == 0) { 1031 printf("cr3_target_count[%d]\t0x%016lx\n", 1032 vcpu, target_count); 1033 } 1034 1035 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET0, 1036 &target_addr); 1037 if (error == 0) { 1038 printf("cr3_target0[%d]\t\t0x%016lx\n", 1039 vcpu, target_addr); 1040 } 1041 1042 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET1, 1043 &target_addr); 1044 if (error == 0) { 1045 printf("cr3_target1[%d]\t\t0x%016lx\n", 1046 vcpu, target_addr); 1047 } 1048 1049 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET2, 1050 &target_addr); 1051 if (error == 0) { 1052 printf("cr3_target2[%d]\t\t0x%016lx\n", 1053 vcpu, target_addr); 1054 } 1055 1056 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET3, 1057 &target_addr); 1058 if (error == 0) { 1059 printf("cr3_target3[%d]\t\t0x%016lx\n", 1060 vcpu, target_addr); 1061 } 1062 } 1063 1064 if (!error && (get_pinbased_ctls || get_all)) { 1065 error = vm_get_vmcs_field(ctx, vcpu, VMCS_PIN_BASED_CTLS, &ctl); 1066 if (error == 0) 1067 printf("pinbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 1068 } 1069 1070 if (!error && (get_procbased_ctls || get_all)) { 1071 error = vm_get_vmcs_field(ctx, vcpu, 1072 VMCS_PRI_PROC_BASED_CTLS, &ctl); 1073 if (error == 0) 1074 printf("procbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 1075 } 1076 1077 if (!error && (get_procbased_ctls2 || get_all)) { 1078 error = vm_get_vmcs_field(ctx, vcpu, 1079 VMCS_SEC_PROC_BASED_CTLS, &ctl); 1080 if (error == 0) 1081 printf("procbased_ctls2[%d]\t0x%016lx\n", vcpu, ctl); 1082 } 1083 1084 if (!error && (get_vmcs_gla || get_all)) { 1085 error = vm_get_vmcs_field(ctx, vcpu, 1086 VMCS_GUEST_LINEAR_ADDRESS, &u64); 1087 if (error == 0) 1088 printf("gla[%d]\t\t0x%016lx\n", vcpu, u64); 1089 } 1090 1091 if (!error && (get_vmcs_gpa || get_all)) { 1092 error = vm_get_vmcs_field(ctx, vcpu, 1093 VMCS_GUEST_PHYSICAL_ADDRESS, &u64); 1094 if (error == 0) 1095 printf("gpa[%d]\t\t0x%016lx\n", vcpu, u64); 1096 } 1097 1098 if (!error && (get_vmcs_entry_interruption_info || 1099 get_all)) { 1100 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,&u64); 1101 if (error == 0) { 1102 printf("entry_interruption_info[%d]\t0x%016lx\n", 1103 vcpu, u64); 1104 } 1105 } 1106 1107 if (!error && (get_tpr_threshold || get_all)) { 1108 uint64_t threshold; 1109 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TPR_THRESHOLD, 1110 &threshold); 1111 if (error == 0) 1112 printf("tpr_threshold[%d]\t0x%016lx\n", vcpu, threshold); 1113 } 1114 1115 if (!error && (get_inst_err || get_all)) { 1116 uint64_t insterr; 1117 error = vm_get_vmcs_field(ctx, vcpu, VMCS_INSTRUCTION_ERROR, 1118 &insterr); 1119 if (error == 0) { 1120 printf("instruction_error[%d]\t0x%016lx\n", 1121 vcpu, insterr); 1122 } 1123 } 1124 1125 if (!error && (get_exit_ctls || get_all)) { 1126 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_CTLS, &ctl); 1127 if (error == 0) 1128 printf("exit_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1129 } 1130 1131 if (!error && (get_entry_ctls || get_all)) { 1132 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_CTLS, &ctl); 1133 if (error == 0) 1134 printf("entry_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1135 } 1136 1137 if (!error && (get_host_pat || get_all)) { 1138 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_IA32_PAT, &pat); 1139 if (error == 0) 1140 printf("host_pat[%d]\t\t0x%016lx\n", vcpu, pat); 1141 } 1142 1143 if (!error && (get_host_cr0 || get_all)) { 1144 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR0, &cr0); 1145 if (error == 0) 1146 printf("host_cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 1147 } 1148 1149 if (!error && (get_host_cr3 || get_all)) { 1150 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR3, &cr3); 1151 if (error == 0) 1152 printf("host_cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 1153 } 1154 1155 if (!error && (get_host_cr4 || get_all)) { 1156 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR4, &cr4); 1157 if (error == 0) 1158 printf("host_cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 1159 } 1160 1161 if (!error && (get_host_rip || get_all)) { 1162 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RIP, &rip); 1163 if (error == 0) 1164 printf("host_rip[%d]\t\t0x%016lx\n", vcpu, rip); 1165 } 1166 1167 if (!error && (get_host_rsp || get_all)) { 1168 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RSP, &rsp); 1169 if (error == 0) 1170 printf("host_rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 1171 } 1172 1173 if (!error && (get_vmcs_link || get_all)) { 1174 error = vm_get_vmcs_field(ctx, vcpu, VMCS_LINK_POINTER, &addr); 1175 if (error == 0) 1176 printf("vmcs_pointer[%d]\t0x%016lx\n", vcpu, addr); 1177 } 1178 1179 if (!error && (get_vmcs_exit_interruption_info || get_all)) { 1180 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_INFO, &u64); 1181 if (error == 0) { 1182 printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n", 1183 vcpu, u64); 1184 } 1185 } 1186 1187 if (!error && (get_vmcs_exit_interruption_error || get_all)) { 1188 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_ERRCODE, 1189 &u64); 1190 if (error == 0) { 1191 printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n", 1192 vcpu, u64); 1193 } 1194 } 1195 1196 if (!error && (get_vmcs_interruptibility || get_all)) { 1197 error = vm_get_vmcs_field(ctx, vcpu, 1198 VMCS_GUEST_INTERRUPTIBILITY, &u64); 1199 if (error == 0) { 1200 printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n", 1201 vcpu, u64); 1202 } 1203 } 1204 1205 if (!error && (get_vmcs_exit_inst_length || get_all)) { 1206 error = vm_get_vmcs_field(ctx, vcpu, 1207 VMCS_EXIT_INSTRUCTION_LENGTH, &u64); 1208 if (error == 0) 1209 printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu, 1210 (uint32_t)u64); 1211 } 1212 1213 if (!error && (get_vmcs_exit_qualification || get_all)) { 1214 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION, 1215 &u64); 1216 if (error == 0) 1217 printf("vmcs_exit_qualification[%d]\t0x%016lx\n", 1218 vcpu, u64); 1219 } 1220 1221 return (error); 1222} 1223 1224static int 1225get_misc_vmcb(struct vmctx *ctx, int vcpu) 1226{ 1227 uint64_t ctl, addr; 1228 int error = 0; 1229 1230 if (!error && (get_vmcb_intercept || get_all)) { 1231 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_CR_INTERCEPT, 4, 1232 &ctl); 1233 if (error == 0) 1234 printf("cr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1235 1236 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_DR_INTERCEPT, 4, 1237 &ctl); 1238 if (error == 0) 1239 printf("dr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1240 1241 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXC_INTERCEPT, 4, 1242 &ctl); 1243 if (error == 0) 1244 printf("exc_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1245 1246 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST1_INTERCEPT, 1247 4, &ctl); 1248 if (error == 0) 1249 printf("inst1_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1250 1251 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST2_INTERCEPT, 1252 4, &ctl); 1253 if (error == 0) 1254 printf("inst2_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1255 } 1256 1257 if (!error && (get_vmcb_tlb_ctrl || get_all)) { 1258 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_TLB_CTRL, 1259 4, &ctl); 1260 if (error == 0) 1261 printf("TLB ctrl[%d]\t0x%016lx\n", vcpu, ctl); 1262 } 1263 1264 if (!error && (get_vmcb_exit_details || get_all)) { 1265 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO1, 1266 8, &ctl); 1267 if (error == 0) 1268 printf("exitinfo1[%d]\t0x%016lx\n", vcpu, ctl); 1269 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO2, 1270 8, &ctl); 1271 if (error == 0) 1272 printf("exitinfo2[%d]\t0x%016lx\n", vcpu, ctl); 1273 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINTINFO, 1274 8, &ctl); 1275 if (error == 0) 1276 printf("exitintinfo[%d]\t0x%016lx\n", vcpu, ctl); 1277 } 1278 1279 if (!error && (get_vmcb_virq || get_all)) { 1280 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_VIRQ, 1281 8, &ctl); 1282 if (error == 0) 1283 printf("v_irq/tpr[%d]\t0x%016lx\n", vcpu, ctl); 1284 } 1285 1286 if (!error && (get_apic_access_addr || get_all)) { 1287 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_BAR, 8, 1288 &addr); 1289 if (error == 0) 1290 printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpu, addr); 1291 } 1292 1293 if (!error && (get_virtual_apic_addr || get_all)) { 1294 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PAGE, 8, 1295 &addr); 1296 if (error == 0) 1297 printf("AVIC backing page[%d]\t0x%016lx\n", vcpu, addr); 1298 } 1299 1300 if (!error && (get_avic_table || get_all)) { 1301 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_LT, 8, 1302 &addr); 1303 if (error == 0) 1304 printf("AVIC logical table[%d]\t0x%016lx\n", 1305 vcpu, addr); 1306 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PT, 8, 1307 &addr); 1308 if (error == 0) 1309 printf("AVIC physical table[%d]\t0x%016lx\n", 1310 vcpu, addr); 1311 } 1312 1313 return (error); 1314} 1315 1316static struct option * 1317setup_options(bool cpu_intel) 1318{ 1319 const struct option common_opts[] = { 1320 { "vm", REQ_ARG, 0, VMNAME }, 1321 { "cpu", REQ_ARG, 0, VCPU }, 1322 { "set-mem", REQ_ARG, 0, SET_MEM }, 1323 { "set-efer", REQ_ARG, 0, SET_EFER }, 1324 { "set-cr0", REQ_ARG, 0, SET_CR0 }, 1325 { "set-cr3", REQ_ARG, 0, SET_CR3 }, 1326 { "set-cr4", REQ_ARG, 0, SET_CR4 }, 1327 { "set-dr0", REQ_ARG, 0, SET_DR0 }, 1328 { "set-dr1", REQ_ARG, 0, SET_DR1 }, 1329 { "set-dr2", REQ_ARG, 0, SET_DR2 }, 1330 { "set-dr3", REQ_ARG, 0, SET_DR3 }, 1331 { "set-dr6", REQ_ARG, 0, SET_DR6 }, 1332 { "set-dr7", REQ_ARG, 0, SET_DR7 }, 1333 { "set-rsp", REQ_ARG, 0, SET_RSP }, 1334 { "set-rip", REQ_ARG, 0, SET_RIP }, 1335 { "set-rax", REQ_ARG, 0, SET_RAX }, 1336 { "set-rflags", REQ_ARG, 0, SET_RFLAGS }, 1337 { "desc-base", REQ_ARG, 0, DESC_BASE }, 1338 { "desc-limit", REQ_ARG, 0, DESC_LIMIT }, 1339 { "desc-access",REQ_ARG, 0, DESC_ACCESS }, 1340 { "set-cs", REQ_ARG, 0, SET_CS }, 1341 { "set-ds", REQ_ARG, 0, SET_DS }, 1342 { "set-es", REQ_ARG, 0, SET_ES }, 1343 { "set-fs", REQ_ARG, 0, SET_FS }, 1344 { "set-gs", REQ_ARG, 0, SET_GS }, 1345 { "set-ss", REQ_ARG, 0, SET_SS }, 1346 { "set-tr", REQ_ARG, 0, SET_TR }, 1347 { "set-ldtr", REQ_ARG, 0, SET_LDTR }, 1348 { "set-x2apic-state",REQ_ARG, 0, SET_X2APIC_STATE }, 1349 { "set-exception-bitmap", 1350 REQ_ARG, 0, SET_EXCEPTION_BITMAP }, 1351 { "capname", REQ_ARG, 0, CAPNAME }, 1352 { "unassign-pptdev", REQ_ARG, 0, UNASSIGN_PPTDEV }, 1353 { "setcap", REQ_ARG, 0, SET_CAP }, 1354 { "get-gpa-pmap", REQ_ARG, 0, GET_GPA_PMAP }, 1355 { "assert-lapic-lvt", REQ_ARG, 0, ASSERT_LAPIC_LVT }, 1356 { "get-rtc-time", NO_ARG, &get_rtc_time, 1 }, 1357 { "set-rtc-time", REQ_ARG, 0, SET_RTC_TIME }, 1358 { "rtc-nvram-offset", REQ_ARG, 0, RTC_NVRAM_OFFSET }, 1359 { "get-rtc-nvram", NO_ARG, &get_rtc_nvram, 1 }, 1360 { "set-rtc-nvram", REQ_ARG, 0, SET_RTC_NVRAM }, 1361 { "getcap", NO_ARG, &getcap, 1 }, 1362 { "get-stats", NO_ARG, &get_stats, 1 }, 1363 { "get-desc-ds",NO_ARG, &get_desc_ds, 1 }, 1364 { "set-desc-ds",NO_ARG, &set_desc_ds, 1 }, 1365 { "get-desc-es",NO_ARG, &get_desc_es, 1 }, 1366 { "set-desc-es",NO_ARG, &set_desc_es, 1 }, 1367 { "get-desc-ss",NO_ARG, &get_desc_ss, 1 }, 1368 { "set-desc-ss",NO_ARG, &set_desc_ss, 1 }, 1369 { "get-desc-cs",NO_ARG, &get_desc_cs, 1 }, 1370 { "set-desc-cs",NO_ARG, &set_desc_cs, 1 }, 1371 { "get-desc-fs",NO_ARG, &get_desc_fs, 1 }, 1372 { "set-desc-fs",NO_ARG, &set_desc_fs, 1 }, 1373 { "get-desc-gs",NO_ARG, &get_desc_gs, 1 }, 1374 { "set-desc-gs",NO_ARG, &set_desc_gs, 1 }, 1375 { "get-desc-tr",NO_ARG, &get_desc_tr, 1 }, 1376 { "set-desc-tr",NO_ARG, &set_desc_tr, 1 }, 1377 { "set-desc-ldtr", NO_ARG, &set_desc_ldtr, 1 }, 1378 { "get-desc-ldtr", NO_ARG, &get_desc_ldtr, 1 }, 1379 { "set-desc-gdtr", NO_ARG, &set_desc_gdtr, 1 }, 1380 { "get-desc-gdtr", NO_ARG, &get_desc_gdtr, 1 }, 1381 { "set-desc-idtr", NO_ARG, &set_desc_idtr, 1 }, 1382 { "get-desc-idtr", NO_ARG, &get_desc_idtr, 1 }, 1383 { "get-memmap", NO_ARG, &get_memmap, 1 }, 1384 { "get-memseg", NO_ARG, &get_memseg, 1 }, 1385 { "get-efer", NO_ARG, &get_efer, 1 }, 1386 { "get-cr0", NO_ARG, &get_cr0, 1 }, 1387 { "get-cr3", NO_ARG, &get_cr3, 1 }, 1388 { "get-cr4", NO_ARG, &get_cr4, 1 }, 1389 { "get-dr0", NO_ARG, &get_dr0, 1 }, 1390 { "get-dr1", NO_ARG, &get_dr1, 1 }, 1391 { "get-dr2", NO_ARG, &get_dr2, 1 }, 1392 { "get-dr3", NO_ARG, &get_dr3, 1 }, 1393 { "get-dr6", NO_ARG, &get_dr6, 1 }, 1394 { "get-dr7", NO_ARG, &get_dr7, 1 }, 1395 { "get-rsp", NO_ARG, &get_rsp, 1 }, 1396 { "get-rip", NO_ARG, &get_rip, 1 }, 1397 { "get-rax", NO_ARG, &get_rax, 1 }, 1398 { "get-rbx", NO_ARG, &get_rbx, 1 }, 1399 { "get-rcx", NO_ARG, &get_rcx, 1 }, 1400 { "get-rdx", NO_ARG, &get_rdx, 1 }, 1401 { "get-rsi", NO_ARG, &get_rsi, 1 }, 1402 { "get-rdi", NO_ARG, &get_rdi, 1 }, 1403 { "get-rbp", NO_ARG, &get_rbp, 1 }, 1404 { "get-r8", NO_ARG, &get_r8, 1 }, 1405 { "get-r9", NO_ARG, &get_r9, 1 }, 1406 { "get-r10", NO_ARG, &get_r10, 1 }, 1407 { "get-r11", NO_ARG, &get_r11, 1 }, 1408 { "get-r12", NO_ARG, &get_r12, 1 }, 1409 { "get-r13", NO_ARG, &get_r13, 1 }, 1410 { "get-r14", NO_ARG, &get_r14, 1 }, 1411 { "get-r15", NO_ARG, &get_r15, 1 }, 1412 { "get-rflags", NO_ARG, &get_rflags, 1 }, 1413 { "get-cs", NO_ARG, &get_cs, 1 }, 1414 { "get-ds", NO_ARG, &get_ds, 1 }, 1415 { "get-es", NO_ARG, &get_es, 1 }, 1416 { "get-fs", NO_ARG, &get_fs, 1 }, 1417 { "get-gs", NO_ARG, &get_gs, 1 }, 1418 { "get-ss", NO_ARG, &get_ss, 1 }, 1419 { "get-tr", NO_ARG, &get_tr, 1 }, 1420 { "get-ldtr", NO_ARG, &get_ldtr, 1 }, 1421 { "get-eptp", NO_ARG, &get_eptp, 1 }, 1422 { "get-exception-bitmap", 1423 NO_ARG, &get_exception_bitmap, 1 }, 1424 { "get-io-bitmap-address", 1425 NO_ARG, &get_io_bitmap, 1 }, 1426 { "get-tsc-offset", NO_ARG, &get_tsc_offset, 1 }, 1427 { "get-msr-bitmap", 1428 NO_ARG, &get_msr_bitmap, 1 }, 1429 { "get-msr-bitmap-address", 1430 NO_ARG, &get_msr_bitmap_address, 1 }, 1431 { "get-guest-pat", NO_ARG, &get_guest_pat, 1 }, 1432 { "get-guest-sysenter", 1433 NO_ARG, &get_guest_sysenter, 1 }, 1434 { "get-exit-reason", 1435 NO_ARG, &get_exit_reason, 1 }, 1436 { "get-x2apic-state", NO_ARG, &get_x2apic_state, 1 }, 1437 { "get-all", NO_ARG, &get_all, 1 }, 1438 { "run", NO_ARG, &run, 1 }, 1439 { "create", NO_ARG, &create, 1 }, 1440 { "destroy", NO_ARG, &destroy, 1 }, 1441 { "inject-nmi", NO_ARG, &inject_nmi, 1 }, 1442 { "force-reset", NO_ARG, &force_reset, 1 }, 1443 { "force-poweroff", NO_ARG, &force_poweroff, 1 }, 1444 { "get-active-cpus", NO_ARG, &get_active_cpus, 1 }, 1445 { "get-suspended-cpus", NO_ARG, &get_suspended_cpus, 1 }, 1446 { "get-intinfo", NO_ARG, &get_intinfo, 1 }, 1447 }; 1448 1449 const struct option intel_opts[] = { 1450 { "get-vmcs-pinbased-ctls", 1451 NO_ARG, &get_pinbased_ctls, 1 }, 1452 { "get-vmcs-procbased-ctls", 1453 NO_ARG, &get_procbased_ctls, 1 }, 1454 { "get-vmcs-procbased-ctls2", 1455 NO_ARG, &get_procbased_ctls2, 1 }, 1456 { "get-vmcs-guest-linear-address", 1457 NO_ARG, &get_vmcs_gla, 1 }, 1458 { "get-vmcs-guest-physical-address", 1459 NO_ARG, &get_vmcs_gpa, 1 }, 1460 { "get-vmcs-entry-interruption-info", 1461 NO_ARG, &get_vmcs_entry_interruption_info, 1}, 1462 { "get-vmcs-cr0-mask", NO_ARG, &get_cr0_mask, 1 }, 1463 { "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 }, 1464 { "get-vmcs-cr4-mask", NO_ARG, &get_cr4_mask, 1 }, 1465 { "get-vmcs-cr4-shadow", NO_ARG, &get_cr4_shadow, 1 }, 1466 { "get-vmcs-cr3-targets", NO_ARG, &get_cr3_targets, 1 }, 1467 { "get-vmcs-tpr-threshold", 1468 NO_ARG, &get_tpr_threshold, 1 }, 1469 { "get-vmcs-vpid", NO_ARG, &get_vpid_asid, 1 }, 1470 { "get-vmcs-exit-ctls", NO_ARG, &get_exit_ctls, 1 }, 1471 { "get-vmcs-entry-ctls", 1472 NO_ARG, &get_entry_ctls, 1 }, 1473 { "get-vmcs-instruction-error", 1474 NO_ARG, &get_inst_err, 1 }, 1475 { "get-vmcs-host-pat", NO_ARG, &get_host_pat, 1 }, 1476 { "get-vmcs-host-cr0", 1477 NO_ARG, &get_host_cr0, 1 }, 1478 { "set-vmcs-entry-interruption-info", 1479 REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO }, 1480 { "get-vmcs-exit-qualification", 1481 NO_ARG, &get_vmcs_exit_qualification, 1 }, 1482 { "get-vmcs-exit-inst-length", 1483 NO_ARG, &get_vmcs_exit_inst_length, 1 }, 1484 { "get-vmcs-interruptibility", 1485 NO_ARG, &get_vmcs_interruptibility, 1 }, 1486 { "get-vmcs-exit-interruption-error", 1487 NO_ARG, &get_vmcs_exit_interruption_error, 1 }, 1488 { "get-vmcs-exit-interruption-info", 1489 NO_ARG, &get_vmcs_exit_interruption_info, 1 }, 1490 { "get-vmcs-link", NO_ARG, &get_vmcs_link, 1 }, 1491 { "get-vmcs-host-cr3", 1492 NO_ARG, &get_host_cr3, 1 }, 1493 { "get-vmcs-host-cr4", 1494 NO_ARG, &get_host_cr4, 1 }, 1495 { "get-vmcs-host-rip", 1496 NO_ARG, &get_host_rip, 1 }, 1497 { "get-vmcs-host-rsp", 1498 NO_ARG, &get_host_rsp, 1 }, 1499 { "get-apic-access-address", 1500 NO_ARG, &get_apic_access_addr, 1}, 1501 { "get-virtual-apic-address", 1502 NO_ARG, &get_virtual_apic_addr, 1} 1503 }; 1504 1505 const struct option amd_opts[] = { 1506 { "get-vmcb-intercepts", 1507 NO_ARG, &get_vmcb_intercept, 1 }, 1508 { "get-vmcb-asid", 1509 NO_ARG, &get_vpid_asid, 1 }, 1510 { "get-vmcb-exit-details", 1511 NO_ARG, &get_vmcb_exit_details, 1 }, 1512 { "get-vmcb-tlb-ctrl", 1513 NO_ARG, &get_vmcb_tlb_ctrl, 1 }, 1514 { "get-vmcb-virq", 1515 NO_ARG, &get_vmcb_virq, 1 }, 1516 { "get-avic-apic-bar", 1517 NO_ARG, &get_apic_access_addr, 1 }, 1518 { "get-avic-backing-page", 1519 NO_ARG, &get_virtual_apic_addr, 1 }, 1520 { "get-avic-table", 1521 NO_ARG, &get_avic_table, 1 } 1522 }; 1523 1524 const struct option null_opt = { 1525 NULL, 0, NULL, 0 1526 }; 1527 1528 struct option *all_opts; 1529 char *cp; 1530 int optlen; 1531 1532 optlen = sizeof(common_opts); 1533 1534 if (cpu_intel) 1535 optlen += sizeof(intel_opts); 1536 else 1537 optlen += sizeof(amd_opts); 1538 1539 optlen += sizeof(null_opt); 1540 1541 all_opts = malloc(optlen); 1542 1543 cp = (char *)all_opts; 1544 memcpy(cp, common_opts, sizeof(common_opts)); 1545 cp += sizeof(common_opts); 1546 1547 if (cpu_intel) { 1548 memcpy(cp, intel_opts, sizeof(intel_opts)); 1549 cp += sizeof(intel_opts); 1550 } else { 1551 memcpy(cp, amd_opts, sizeof(amd_opts)); 1552 cp += sizeof(amd_opts); 1553 } 1554 1555 memcpy(cp, &null_opt, sizeof(null_opt)); 1556 cp += sizeof(null_opt); 1557 1558 return (all_opts); 1559} 1560 1561static const char * 1562wday_str(int idx) 1563{ 1564 static const char *weekdays[] = { 1565 "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat" 1566 }; 1567 1568 if (idx >= 0 && idx < 7) 1569 return (weekdays[idx]); 1570 else 1571 return ("UNK"); 1572} 1573 1574static const char * 1575mon_str(int idx) 1576{ 1577 static const char *months[] = { 1578 "Jan", "Feb", "Mar", "Apr", "May", "Jun", 1579 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" 1580 }; 1581 1582 if (idx >= 0 && idx < 12) 1583 return (months[idx]); 1584 else 1585 return ("UNK"); 1586} 1587 1588static int 1589show_memmap(struct vmctx *ctx) 1590{ 1591 char name[SPECNAMELEN + 1], numbuf[8]; 1592 vm_ooffset_t segoff; 1593 vm_paddr_t gpa; 1594 size_t maplen, seglen; 1595 int error, flags, prot, segid, delim; 1596 1597 printf("Address Length Segment Offset "); 1598 printf("Prot Flags\n"); 1599 1600 gpa = 0; 1601 while (1) { 1602 error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen, 1603 &prot, &flags); 1604 if (error) 1605 return (errno == ENOENT ? 0 : error); 1606 1607 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1608 if (error) 1609 return (error); 1610 1611 printf("%-12lX", gpa); 1612 humanize_number(numbuf, sizeof(numbuf), maplen, "B", 1613 HN_AUTOSCALE, HN_NOSPACE); 1614 printf("%-12s", numbuf); 1615 1616 printf("%-12s", name[0] ? name : "sysmem"); 1617 printf("%-12lX", segoff); 1618 printf("%c%c%c ", prot & PROT_READ ? 'R' : '-', 1619 prot & PROT_WRITE ? 'W' : '-', 1620 prot & PROT_EXEC ? 'X' : '-'); 1621 1622 delim = '\0'; 1623 if (flags & VM_MEMMAP_F_WIRED) { 1624 printf("%cwired", delim); 1625 delim = '/'; 1626 } 1627 if (flags & VM_MEMMAP_F_IOMMU) { 1628 printf("%ciommu", delim); 1629 delim = '/'; 1630 } 1631 printf("\n"); 1632 1633 gpa += maplen; 1634 } 1635} 1636 1637static int 1638show_memseg(struct vmctx *ctx) 1639{ 1640 char name[SPECNAMELEN + 1], numbuf[8]; 1641 size_t seglen; 1642 int error, segid; 1643 1644 printf("ID Length Name\n"); 1645 1646 segid = 0; 1647 while (1) { 1648 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1649 if (error) 1650 return (errno == EINVAL ? 0 : error); 1651 1652 if (seglen) { 1653 printf("%-4d", segid); 1654 humanize_number(numbuf, sizeof(numbuf), seglen, "B", 1655 HN_AUTOSCALE, HN_NOSPACE); 1656 printf("%-12s", numbuf); 1657 printf("%s", name[0] ? name : "sysmem"); 1658 printf("\n"); 1659 } 1660 segid++; 1661 } 1662} 1663 1664int 1665main(int argc, char *argv[]) 1666{ 1667 char *vmname; 1668 int error, ch, vcpu, ptenum; 1669 vm_paddr_t gpa_pmap; 1670 struct vm_exit vmexit; 1671 uint64_t rax, cr0, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 1672 uint64_t rsp, rip, rflags, efer, pat; 1673 uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2]; 1674 struct vmctx *ctx; 1675 cpuset_t cpus; 1676 bool cpu_intel; 1677 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 1678 struct tm tm; 1679 struct option *opts; 1680 1681 cpu_intel = cpu_vendor_intel(); 1682 opts = setup_options(cpu_intel); 1683 1684 vcpu = 0; 1685 vmname = NULL; 1686 assert_lapic_lvt = -1; 1687 progname = basename(argv[0]); 1688 1689 while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) { 1690 switch (ch) { 1691 case 0: 1692 break; 1693 case VMNAME: 1694 vmname = optarg; 1695 break; 1696 case VCPU: 1697 vcpu = atoi(optarg); 1698 break; 1699 case SET_MEM: 1700 memsize = atoi(optarg) * MB; 1701 memsize = roundup(memsize, 2 * MB); 1702 break; 1703 case SET_EFER: 1704 efer = strtoul(optarg, NULL, 0); 1705 set_efer = 1; 1706 break; 1707 case SET_CR0: 1708 cr0 = strtoul(optarg, NULL, 0); 1709 set_cr0 = 1; 1710 break; 1711 case SET_CR3: 1712 cr3 = strtoul(optarg, NULL, 0); 1713 set_cr3 = 1; 1714 break; 1715 case SET_CR4: 1716 cr4 = strtoul(optarg, NULL, 0); 1717 set_cr4 = 1; 1718 break; 1719 case SET_DR0: 1720 dr0 = strtoul(optarg, NULL, 0); 1721 set_dr0 = 1; 1722 break; 1723 case SET_DR1: 1724 dr1 = strtoul(optarg, NULL, 0); 1725 set_dr1 = 1; 1726 break; 1727 case SET_DR2: 1728 dr2 = strtoul(optarg, NULL, 0); 1729 set_dr2 = 1; 1730 break; 1731 case SET_DR3: 1732 dr3 = strtoul(optarg, NULL, 0); 1733 set_dr3 = 1; 1734 break; 1735 case SET_DR6: 1736 dr6 = strtoul(optarg, NULL, 0); 1737 set_dr6 = 1; 1738 break; 1739 case SET_DR7: 1740 dr7 = strtoul(optarg, NULL, 0); 1741 set_dr7 = 1; 1742 break; 1743 case SET_RSP: 1744 rsp = strtoul(optarg, NULL, 0); 1745 set_rsp = 1; 1746 break; 1747 case SET_RIP: 1748 rip = strtoul(optarg, NULL, 0); 1749 set_rip = 1; 1750 break; 1751 case SET_RAX: 1752 rax = strtoul(optarg, NULL, 0); 1753 set_rax = 1; 1754 break; 1755 case SET_RFLAGS: 1756 rflags = strtoul(optarg, NULL, 0); 1757 set_rflags = 1; 1758 break; 1759 case DESC_BASE: 1760 desc_base = strtoul(optarg, NULL, 0); 1761 break; 1762 case DESC_LIMIT: 1763 desc_limit = strtoul(optarg, NULL, 0); 1764 break; 1765 case DESC_ACCESS: 1766 desc_access = strtoul(optarg, NULL, 0); 1767 break; 1768 case SET_CS: 1769 cs = strtoul(optarg, NULL, 0); 1770 set_cs = 1; 1771 break; 1772 case SET_DS: 1773 ds = strtoul(optarg, NULL, 0); 1774 set_ds = 1; 1775 break; 1776 case SET_ES: 1777 es = strtoul(optarg, NULL, 0); 1778 set_es = 1; 1779 break; 1780 case SET_FS: 1781 fs = strtoul(optarg, NULL, 0); 1782 set_fs = 1; 1783 break; 1784 case SET_GS: 1785 gs = strtoul(optarg, NULL, 0); 1786 set_gs = 1; 1787 break; 1788 case SET_SS: 1789 ss = strtoul(optarg, NULL, 0); 1790 set_ss = 1; 1791 break; 1792 case SET_TR: 1793 tr = strtoul(optarg, NULL, 0); 1794 set_tr = 1; 1795 break; 1796 case SET_LDTR: 1797 ldtr = strtoul(optarg, NULL, 0); 1798 set_ldtr = 1; 1799 break; 1800 case SET_X2APIC_STATE: 1801 x2apic_state = strtol(optarg, NULL, 0); 1802 set_x2apic_state = 1; 1803 break; 1804 case SET_EXCEPTION_BITMAP: 1805 exception_bitmap = strtoul(optarg, NULL, 0); 1806 set_exception_bitmap = 1; 1807 break; 1808 case SET_VMCS_ENTRY_INTERRUPTION_INFO: 1809 vmcs_entry_interruption_info = strtoul(optarg, NULL, 0); 1810 set_vmcs_entry_interruption_info = 1; 1811 break; 1812 case SET_CAP: 1813 capval = strtoul(optarg, NULL, 0); 1814 setcap = 1; 1815 break; 1816 case SET_RTC_TIME: 1817 rtc_secs = strtoul(optarg, NULL, 0); 1818 set_rtc_time = 1; 1819 break; 1820 case SET_RTC_NVRAM: 1821 rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0); 1822 set_rtc_nvram = 1; 1823 break; 1824 case RTC_NVRAM_OFFSET: 1825 rtc_nvram_offset = strtoul(optarg, NULL, 0); 1826 break; 1827 case GET_GPA_PMAP: 1828 gpa_pmap = strtoul(optarg, NULL, 0); 1829 get_gpa_pmap = 1; 1830 break; 1831 case CAPNAME: 1832 capname = optarg; 1833 break; 1834 case UNASSIGN_PPTDEV: 1835 unassign_pptdev = 1; 1836 if (sscanf(optarg, "%d/%d/%d", &bus, &slot, &func) != 3) 1837 usage(cpu_intel); 1838 break; 1839 case ASSERT_LAPIC_LVT: 1840 assert_lapic_lvt = atoi(optarg); 1841 break; 1842 default: 1843 usage(cpu_intel); 1844 } 1845 } 1846 argc -= optind; 1847 argv += optind; 1848 1849 if (vmname == NULL) 1850 usage(cpu_intel); 1851 1852 error = 0; 1853 1854 if (!error && create) 1855 error = vm_create(vmname); 1856 1857 if (!error) { 1858 ctx = vm_open(vmname); 1859 if (ctx == NULL) { 1860 printf("VM:%s is not created.\n", vmname); 1861 exit (1); 1862 } 1863 } 1864 1865 if (!error && memsize) 1866 error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL); 1867 1868 if (!error && set_efer) 1869 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_EFER, efer); 1870 1871 if (!error && set_cr0) 1872 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR0, cr0); 1873 1874 if (!error && set_cr3) 1875 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR3, cr3); 1876 1877 if (!error && set_cr4) 1878 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR4, cr4); 1879 1880 if (!error && set_dr0) 1881 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR0, dr0); 1882 1883 if (!error && set_dr1) 1884 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR1, dr1); 1885 1886 if (!error && set_dr2) 1887 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR2, dr2); 1888 1889 if (!error && set_dr3) 1890 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR3, dr3); 1891 1892 if (!error && set_dr6) 1893 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR6, dr6); 1894 1895 if (!error && set_dr7) 1896 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR7, dr7); 1897 1898 if (!error && set_rsp) 1899 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RSP, rsp); 1900 1901 if (!error && set_rip) 1902 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, rip); 1903 1904 if (!error && set_rax) 1905 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, rax); 1906 1907 if (!error && set_rflags) { 1908 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 1909 rflags); 1910 } 1911 1912 if (!error && set_desc_ds) { 1913 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_DS, 1914 desc_base, desc_limit, desc_access); 1915 } 1916 1917 if (!error && set_desc_es) { 1918 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_ES, 1919 desc_base, desc_limit, desc_access); 1920 } 1921 1922 if (!error && set_desc_ss) { 1923 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_SS, 1924 desc_base, desc_limit, desc_access); 1925 } 1926 1927 if (!error && set_desc_cs) { 1928 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_CS, 1929 desc_base, desc_limit, desc_access); 1930 } 1931 1932 if (!error && set_desc_fs) { 1933 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_FS, 1934 desc_base, desc_limit, desc_access); 1935 } 1936 1937 if (!error && set_desc_gs) { 1938 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GS, 1939 desc_base, desc_limit, desc_access); 1940 } 1941 1942 if (!error && set_desc_tr) { 1943 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_TR, 1944 desc_base, desc_limit, desc_access); 1945 } 1946 1947 if (!error && set_desc_ldtr) { 1948 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 1949 desc_base, desc_limit, desc_access); 1950 } 1951 1952 if (!error && set_desc_gdtr) { 1953 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 1954 desc_base, desc_limit, 0); 1955 } 1956 1957 if (!error && set_desc_idtr) { 1958 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 1959 desc_base, desc_limit, 0); 1960 } 1961 1962 if (!error && set_cs) 1963 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CS, cs); 1964 1965 if (!error && set_ds) 1966 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DS, ds); 1967 1968 if (!error && set_es) 1969 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_ES, es); 1970 1971 if (!error && set_fs) 1972 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_FS, fs); 1973 1974 if (!error && set_gs) 1975 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_GS, gs); 1976 1977 if (!error && set_ss) 1978 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_SS, ss); 1979 1980 if (!error && set_tr) 1981 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_TR, tr); 1982 1983 if (!error && set_ldtr) 1984 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_LDTR, ldtr); 1985 1986 if (!error && set_x2apic_state) 1987 error = vm_set_x2apic_state(ctx, vcpu, x2apic_state); 1988 1989 if (!error && unassign_pptdev) 1990 error = vm_unassign_pptdev(ctx, bus, slot, func); 1991 1992 if (!error && set_exception_bitmap) { 1993 if (cpu_intel) 1994 error = vm_set_vmcs_field(ctx, vcpu, 1995 VMCS_EXCEPTION_BITMAP, 1996 exception_bitmap); 1997 else 1998 error = vm_set_vmcb_field(ctx, vcpu, 1999 VMCB_OFF_EXC_INTERCEPT, 2000 4, exception_bitmap); 2001 } 2002 2003 if (!error && cpu_intel && set_vmcs_entry_interruption_info) { 2004 error = vm_set_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO, 2005 vmcs_entry_interruption_info); 2006 } 2007 2008 if (!error && inject_nmi) { 2009 error = vm_inject_nmi(ctx, vcpu); 2010 } 2011 2012 if (!error && assert_lapic_lvt != -1) { 2013 error = vm_lapic_local_irq(ctx, vcpu, assert_lapic_lvt); 2014 } 2015 2016 if (!error && (get_memseg || get_all)) 2017 error = show_memseg(ctx); 2018 2019 if (!error && (get_memmap || get_all)) 2020 error = show_memmap(ctx); 2021 2022 if (!error) 2023 error = get_all_registers(ctx, vcpu); 2024 2025 if (!error) 2026 error = get_all_segments(ctx, vcpu); 2027 2028 if (!error) { 2029 if (cpu_intel) 2030 error = get_misc_vmcs(ctx, vcpu); 2031 else 2032 error = get_misc_vmcb(ctx, vcpu); 2033 } 2034 2035 if (!error && (get_x2apic_state || get_all)) { 2036 error = vm_get_x2apic_state(ctx, vcpu, &x2apic_state); 2037 if (error == 0) 2038 printf("x2apic_state[%d]\t%d\n", vcpu, x2apic_state); 2039 } 2040 2041 if (!error && (get_eptp || get_all)) { 2042 if (cpu_intel) 2043 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EPTP, &eptp); 2044 else 2045 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_NPT_BASE, 2046 8, &eptp); 2047 if (error == 0) 2048 printf("%s[%d]\t\t0x%016lx\n", 2049 cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp); 2050 } 2051 2052 if (!error && (get_exception_bitmap || get_all)) { 2053 if(cpu_intel) 2054 error = vm_get_vmcs_field(ctx, vcpu, 2055 VMCS_EXCEPTION_BITMAP, &bm); 2056 else 2057 error = vm_get_vmcb_field(ctx, vcpu, 2058 VMCB_OFF_EXC_INTERCEPT, 2059 4, &bm); 2060 if (error == 0) 2061 printf("exception_bitmap[%d]\t%#lx\n", vcpu, bm); 2062 } 2063 2064 if (!error && (get_io_bitmap || get_all)) { 2065 if (cpu_intel) { 2066 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_A, 2067 &bm); 2068 if (error == 0) 2069 printf("io_bitmap_a[%d]\t%#lx\n", vcpu, bm); 2070 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_B, 2071 &bm); 2072 if (error == 0) 2073 printf("io_bitmap_b[%d]\t%#lx\n", vcpu, bm); 2074 } else { 2075 error = vm_get_vmcb_field(ctx, vcpu, 2076 VMCB_OFF_IO_PERM, 8, &bm); 2077 if (error == 0) 2078 printf("io_bitmap[%d]\t%#lx\n", vcpu, bm); 2079 } 2080 } 2081 2082 if (!error && (get_tsc_offset || get_all)) { 2083 uint64_t tscoff; 2084 if (cpu_intel) 2085 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TSC_OFFSET, 2086 &tscoff); 2087 else 2088 error = vm_get_vmcb_field(ctx, vcpu, 2089 VMCB_OFF_TSC_OFFSET, 2090 8, &tscoff); 2091 if (error == 0) 2092 printf("tsc_offset[%d]\t0x%016lx\n", vcpu, tscoff); 2093 } 2094 2095 if (!error && (get_msr_bitmap_address || get_all)) { 2096 if (cpu_intel) 2097 error = vm_get_vmcs_field(ctx, vcpu, VMCS_MSR_BITMAP, 2098 &addr); 2099 else 2100 error = vm_get_vmcb_field(ctx, vcpu, 2101 VMCB_OFF_MSR_PERM, 8, &addr); 2102 if (error == 0) 2103 printf("msr_bitmap[%d]\t\t%#lx\n", vcpu, addr); 2104 } 2105 2106 if (!error && (get_msr_bitmap || get_all)) { 2107 if (cpu_intel) { 2108 error = vm_get_vmcs_field(ctx, vcpu, 2109 VMCS_MSR_BITMAP, &addr); 2110 } else { 2111 error = vm_get_vmcb_field(ctx, vcpu, 2112 VMCB_OFF_MSR_PERM, 8, 2113 &addr); 2114 } 2115 2116 if (error == 0) 2117 error = dump_msr_bitmap(vcpu, addr, cpu_intel); 2118 } 2119 2120 if (!error && (get_vpid_asid || get_all)) { 2121 uint64_t vpid; 2122 if (cpu_intel) 2123 error = vm_get_vmcs_field(ctx, vcpu, VMCS_VPID, &vpid); 2124 else 2125 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_ASID, 2126 4, &vpid); 2127 if (error == 0) 2128 printf("%s[%d]\t\t0x%04lx\n", 2129 cpu_intel ? "vpid" : "asid", vcpu, vpid); 2130 } 2131 2132 if (!error && (get_guest_pat || get_all)) { 2133 if (cpu_intel) 2134 error = vm_get_vmcs_field(ctx, vcpu, 2135 VMCS_GUEST_IA32_PAT, &pat); 2136 else 2137 error = vm_get_vmcb_field(ctx, vcpu, 2138 VMCB_OFF_GUEST_PAT, 8, &pat); 2139 if (error == 0) 2140 printf("guest_pat[%d]\t\t0x%016lx\n", vcpu, pat); 2141 } 2142 2143 if (!error && (get_guest_sysenter || get_all)) { 2144 if (cpu_intel) 2145 error = vm_get_vmcs_field(ctx, vcpu, 2146 VMCS_GUEST_IA32_SYSENTER_CS, 2147 &cs); 2148 else 2149 error = vm_get_vmcb_field(ctx, vcpu, 2150 VMCB_OFF_SYSENTER_CS, 8, 2151 &cs); 2152 2153 if (error == 0) 2154 printf("guest_sysenter_cs[%d]\t%#lx\n", vcpu, cs); 2155 if (cpu_intel) 2156 error = vm_get_vmcs_field(ctx, vcpu, 2157 VMCS_GUEST_IA32_SYSENTER_ESP, 2158 &rsp); 2159 else 2160 error = vm_get_vmcb_field(ctx, vcpu, 2161 VMCB_OFF_SYSENTER_ESP, 8, 2162 &rsp); 2163 2164 if (error == 0) 2165 printf("guest_sysenter_sp[%d]\t%#lx\n", vcpu, rsp); 2166 if (cpu_intel) 2167 error = vm_get_vmcs_field(ctx, vcpu, 2168 VMCS_GUEST_IA32_SYSENTER_EIP, 2169 &rip); 2170 else 2171 error = vm_get_vmcb_field(ctx, vcpu, 2172 VMCB_OFF_SYSENTER_EIP, 8, 2173 &rip); 2174 if (error == 0) 2175 printf("guest_sysenter_ip[%d]\t%#lx\n", vcpu, rip); 2176 } 2177 2178 if (!error && (get_exit_reason || get_all)) { 2179 if (cpu_intel) 2180 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_REASON, 2181 &u64); 2182 else 2183 error = vm_get_vmcb_field(ctx, vcpu, 2184 VMCB_OFF_EXIT_REASON, 8, 2185 &u64); 2186 if (error == 0) 2187 printf("exit_reason[%d]\t%#lx\n", vcpu, u64); 2188 } 2189 2190 if (!error && setcap) { 2191 int captype; 2192 captype = vm_capability_name2type(capname); 2193 error = vm_set_capability(ctx, vcpu, captype, capval); 2194 if (error != 0 && errno == ENOENT) 2195 printf("Capability \"%s\" is not available\n", capname); 2196 } 2197 2198 if (!error && get_gpa_pmap) { 2199 error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum); 2200 if (error == 0) { 2201 printf("gpa %#lx:", gpa_pmap); 2202 pte = &pteval[0]; 2203 while (ptenum-- > 0) 2204 printf(" %#lx", *pte++); 2205 printf("\n"); 2206 } 2207 } 2208 2209 if (!error && set_rtc_nvram) 2210 error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value); 2211 2212 if (!error && (get_rtc_nvram || get_all)) { 2213 error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value); 2214 if (error == 0) { 2215 printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset, 2216 rtc_nvram_value); 2217 } 2218 } 2219 2220 if (!error && set_rtc_time) 2221 error = vm_rtc_settime(ctx, rtc_secs); 2222 2223 if (!error && (get_rtc_time || get_all)) { 2224 error = vm_rtc_gettime(ctx, &rtc_secs); 2225 if (error == 0) { 2226 gmtime_r(&rtc_secs, &tm); 2227 printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n", 2228 rtc_secs, wday_str(tm.tm_wday), mon_str(tm.tm_mon), 2229 tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec, 2230 1900 + tm.tm_year); 2231 } 2232 } 2233 2234 if (!error && (getcap || get_all)) { 2235 int captype, val, getcaptype; 2236 2237 if (getcap && capname) 2238 getcaptype = vm_capability_name2type(capname); 2239 else 2240 getcaptype = -1; 2241 2242 for (captype = 0; captype < VM_CAP_MAX; captype++) { 2243 if (getcaptype >= 0 && captype != getcaptype) 2244 continue; 2245 error = vm_get_capability(ctx, vcpu, captype, &val); 2246 if (error == 0) { 2247 printf("Capability \"%s\" is %s on vcpu %d\n", 2248 vm_capability_type2name(captype), 2249 val ? "set" : "not set", vcpu); 2250 } else if (errno == ENOENT) { 2251 error = 0; 2252 printf("Capability \"%s\" is not available\n", 2253 vm_capability_type2name(captype)); 2254 } else { 2255 break; 2256 } 2257 } 2258 } 2259 2260 if (!error && (get_active_cpus || get_all)) { 2261 error = vm_active_cpus(ctx, &cpus); 2262 if (!error) 2263 print_cpus("active cpus", &cpus); 2264 } 2265 2266 if (!error && (get_suspended_cpus || get_all)) { 2267 error = vm_suspended_cpus(ctx, &cpus); 2268 if (!error) 2269 print_cpus("suspended cpus", &cpus); 2270 } 2271 2272 if (!error && (get_intinfo || get_all)) { 2273 error = vm_get_intinfo(ctx, vcpu, &info[0], &info[1]); 2274 if (!error) { 2275 print_intinfo("pending", info[0]); 2276 print_intinfo("current", info[1]); 2277 } 2278 } 2279 2280 if (!error && (get_stats || get_all)) { 2281 int i, num_stats; 2282 uint64_t *stats; 2283 struct timeval tv; 2284 const char *desc; 2285 2286 stats = vm_get_stats(ctx, vcpu, &tv, &num_stats); 2287 if (stats != NULL) { 2288 printf("vcpu%d stats:\n", vcpu); 2289 for (i = 0; i < num_stats; i++) { 2290 desc = vm_get_stat_desc(ctx, i); 2291 printf("%-40s\t%ld\n", desc, stats[i]); 2292 } 2293 } 2294 } 2295 2296 if (!error && run) { 2297 error = vm_run(ctx, vcpu, &vmexit); 2298 if (error == 0) 2299 dump_vm_run_exitcode(&vmexit, vcpu); 2300 else 2301 printf("vm_run error %d\n", error); 2302 } 2303 2304 if (!error && force_reset) 2305 error = vm_suspend(ctx, VM_SUSPEND_RESET); 2306 2307 if (!error && force_poweroff) 2308 error = vm_suspend(ctx, VM_SUSPEND_POWEROFF); 2309 2310 if (error) 2311 printf("errno = %d\n", errno); 2312 2313 if (!error && destroy) 2314 vm_destroy(ctx); 2315 2316 free (opts); 2317 exit(error); 2318} 2319