1124196Sbms/* 2164124Sbms * Copyright (c) 2002-2006 Bruce M. Simpson. 3124196Sbms * All rights reserved. 4124196Sbms * 5124196Sbms * Redistribution and use in source and binary forms, with or without 6124196Sbms * modification, are permitted provided that the following conditions 7124196Sbms * are met: 8124196Sbms * 1. Redistributions of source code must retain the above copyright 9124196Sbms * notice, this list of conditions and the following disclaimer. 10124196Sbms * 2. Redistributions in binary form must reproduce the above copyright 11124196Sbms * notice, this list of conditions and the following disclaimer in the 12124196Sbms * documentation and/or other materials provided with the distribution. 13165935Simp * 3. Neither the name of Bruce M. Simpson nor the names of 14124196Sbms * contributors may be used to endorse or promote products derived 15124196Sbms * from this software without specific prior written permission. 16124196Sbms * 17124196Sbms * THIS SOFTWARE IS PROVIDED BY BRUCE M. SIMPSON AND AFFILIATES 18124196Sbms * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19124196Sbms * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20124196Sbms * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21124196Sbms * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22124196Sbms * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23124196Sbms * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24124196Sbms * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25124196Sbms * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26124196Sbms * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27124196Sbms * POSSIBILITY OF SUCH DAMAGE. 28124196Sbms * 29124196Sbms * $FreeBSD$ 30124196Sbms */ 31124196Sbms 32124196Sbms/* 33124196Sbms * All fields and quantities in this file are in little-endian byte order, 34124196Sbms * unless otherwise specified. 35124196Sbms */ 36124196Sbms 37124196Sbms#ifndef _PIRTABLE_H 38124196Sbms#define _PIRTABLE_H 39124196Sbms 40124196Sbms#define PIR_BASE 0xF0000 41124196Sbms#define PIR_SIZE 0x10000 42124196Sbms#define PIR_OFFSET 16 43124196Sbms 44140584Sbms#define PIR_DEV(x) (((x) & 0xF8) >> 3) 45124196Sbms#define PIR_FUNC(x) ((x) & 0x7) 46124196Sbms 47124196Sbmstypedef struct { 48164123Sbms uint8_t bus; /* bus number of this device */ 49164123Sbms uint8_t devfunc; /* only upper 5 device bits valid */ 50164123Sbms uint8_t inta_link; /* how INTA is linked */ 51164123Sbms uint16_t inta_irqs; /* how INTA may be routed (bitset) */ 52164123Sbms uint8_t intb_link; 53164123Sbms uint16_t intb_irqs; 54164123Sbms uint8_t intc_link; 55164123Sbms uint16_t intc_irqs; 56164123Sbms uint8_t intd_link; 57164123Sbms uint16_t intd_irqs; /* how this pin may be routed */ 58164123Sbms uint8_t slot; /* physical slot number on bus, 59124196Sbms * slot 0 if motherboard */ 60164123Sbms uint8_t reserved00; /* must be zero */ 61164122Sbms} __packed pir_entry_t; 62124196Sbms 63124196Sbmstypedef struct { 64164123Sbms uint32_t signature; /* $PIR */ 65164123Sbms uint8_t minor; /* minor version (0) */ 66164123Sbms uint8_t major; /* major version (1) */ 67164123Sbms uint16_t size; /* total size of table */ 68164123Sbms uint8_t bus; /* Bus number of router */ 69164123Sbms uint8_t devfunc; /* Dev/Func of router */ 70164123Sbms uint16_t excl_irqs; /* PCI Exclusive IRQs */ 71164123Sbms uint32_t compatible; /* Device/Vendor ID of a register 72124196Sbms * compatible PCI IRQ router device */ 73164123Sbms uint32_t miniport_data; /* Windows specific */ 74164123Sbms uint8_t reserved00[11]; /* Must be zero */ 75164123Sbms uint8_t checksum; /* Inverse mod-256 sum of table bytes */ 76124196Sbms pir_entry_t entry[1]; /* 1..N device entries */ 77164122Sbms} __packed pir_table_t; 78124196Sbms 79124196Sbms#endif /* _PIRTABLE_H */ 80