1181624Skmacy/* 2181624Skmacy * Permission is hereby granted, free of charge, to any person obtaining a copy 3181624Skmacy * of this software and associated documentation files (the "Software"), to 4181624Skmacy * deal in the Software without restriction, including without limitation the 5181624Skmacy * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 6181624Skmacy * sell copies of the Software, and to permit persons to whom the Software is 7181624Skmacy * furnished to do so, subject to the following conditions: 8181624Skmacy * 9181624Skmacy * The above copyright notice and this permission notice shall be included in 10181624Skmacy * all copies or substantial portions of the Software. 11181624Skmacy * 12181624Skmacy * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13181624Skmacy * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14181624Skmacy * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 15181624Skmacy * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 16181624Skmacy * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 17181624Skmacy * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 18181624Skmacy * DEALINGS IN THE SOFTWARE. 19288917Sroyger * 20288917Sroyger * Copyright (c) 2006, Keir Fraser 21181624Skmacy */ 22181624Skmacy 23181624Skmacy#ifndef __XEN_PUBLIC_PHYSDEV_H__ 24181624Skmacy#define __XEN_PUBLIC_PHYSDEV_H__ 25181624Skmacy 26251767Sgibbs#include "xen.h" 27251767Sgibbs 28181624Skmacy/* 29181624Skmacy * Prototype for this hypercall is: 30181624Skmacy * int physdev_op(int cmd, void *args) 31181624Skmacy * @cmd == PHYSDEVOP_??? (physdev operation). 32181624Skmacy * @args == Operation-specific extra arguments (NULL if none). 33181624Skmacy */ 34181624Skmacy 35181624Skmacy/* 36181624Skmacy * Notify end-of-interrupt (EOI) for the specified IRQ. 37181624Skmacy * @arg == pointer to physdev_eoi structure. 38181624Skmacy */ 39181624Skmacy#define PHYSDEVOP_eoi 12 40181624Skmacystruct physdev_eoi { 41181624Skmacy /* IN */ 42181624Skmacy uint32_t irq; 43181624Skmacy}; 44181624Skmacytypedef struct physdev_eoi physdev_eoi_t; 45181624SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_eoi_t); 46181624Skmacy 47181624Skmacy/* 48251767Sgibbs * Register a shared page for the hypervisor to indicate whether the guest 49251767Sgibbs * must issue PHYSDEVOP_eoi. The semantics of PHYSDEVOP_eoi change slightly 50251767Sgibbs * once the guest used this function in that the associated event channel 51251767Sgibbs * will automatically get unmasked. The page registered is used as a bit 52251767Sgibbs * array indexed by Xen's PIRQ value. 53251767Sgibbs */ 54251767Sgibbs#define PHYSDEVOP_pirq_eoi_gmfn_v1 17 55251767Sgibbs/* 56251767Sgibbs * Register a shared page for the hypervisor to indicate whether the 57251767Sgibbs * guest must issue PHYSDEVOP_eoi. This hypercall is very similar to 58251767Sgibbs * PHYSDEVOP_pirq_eoi_gmfn_v1 but it doesn't change the semantics of 59251767Sgibbs * PHYSDEVOP_eoi. The page registered is used as a bit array indexed by 60251767Sgibbs * Xen's PIRQ value. 61251767Sgibbs */ 62251767Sgibbs#define PHYSDEVOP_pirq_eoi_gmfn_v2 28 63251767Sgibbsstruct physdev_pirq_eoi_gmfn { 64251767Sgibbs /* IN */ 65251767Sgibbs xen_pfn_t gmfn; 66251767Sgibbs}; 67251767Sgibbstypedef struct physdev_pirq_eoi_gmfn physdev_pirq_eoi_gmfn_t; 68251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_pirq_eoi_gmfn_t); 69251767Sgibbs 70251767Sgibbs/* 71181624Skmacy * Query the status of an IRQ line. 72181624Skmacy * @arg == pointer to physdev_irq_status_query structure. 73181624Skmacy */ 74181624Skmacy#define PHYSDEVOP_irq_status_query 5 75181624Skmacystruct physdev_irq_status_query { 76181624Skmacy /* IN */ 77181624Skmacy uint32_t irq; 78181624Skmacy /* OUT */ 79181624Skmacy uint32_t flags; /* XENIRQSTAT_* */ 80181624Skmacy}; 81181624Skmacytypedef struct physdev_irq_status_query physdev_irq_status_query_t; 82181624SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_irq_status_query_t); 83181624Skmacy 84181624Skmacy/* Need to call PHYSDEVOP_eoi when the IRQ has been serviced? */ 85181624Skmacy#define _XENIRQSTAT_needs_eoi (0) 86181624Skmacy#define XENIRQSTAT_needs_eoi (1U<<_XENIRQSTAT_needs_eoi) 87181624Skmacy 88181624Skmacy/* IRQ shared by multiple guests? */ 89181624Skmacy#define _XENIRQSTAT_shared (1) 90181624Skmacy#define XENIRQSTAT_shared (1U<<_XENIRQSTAT_shared) 91181624Skmacy 92181624Skmacy/* 93181624Skmacy * Set the current VCPU's I/O privilege level. 94181624Skmacy * @arg == pointer to physdev_set_iopl structure. 95181624Skmacy */ 96181624Skmacy#define PHYSDEVOP_set_iopl 6 97181624Skmacystruct physdev_set_iopl { 98181624Skmacy /* IN */ 99181624Skmacy uint32_t iopl; 100181624Skmacy}; 101181624Skmacytypedef struct physdev_set_iopl physdev_set_iopl_t; 102181624SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_set_iopl_t); 103181624Skmacy 104181624Skmacy/* 105181624Skmacy * Set the current VCPU's I/O-port permissions bitmap. 106181624Skmacy * @arg == pointer to physdev_set_iobitmap structure. 107181624Skmacy */ 108181624Skmacy#define PHYSDEVOP_set_iobitmap 7 109181624Skmacystruct physdev_set_iobitmap { 110181624Skmacy /* IN */ 111183340Skmacy#if __XEN_INTERFACE_VERSION__ >= 0x00030205 112183340Skmacy XEN_GUEST_HANDLE(uint8) bitmap; 113183340Skmacy#else 114183340Skmacy uint8_t *bitmap; 115183340Skmacy#endif 116181624Skmacy uint32_t nr_ports; 117181624Skmacy}; 118181624Skmacytypedef struct physdev_set_iobitmap physdev_set_iobitmap_t; 119181624SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_set_iobitmap_t); 120181624Skmacy 121181624Skmacy/* 122181624Skmacy * Read or write an IO-APIC register. 123181624Skmacy * @arg == pointer to physdev_apic structure. 124181624Skmacy */ 125181624Skmacy#define PHYSDEVOP_apic_read 8 126181624Skmacy#define PHYSDEVOP_apic_write 9 127181624Skmacystruct physdev_apic { 128181624Skmacy /* IN */ 129181624Skmacy unsigned long apic_physbase; 130181624Skmacy uint32_t reg; 131181624Skmacy /* IN or OUT */ 132181624Skmacy uint32_t value; 133181624Skmacy}; 134181624Skmacytypedef struct physdev_apic physdev_apic_t; 135181624SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_apic_t); 136181624Skmacy 137181624Skmacy/* 138181624Skmacy * Allocate or free a physical upcall vector for the specified IRQ line. 139181624Skmacy * @arg == pointer to physdev_irq structure. 140181624Skmacy */ 141181624Skmacy#define PHYSDEVOP_alloc_irq_vector 10 142181624Skmacy#define PHYSDEVOP_free_irq_vector 11 143181624Skmacystruct physdev_irq { 144181624Skmacy /* IN */ 145181624Skmacy uint32_t irq; 146181624Skmacy /* IN or OUT */ 147181624Skmacy uint32_t vector; 148181624Skmacy}; 149181624Skmacytypedef struct physdev_irq physdev_irq_t; 150181624SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_irq_t); 151183340Skmacy 152183340Skmacy#define MAP_PIRQ_TYPE_MSI 0x0 153183340Skmacy#define MAP_PIRQ_TYPE_GSI 0x1 154183340Skmacy#define MAP_PIRQ_TYPE_UNKNOWN 0x2 155251767Sgibbs#define MAP_PIRQ_TYPE_MSI_SEG 0x3 156272310Sroyger#define MAP_PIRQ_TYPE_MULTI_MSI 0x4 157181624Skmacy 158183340Skmacy#define PHYSDEVOP_map_pirq 13 159183340Skmacystruct physdev_map_pirq { 160183340Skmacy domid_t domid; 161183340Skmacy /* IN */ 162183340Skmacy int type; 163288917Sroyger /* IN (ignored for ..._MULTI_MSI) */ 164183340Skmacy int index; 165183340Skmacy /* IN or OUT */ 166183340Skmacy int pirq; 167288917Sroyger /* IN - high 16 bits hold segment for ..._MSI_SEG and ..._MULTI_MSI */ 168183340Skmacy int bus; 169183340Skmacy /* IN */ 170183340Skmacy int devfn; 171288917Sroyger /* IN (also OUT for ..._MULTI_MSI) */ 172183340Skmacy int entry_nr; 173183340Skmacy /* IN */ 174183340Skmacy uint64_t table_base; 175183340Skmacy}; 176183340Skmacytypedef struct physdev_map_pirq physdev_map_pirq_t; 177183340SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_map_pirq_t); 178183340Skmacy 179183340Skmacy#define PHYSDEVOP_unmap_pirq 14 180183340Skmacystruct physdev_unmap_pirq { 181183340Skmacy domid_t domid; 182183340Skmacy /* IN */ 183183340Skmacy int pirq; 184183340Skmacy}; 185183340Skmacy 186183340Skmacytypedef struct physdev_unmap_pirq physdev_unmap_pirq_t; 187183340SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_unmap_pirq_t); 188183340Skmacy 189183340Skmacy#define PHYSDEVOP_manage_pci_add 15 190183340Skmacy#define PHYSDEVOP_manage_pci_remove 16 191183340Skmacystruct physdev_manage_pci { 192183340Skmacy /* IN */ 193183340Skmacy uint8_t bus; 194183340Skmacy uint8_t devfn; 195183340Skmacy}; 196183340Skmacy 197183340Skmacytypedef struct physdev_manage_pci physdev_manage_pci_t; 198183340SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_manage_pci_t); 199183340Skmacy 200251767Sgibbs#define PHYSDEVOP_restore_msi 19 201251767Sgibbsstruct physdev_restore_msi { 202251767Sgibbs /* IN */ 203251767Sgibbs uint8_t bus; 204251767Sgibbs uint8_t devfn; 205251767Sgibbs}; 206251767Sgibbstypedef struct physdev_restore_msi physdev_restore_msi_t; 207251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_restore_msi_t); 208251767Sgibbs 209251767Sgibbs#define PHYSDEVOP_manage_pci_add_ext 20 210251767Sgibbsstruct physdev_manage_pci_ext { 211251767Sgibbs /* IN */ 212251767Sgibbs uint8_t bus; 213251767Sgibbs uint8_t devfn; 214251767Sgibbs unsigned is_extfn; 215251767Sgibbs unsigned is_virtfn; 216251767Sgibbs struct { 217251767Sgibbs uint8_t bus; 218251767Sgibbs uint8_t devfn; 219251767Sgibbs } physfn; 220251767Sgibbs}; 221251767Sgibbs 222251767Sgibbstypedef struct physdev_manage_pci_ext physdev_manage_pci_ext_t; 223251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_manage_pci_ext_t); 224251767Sgibbs 225181624Skmacy/* 226181624Skmacy * Argument to physdev_op_compat() hypercall. Superceded by new physdev_op() 227181624Skmacy * hypercall since 0x00030202. 228181624Skmacy */ 229181624Skmacystruct physdev_op { 230181624Skmacy uint32_t cmd; 231181624Skmacy union { 232181624Skmacy struct physdev_irq_status_query irq_status_query; 233181624Skmacy struct physdev_set_iopl set_iopl; 234181624Skmacy struct physdev_set_iobitmap set_iobitmap; 235181624Skmacy struct physdev_apic apic_op; 236181624Skmacy struct physdev_irq irq_op; 237181624Skmacy } u; 238181624Skmacy}; 239181624Skmacytypedef struct physdev_op physdev_op_t; 240181624SkmacyDEFINE_XEN_GUEST_HANDLE(physdev_op_t); 241181624Skmacy 242251767Sgibbs#define PHYSDEVOP_setup_gsi 21 243251767Sgibbsstruct physdev_setup_gsi { 244251767Sgibbs int gsi; 245251767Sgibbs /* IN */ 246251767Sgibbs uint8_t triggering; 247251767Sgibbs /* IN */ 248251767Sgibbs uint8_t polarity; 249251767Sgibbs /* IN */ 250251767Sgibbs}; 251251767Sgibbs 252251767Sgibbstypedef struct physdev_setup_gsi physdev_setup_gsi_t; 253251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_setup_gsi_t); 254251767Sgibbs 255251767Sgibbs/* leave PHYSDEVOP 22 free */ 256251767Sgibbs 257251767Sgibbs/* type is MAP_PIRQ_TYPE_GSI or MAP_PIRQ_TYPE_MSI 258251767Sgibbs * the hypercall returns a free pirq */ 259251767Sgibbs#define PHYSDEVOP_get_free_pirq 23 260251767Sgibbsstruct physdev_get_free_pirq { 261251767Sgibbs /* IN */ 262251767Sgibbs int type; 263251767Sgibbs /* OUT */ 264251767Sgibbs uint32_t pirq; 265251767Sgibbs}; 266251767Sgibbs 267251767Sgibbstypedef struct physdev_get_free_pirq physdev_get_free_pirq_t; 268251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_get_free_pirq_t); 269251767Sgibbs 270251767Sgibbs#define XEN_PCI_MMCFG_RESERVED 0x1 271251767Sgibbs 272251767Sgibbs#define PHYSDEVOP_pci_mmcfg_reserved 24 273251767Sgibbsstruct physdev_pci_mmcfg_reserved { 274251767Sgibbs uint64_t address; 275251767Sgibbs uint16_t segment; 276251767Sgibbs uint8_t start_bus; 277251767Sgibbs uint8_t end_bus; 278251767Sgibbs uint32_t flags; 279251767Sgibbs}; 280251767Sgibbstypedef struct physdev_pci_mmcfg_reserved physdev_pci_mmcfg_reserved_t; 281251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_pci_mmcfg_reserved_t); 282251767Sgibbs 283251767Sgibbs#define XEN_PCI_DEV_EXTFN 0x1 284251767Sgibbs#define XEN_PCI_DEV_VIRTFN 0x2 285251767Sgibbs#define XEN_PCI_DEV_PXM 0x4 286251767Sgibbs 287251767Sgibbs#define PHYSDEVOP_pci_device_add 25 288251767Sgibbsstruct physdev_pci_device_add { 289251767Sgibbs /* IN */ 290251767Sgibbs uint16_t seg; 291251767Sgibbs uint8_t bus; 292251767Sgibbs uint8_t devfn; 293251767Sgibbs uint32_t flags; 294251767Sgibbs struct { 295251767Sgibbs uint8_t bus; 296251767Sgibbs uint8_t devfn; 297251767Sgibbs } physfn; 298288917Sroyger /* 299288917Sroyger * Optional parameters array. 300288917Sroyger * First element ([0]) is PXM domain associated with the device (if 301288917Sroyger * XEN_PCI_DEV_PXM is set) 302288917Sroyger */ 303251767Sgibbs#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L 304251767Sgibbs uint32_t optarr[]; 305251767Sgibbs#elif defined(__GNUC__) 306251767Sgibbs uint32_t optarr[0]; 307251767Sgibbs#endif 308251767Sgibbs}; 309251767Sgibbstypedef struct physdev_pci_device_add physdev_pci_device_add_t; 310251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_pci_device_add_t); 311251767Sgibbs 312251767Sgibbs#define PHYSDEVOP_pci_device_remove 26 313251767Sgibbs#define PHYSDEVOP_restore_msi_ext 27 314288917Sroyger/* 315288917Sroyger * Dom0 should use these two to announce MMIO resources assigned to 316288917Sroyger * MSI-X capable devices won't (prepare) or may (release) change. 317288917Sroyger */ 318288917Sroyger#define PHYSDEVOP_prepare_msix 30 319288917Sroyger#define PHYSDEVOP_release_msix 31 320251767Sgibbsstruct physdev_pci_device { 321251767Sgibbs /* IN */ 322251767Sgibbs uint16_t seg; 323251767Sgibbs uint8_t bus; 324251767Sgibbs uint8_t devfn; 325251767Sgibbs}; 326251767Sgibbstypedef struct physdev_pci_device physdev_pci_device_t; 327251767SgibbsDEFINE_XEN_GUEST_HANDLE(physdev_pci_device_t); 328251767Sgibbs 329288917Sroyger#define PHYSDEVOP_DBGP_RESET_PREPARE 1 330288917Sroyger#define PHYSDEVOP_DBGP_RESET_DONE 2 331288917Sroyger 332288917Sroyger#define PHYSDEVOP_DBGP_BUS_UNKNOWN 0 333288917Sroyger#define PHYSDEVOP_DBGP_BUS_PCI 1 334288917Sroyger 335288917Sroyger#define PHYSDEVOP_dbgp_op 29 336288917Sroygerstruct physdev_dbgp_op { 337288917Sroyger /* IN */ 338288917Sroyger uint8_t op; 339288917Sroyger uint8_t bus; 340288917Sroyger union { 341288917Sroyger struct physdev_pci_device pci; 342288917Sroyger } u; 343288917Sroyger}; 344288917Sroygertypedef struct physdev_dbgp_op physdev_dbgp_op_t; 345288917SroygerDEFINE_XEN_GUEST_HANDLE(physdev_dbgp_op_t); 346288917Sroyger 347181624Skmacy/* 348181624Skmacy * Notify that some PIRQ-bound event channels have been unmasked. 349181624Skmacy * ** This command is obsolete since interface version 0x00030202 and is ** 350181624Skmacy * ** unsupported by newer versions of Xen. ** 351181624Skmacy */ 352181624Skmacy#define PHYSDEVOP_IRQ_UNMASK_NOTIFY 4 353181624Skmacy 354288917Sroyger#if __XEN_INTERFACE_VERSION__ < 0x00040600 355181624Skmacy/* 356181624Skmacy * These all-capitals physdev operation names are superceded by the new names 357288917Sroyger * (defined above) since interface version 0x00030202. The guard above was 358288917Sroyger * added post-4.5 only though and hence shouldn't check for 0x00030202. 359181624Skmacy */ 360181624Skmacy#define PHYSDEVOP_IRQ_STATUS_QUERY PHYSDEVOP_irq_status_query 361181624Skmacy#define PHYSDEVOP_SET_IOPL PHYSDEVOP_set_iopl 362181624Skmacy#define PHYSDEVOP_SET_IOBITMAP PHYSDEVOP_set_iobitmap 363181624Skmacy#define PHYSDEVOP_APIC_READ PHYSDEVOP_apic_read 364181624Skmacy#define PHYSDEVOP_APIC_WRITE PHYSDEVOP_apic_write 365181624Skmacy#define PHYSDEVOP_ASSIGN_VECTOR PHYSDEVOP_alloc_irq_vector 366181624Skmacy#define PHYSDEVOP_FREE_VECTOR PHYSDEVOP_free_irq_vector 367181624Skmacy#define PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY XENIRQSTAT_needs_eoi 368181624Skmacy#define PHYSDEVOP_IRQ_SHARED XENIRQSTAT_shared 369288917Sroyger#endif 370181624Skmacy 371251767Sgibbs#if __XEN_INTERFACE_VERSION__ < 0x00040200 372251767Sgibbs#define PHYSDEVOP_pirq_eoi_gmfn PHYSDEVOP_pirq_eoi_gmfn_v1 373251767Sgibbs#else 374251767Sgibbs#define PHYSDEVOP_pirq_eoi_gmfn PHYSDEVOP_pirq_eoi_gmfn_v2 375251767Sgibbs#endif 376251767Sgibbs 377181624Skmacy#endif /* __XEN_PUBLIC_PHYSDEV_H__ */ 378181624Skmacy 379181624Skmacy/* 380181624Skmacy * Local variables: 381181624Skmacy * mode: C 382288917Sroyger * c-file-style: "BSD" 383181624Skmacy * c-basic-offset: 4 384181624Skmacy * tab-width: 4 385181624Skmacy * indent-tabs-mode: nil 386181624Skmacy * End: 387181624Skmacy */ 388