1251767Sgibbs/****************************************************************************** 2251767Sgibbs * arch-arm.h 3251767Sgibbs * 4251767Sgibbs * Guest OS interface to ARM Xen. 5251767Sgibbs * 6251767Sgibbs * Permission is hereby granted, free of charge, to any person obtaining a copy 7251767Sgibbs * of this software and associated documentation files (the "Software"), to 8251767Sgibbs * deal in the Software without restriction, including without limitation the 9251767Sgibbs * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10251767Sgibbs * sell copies of the Software, and to permit persons to whom the Software is 11251767Sgibbs * furnished to do so, subject to the following conditions: 12251767Sgibbs * 13251767Sgibbs * The above copyright notice and this permission notice shall be included in 14251767Sgibbs * all copies or substantial portions of the Software. 15251767Sgibbs * 16251767Sgibbs * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17251767Sgibbs * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18251767Sgibbs * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19251767Sgibbs * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20251767Sgibbs * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21251767Sgibbs * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22251767Sgibbs * DEALINGS IN THE SOFTWARE. 23251767Sgibbs * 24251767Sgibbs * Copyright 2011 (C) Citrix Systems 25251767Sgibbs */ 26251767Sgibbs 27251767Sgibbs#ifndef __XEN_PUBLIC_ARCH_ARM_H__ 28251767Sgibbs#define __XEN_PUBLIC_ARCH_ARM_H__ 29251767Sgibbs 30288917Sroyger/* 31288917Sroyger * `incontents 50 arm_abi Hypercall Calling Convention 32251767Sgibbs * 33251767Sgibbs * A hypercall is issued using the ARM HVC instruction. 34251767Sgibbs * 35251767Sgibbs * A hypercall can take up to 5 arguments. These are passed in 36288917Sroyger * registers, the first argument in x0/r0 (for arm64/arm32 guests 37288917Sroyger * respectively irrespective of whether the underlying hypervisor is 38288917Sroyger * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2, 39288917Sroyger * the forth in x3/r3 and the fifth in x4/r4. 40251767Sgibbs * 41288917Sroyger * The hypercall number is passed in r12 (arm) or x16 (arm64). In both 42288917Sroyger * cases the relevant ARM procedure calling convention specifies this 43288917Sroyger * is an inter-procedure-call scratch register (e.g. for use in linker 44288917Sroyger * stubs). This use does not conflict with use during a hypercall. 45251767Sgibbs * 46251767Sgibbs * The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG. 47251767Sgibbs * 48288917Sroyger * The return value is in x0/r0. 49251767Sgibbs * 50288917Sroyger * The hypercall will clobber x16/r12 and the argument registers used 51288917Sroyger * by that hypercall (except r0 which is the return value) i.e. in 52288917Sroyger * addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a 53288917Sroyger * 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3. 54251767Sgibbs * 55288917Sroyger * Parameter structs passed to hypercalls are laid out according to 56288917Sroyger * the Procedure Call Standard for the ARM Architecture (AAPCS, AKA 57288917Sroyger * EABI) and Procedure Call Standard for the ARM 64-bit Architecture 58288917Sroyger * (AAPCS64). Where there is a conflict the 64-bit standard should be 59288917Sroyger * used regardless of guest type. Structures which are passed as 60288917Sroyger * hypercall arguments are always little endian. 61288917Sroyger * 62288917Sroyger * All memory which is shared with other entities in the system 63288917Sroyger * (including the hypervisor and other guests) must reside in memory 64288917Sroyger * which is mapped as Normal Inner-cacheable. This applies to: 65288917Sroyger * - hypercall arguments passed via a pointer to guest memory. 66288917Sroyger * - memory shared via the grant table mechanism (including PV I/O 67288917Sroyger * rings etc). 68288917Sroyger * - memory shared with the hypervisor (struct shared_info, struct 69288917Sroyger * vcpu_info, the grant table, etc). 70288917Sroyger * 71288917Sroyger * Any Inner cache allocation strategy (Write-Back, Write-Through etc) 72288917Sroyger * is acceptable. There is no restriction on the Outer-cacheability. 73251767Sgibbs */ 74251767Sgibbs 75288917Sroyger/* 76288917Sroyger * `incontents 55 arm_hcall Supported Hypercalls 77288917Sroyger * 78288917Sroyger * Xen on ARM makes extensive use of hardware facilities and therefore 79288917Sroyger * only a subset of the potential hypercalls are required. 80288917Sroyger * 81288917Sroyger * Since ARM uses second stage paging any machine/physical addresses 82288917Sroyger * passed to hypercalls are Guest Physical Addresses (Intermediate 83288917Sroyger * Physical Addresses) unless otherwise noted. 84288917Sroyger * 85288917Sroyger * The following hypercalls (and sub operations) are supported on the 86288917Sroyger * ARM platform. Other hypercalls should be considered 87288917Sroyger * unavailable/unsupported. 88288917Sroyger * 89288917Sroyger * HYPERVISOR_memory_op 90288917Sroyger * All generic sub-operations 91288917Sroyger * 92288917Sroyger * HYPERVISOR_domctl 93288917Sroyger * All generic sub-operations, with the exception of: 94288917Sroyger * * XEN_DOMCTL_irq_permission (not yet implemented) 95288917Sroyger * 96288917Sroyger * HYPERVISOR_sched_op 97288917Sroyger * All generic sub-operations, with the exception of: 98288917Sroyger * * SCHEDOP_block -- prefer wfi hardware instruction 99288917Sroyger * 100288917Sroyger * HYPERVISOR_console_io 101288917Sroyger * All generic sub-operations 102288917Sroyger * 103288917Sroyger * HYPERVISOR_xen_version 104288917Sroyger * All generic sub-operations 105288917Sroyger * 106288917Sroyger * HYPERVISOR_event_channel_op 107288917Sroyger * All generic sub-operations 108288917Sroyger * 109288917Sroyger * HYPERVISOR_physdev_op 110288917Sroyger * No sub-operations are currenty supported 111288917Sroyger * 112288917Sroyger * HYPERVISOR_sysctl 113288917Sroyger * All generic sub-operations, with the exception of: 114288917Sroyger * * XEN_SYSCTL_page_offline_op 115288917Sroyger * * XEN_SYSCTL_get_pmstat 116288917Sroyger * * XEN_SYSCTL_pm_op 117288917Sroyger * 118288917Sroyger * HYPERVISOR_hvm_op 119288917Sroyger * Exactly these sub-operations are supported: 120288917Sroyger * * HVMOP_set_param 121288917Sroyger * * HVMOP_get_param 122288917Sroyger * 123288917Sroyger * HYPERVISOR_grant_table_op 124288917Sroyger * All generic sub-operations 125288917Sroyger * 126288917Sroyger * HYPERVISOR_vcpu_op 127288917Sroyger * Exactly these sub-operations are supported: 128288917Sroyger * * VCPUOP_register_vcpu_info 129288917Sroyger * * VCPUOP_register_runstate_memory_area 130288917Sroyger * 131288917Sroyger * 132288917Sroyger * Other notes on the ARM ABI: 133288917Sroyger * 134288917Sroyger * - struct start_info is not exported to ARM guests. 135288917Sroyger * 136288917Sroyger * - struct shared_info is mapped by ARM guests using the 137288917Sroyger * HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing 138288917Sroyger * XENMAPSPACE_shared_info as space parameter. 139288917Sroyger * 140288917Sroyger * - All the per-cpu struct vcpu_info are mapped by ARM guests using the 141288917Sroyger * HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0 142288917Sroyger * struct vcpu_info. 143288917Sroyger * 144288917Sroyger * - The grant table is mapped using the HYPERVISOR_memory_op sub-op 145288917Sroyger * XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space 146288917Sroyger * parameter. The memory range specified under the Xen compatible 147288917Sroyger * hypervisor node on device tree can be used as target gpfn for the 148288917Sroyger * mapping. 149288917Sroyger * 150288917Sroyger * - Xenstore is initialized by using the two hvm_params 151288917Sroyger * HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read 152288917Sroyger * with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. 153288917Sroyger * 154288917Sroyger * - The paravirtualized console is initialized by using the two 155288917Sroyger * hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They 156288917Sroyger * can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. 157288917Sroyger * 158288917Sroyger * - Event channel notifications are delivered using the percpu GIC 159288917Sroyger * interrupt specified under the Xen compatible hypervisor node on 160288917Sroyger * device tree. 161288917Sroyger * 162288917Sroyger * - The device tree Xen compatible node is fully described under Linux 163288917Sroyger * at Documentation/devicetree/bindings/arm/xen.txt. 164288917Sroyger */ 165288917Sroyger 166251767Sgibbs#define XEN_HYPERCALL_TAG 0XEA1 167251767Sgibbs 168288917Sroyger#define int64_aligned_t int64_t __attribute__((aligned(8))) 169288917Sroyger#define uint64_aligned_t uint64_t __attribute__((aligned(8))) 170251767Sgibbs 171251767Sgibbs#ifndef __ASSEMBLY__ 172288917Sroyger#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 173288917Sroyger typedef union { type *p; unsigned long q; } \ 174288917Sroyger __guest_handle_ ## name; \ 175288917Sroyger typedef union { type *p; uint64_aligned_t q; } \ 176288917Sroyger __guest_handle_64_ ## name; 177251767Sgibbs 178288917Sroyger/* 179288917Sroyger * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field 180288917Sroyger * in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes 181288917Sroyger * aligned. 182288917Sroyger * XEN_GUEST_HANDLE_PARAM represents a guest pointer, when passed as an 183288917Sroyger * hypercall argument. It is 4 bytes on aarch32 and 8 bytes on aarch64. 184288917Sroyger */ 185251767Sgibbs#define __DEFINE_XEN_GUEST_HANDLE(name, type) \ 186251767Sgibbs ___DEFINE_XEN_GUEST_HANDLE(name, type); \ 187251767Sgibbs ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) 188251767Sgibbs#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) 189288917Sroyger#define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name 190251767Sgibbs#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) 191288917Sroyger#define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name 192288917Sroyger#define set_xen_guest_handle_raw(hnd, val) \ 193288917Sroyger do { \ 194288917Sroyger typeof(&(hnd)) _sxghr_tmp = &(hnd); \ 195288917Sroyger _sxghr_tmp->q = 0; \ 196288917Sroyger _sxghr_tmp->p = val; \ 197288917Sroyger } while ( 0 ) 198251767Sgibbs#ifdef __XEN_TOOLS__ 199251767Sgibbs#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0) 200251767Sgibbs#endif 201251767Sgibbs#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) 202251767Sgibbs 203288917Sroyger#if defined(__GNUC__) && !defined(__STRICT_ANSI__) 204288917Sroyger/* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ 205288917Sroyger# define __DECL_REG(n64, n32) union { \ 206288917Sroyger uint64_t n64; \ 207288917Sroyger uint32_t n32; \ 208288917Sroyger } 209288917Sroyger#else 210288917Sroyger/* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */ 211288917Sroyger#define __DECL_REG(n64, n32) uint64_t n64 212288917Sroyger#endif 213288917Sroyger 214288917Sroygerstruct vcpu_guest_core_regs 215251767Sgibbs{ 216288917Sroyger /* Aarch64 Aarch32 */ 217288917Sroyger __DECL_REG(x0, r0_usr); 218288917Sroyger __DECL_REG(x1, r1_usr); 219288917Sroyger __DECL_REG(x2, r2_usr); 220288917Sroyger __DECL_REG(x3, r3_usr); 221288917Sroyger __DECL_REG(x4, r4_usr); 222288917Sroyger __DECL_REG(x5, r5_usr); 223288917Sroyger __DECL_REG(x6, r6_usr); 224288917Sroyger __DECL_REG(x7, r7_usr); 225288917Sroyger __DECL_REG(x8, r8_usr); 226288917Sroyger __DECL_REG(x9, r9_usr); 227288917Sroyger __DECL_REG(x10, r10_usr); 228288917Sroyger __DECL_REG(x11, r11_usr); 229288917Sroyger __DECL_REG(x12, r12_usr); 230251767Sgibbs 231288917Sroyger __DECL_REG(x13, sp_usr); 232288917Sroyger __DECL_REG(x14, lr_usr); 233251767Sgibbs 234288917Sroyger __DECL_REG(x15, __unused_sp_hyp); 235251767Sgibbs 236288917Sroyger __DECL_REG(x16, lr_irq); 237288917Sroyger __DECL_REG(x17, sp_irq); 238251767Sgibbs 239288917Sroyger __DECL_REG(x18, lr_svc); 240288917Sroyger __DECL_REG(x19, sp_svc); 241251767Sgibbs 242288917Sroyger __DECL_REG(x20, lr_abt); 243288917Sroyger __DECL_REG(x21, sp_abt); 244251767Sgibbs 245288917Sroyger __DECL_REG(x22, lr_und); 246288917Sroyger __DECL_REG(x23, sp_und); 247251767Sgibbs 248288917Sroyger __DECL_REG(x24, r8_fiq); 249288917Sroyger __DECL_REG(x25, r9_fiq); 250288917Sroyger __DECL_REG(x26, r10_fiq); 251288917Sroyger __DECL_REG(x27, r11_fiq); 252288917Sroyger __DECL_REG(x28, r12_fiq); 253251767Sgibbs 254288917Sroyger __DECL_REG(x29, sp_fiq); 255288917Sroyger __DECL_REG(x30, lr_fiq); 256251767Sgibbs 257288917Sroyger /* Return address and mode */ 258288917Sroyger __DECL_REG(pc64, pc32); /* ELR_EL2 */ 259288917Sroyger uint32_t cpsr; /* SPSR_EL2 */ 260288917Sroyger 261288917Sroyger union { 262288917Sroyger uint32_t spsr_el1; /* AArch64 */ 263288917Sroyger uint32_t spsr_svc; /* AArch32 */ 264288917Sroyger }; 265288917Sroyger 266288917Sroyger /* AArch32 guests only */ 267288917Sroyger uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt; 268288917Sroyger 269288917Sroyger /* AArch64 guests only */ 270288917Sroyger uint64_t sp_el0; 271288917Sroyger uint64_t sp_el1, elr_el1; 272251767Sgibbs}; 273288917Sroygertypedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t; 274288917SroygerDEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t); 275251767Sgibbs 276288917Sroyger#undef __DECL_REG 277288917Sroyger 278251767Sgibbstypedef uint64_t xen_pfn_t; 279251767Sgibbs#define PRI_xen_pfn PRIx64 280251767Sgibbs 281251767Sgibbs/* Maximum number of virtual CPUs in legacy multi-processor guests. */ 282251767Sgibbs/* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */ 283251767Sgibbs#define XEN_LEGACY_MAX_VCPUS 1 284251767Sgibbs 285288917Sroygertypedef uint64_t xen_ulong_t; 286288917Sroyger#define PRI_xen_ulong PRIx64 287251767Sgibbs 288288917Sroyger#if defined(__XEN__) || defined(__XEN_TOOLS__) 289251767Sgibbsstruct vcpu_guest_context { 290288917Sroyger#define _VGCF_online 0 291288917Sroyger#define VGCF_online (1<<_VGCF_online) 292288917Sroyger uint32_t flags; /* VGCF_* */ 293251767Sgibbs 294288917Sroyger struct vcpu_guest_core_regs user_regs; /* Core CPU registers */ 295288917Sroyger 296251767Sgibbs uint32_t sctlr; 297288917Sroyger uint64_t ttbcr, ttbr0, ttbr1; 298251767Sgibbs}; 299251767Sgibbstypedef struct vcpu_guest_context vcpu_guest_context_t; 300251767SgibbsDEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 301251767Sgibbs 302288917Sroyger/* 303288917Sroyger * struct xen_arch_domainconfig's ABI is covered by 304288917Sroyger * XEN_DOMCTL_INTERFACE_VERSION. 305288917Sroyger */ 306288917Sroyger#define XEN_DOMCTL_CONFIG_GIC_NATIVE 0 307288917Sroyger#define XEN_DOMCTL_CONFIG_GIC_V2 1 308288917Sroyger#define XEN_DOMCTL_CONFIG_GIC_V3 2 309288917Sroygerstruct xen_arch_domainconfig { 310288917Sroyger /* IN/OUT */ 311288917Sroyger uint8_t gic_version; 312288917Sroyger /* IN */ 313288917Sroyger uint32_t nr_spis; 314288917Sroyger /* 315288917Sroyger * OUT 316288917Sroyger * Based on the property clock-frequency in the DT timer node. 317288917Sroyger * The property may be present when the bootloader/firmware doesn't 318288917Sroyger * set correctly CNTFRQ which hold the timer frequency. 319288917Sroyger * 320288917Sroyger * As it's not possible to trap this register, we have to replicate 321288917Sroyger * the value in the guest DT. 322288917Sroyger * 323288917Sroyger * = 0 => property not present 324288917Sroyger * > 0 => Value of the property 325288917Sroyger * 326288917Sroyger */ 327288917Sroyger uint32_t clock_frequency; 328288917Sroyger}; 329288917Sroyger#endif /* __XEN__ || __XEN_TOOLS__ */ 330288917Sroyger 331288917Sroygerstruct arch_vcpu_info { 332288917Sroyger}; 333251767Sgibbstypedef struct arch_vcpu_info arch_vcpu_info_t; 334251767Sgibbs 335288917Sroygerstruct arch_shared_info { 336288917Sroyger}; 337251767Sgibbstypedef struct arch_shared_info arch_shared_info_t; 338251767Sgibbstypedef uint64_t xen_callback_t; 339251767Sgibbs 340288917Sroyger#endif 341251767Sgibbs 342288917Sroyger#if defined(__XEN__) || defined(__XEN_TOOLS__) 343251767Sgibbs 344288917Sroyger/* PSR bits (CPSR, SPSR) */ 345288917Sroyger 346288917Sroyger#define PSR_THUMB (1<<5) /* Thumb Mode enable */ 347288917Sroyger#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ 348288917Sroyger#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ 349288917Sroyger#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ 350288917Sroyger#define PSR_BIG_ENDIAN (1<<9) /* arm32: Big Endian Mode */ 351288917Sroyger#define PSR_DBG_MASK (1<<9) /* arm64: Debug Exception mask */ 352288917Sroyger#define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */ 353288917Sroyger#define PSR_JAZELLE (1<<24) /* Jazelle Mode */ 354288917Sroyger 355288917Sroyger/* 32 bit modes */ 356251767Sgibbs#define PSR_MODE_USR 0x10 357251767Sgibbs#define PSR_MODE_FIQ 0x11 358251767Sgibbs#define PSR_MODE_IRQ 0x12 359251767Sgibbs#define PSR_MODE_SVC 0x13 360251767Sgibbs#define PSR_MODE_MON 0x16 361251767Sgibbs#define PSR_MODE_ABT 0x17 362251767Sgibbs#define PSR_MODE_HYP 0x1a 363251767Sgibbs#define PSR_MODE_UND 0x1b 364251767Sgibbs#define PSR_MODE_SYS 0x1f 365251767Sgibbs 366288917Sroyger/* 64 bit modes */ 367288917Sroyger#define PSR_MODE_BIT 0x10 /* Set iff AArch32 */ 368288917Sroyger#define PSR_MODE_EL3h 0x0d 369288917Sroyger#define PSR_MODE_EL3t 0x0c 370288917Sroyger#define PSR_MODE_EL2h 0x09 371288917Sroyger#define PSR_MODE_EL2t 0x08 372288917Sroyger#define PSR_MODE_EL1h 0x05 373288917Sroyger#define PSR_MODE_EL1t 0x04 374288917Sroyger#define PSR_MODE_EL0t 0x00 375251767Sgibbs 376288917Sroyger#define PSR_GUEST32_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC) 377288917Sroyger#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h) 378288917Sroyger 379288917Sroyger#define SCTLR_GUEST_INIT 0x00c50078 380288917Sroyger 381288917Sroyger/* 382288917Sroyger * Virtual machine platform (memory layout, interrupts) 383288917Sroyger * 384288917Sroyger * These are defined for consistency between the tools and the 385288917Sroyger * hypervisor. Guests must not rely on these hardcoded values but 386288917Sroyger * should instead use the FDT. 387288917Sroyger */ 388288917Sroyger 389288917Sroyger/* Physical Address Space */ 390288917Sroyger 391288917Sroyger/* 392288917Sroyger * vGIC mappings: Only one set of mapping is used by the guest. 393288917Sroyger * Therefore they can overlap. 394288917Sroyger */ 395288917Sroyger 396288917Sroyger/* vGIC v2 mappings */ 397288917Sroyger#define GUEST_GICD_BASE 0x03001000ULL 398288917Sroyger#define GUEST_GICD_SIZE 0x00001000ULL 399288917Sroyger#define GUEST_GICC_BASE 0x03002000ULL 400288917Sroyger#define GUEST_GICC_SIZE 0x00000100ULL 401288917Sroyger 402288917Sroyger/* vGIC v3 mappings */ 403288917Sroyger#define GUEST_GICV3_GICD_BASE 0x03001000ULL 404288917Sroyger#define GUEST_GICV3_GICD_SIZE 0x00010000ULL 405288917Sroyger 406288917Sroyger#define GUEST_GICV3_RDIST_STRIDE 0x20000ULL 407288917Sroyger#define GUEST_GICV3_RDIST_REGIONS 1 408288917Sroyger 409288917Sroyger#define GUEST_GICV3_GICR0_BASE 0x03020000ULL /* vCPU0 - vCPU127 */ 410288917Sroyger#define GUEST_GICV3_GICR0_SIZE 0x01000000ULL 411288917Sroyger 412288917Sroyger/* 413288917Sroyger * 16MB == 4096 pages reserved for guest to use as a region to map its 414288917Sroyger * grant table in. 415288917Sroyger */ 416288917Sroyger#define GUEST_GNTTAB_BASE 0x38000000ULL 417288917Sroyger#define GUEST_GNTTAB_SIZE 0x01000000ULL 418288917Sroyger 419288917Sroyger#define GUEST_MAGIC_BASE 0x39000000ULL 420288917Sroyger#define GUEST_MAGIC_SIZE 0x01000000ULL 421288917Sroyger 422288917Sroyger#define GUEST_RAM_BANKS 2 423288917Sroyger 424288917Sroyger#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of low RAM @ 1GB */ 425288917Sroyger#define GUEST_RAM0_SIZE 0xc0000000ULL 426288917Sroyger 427288917Sroyger#define GUEST_RAM1_BASE 0x0200000000ULL /* 1016GB of RAM @ 8GB */ 428288917Sroyger#define GUEST_RAM1_SIZE 0xfe00000000ULL 429288917Sroyger 430288917Sroyger#define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */ 431288917Sroyger/* Largest amount of actual RAM, not including holes */ 432288917Sroyger#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE) 433288917Sroyger/* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */ 434288917Sroyger#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } 435288917Sroyger#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } 436288917Sroyger 437288917Sroyger/* Interrupts */ 438288917Sroyger#define GUEST_TIMER_VIRT_PPI 27 439288917Sroyger#define GUEST_TIMER_PHYS_S_PPI 29 440288917Sroyger#define GUEST_TIMER_PHYS_NS_PPI 30 441288917Sroyger#define GUEST_EVTCHN_PPI 31 442288917Sroyger 443288917Sroyger/* PSCI functions */ 444288917Sroyger#define PSCI_cpu_suspend 0 445288917Sroyger#define PSCI_cpu_off 1 446288917Sroyger#define PSCI_cpu_on 2 447288917Sroyger#define PSCI_migrate 3 448288917Sroyger 449288917Sroyger#endif 450288917Sroyger 451288917Sroyger#ifndef __ASSEMBLY__ 452288917Sroyger/* Stub definition of PMU structure */ 453288917Sroygertypedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t; 454288917Sroyger#endif 455288917Sroyger 456251767Sgibbs#endif /* __XEN_PUBLIC_ARCH_ARM_H__ */ 457251767Sgibbs 458251767Sgibbs/* 459251767Sgibbs * Local variables: 460251767Sgibbs * mode: C 461288917Sroyger * c-file-style: "BSD" 462251767Sgibbs * c-basic-offset: 4 463251767Sgibbs * tab-width: 4 464251767Sgibbs * indent-tabs-mode: nil 465251767Sgibbs * End: 466251767Sgibbs */ 467