tsc.c revision 219473
14Srgrimes/*- 2110379Sphk * Copyright (c) 1998-2003 Poul-Henning Kamp 34Srgrimes * All rights reserved. 44Srgrimes * 54Srgrimes * Redistribution and use in source and binary forms, with or without 64Srgrimes * modification, are permitted provided that the following conditions 74Srgrimes * are met: 84Srgrimes * 1. Redistributions of source code must retain the above copyright 94Srgrimes * notice, this list of conditions and the following disclaimer. 104Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 114Srgrimes * notice, this list of conditions and the following disclaimer in the 124Srgrimes * documentation and/or other materials provided with the distribution. 134Srgrimes * 14110379Sphk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 154Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 164Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17110379Sphk * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 184Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 194Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 204Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 214Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 224Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 234Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 244Srgrimes * SUCH DAMAGE. 254Srgrimes */ 264Srgrimes 27115683Sobrien#include <sys/cdefs.h> 28115683Sobrien__FBSDID("$FreeBSD: head/sys/x86/x86/tsc.c 219473 2011-03-11 00:44:32Z jkim $"); 29115683Sobrien 3016299Spst#include "opt_clock.h" 3113228Swollman 322056Swollman#include <sys/param.h> 33167905Snjl#include <sys/bus.h> 34167905Snjl#include <sys/cpu.h> 35167905Snjl#include <sys/malloc.h> 362056Swollman#include <sys/systm.h> 37113348Sdes#include <sys/sysctl.h> 382056Swollman#include <sys/time.h> 3958377Sphk#include <sys/timetc.h> 402056Swollman#include <sys/kernel.h> 4185835Siwasaki#include <sys/power.h> 42113348Sdes#include <sys/smp.h> 434180Sbde#include <machine/clock.h> 44216272Sjkim#include <machine/cputypes.h> 4532054Sphk#include <machine/md_var.h> 4632054Sphk#include <machine/specialreg.h> 4715508Sbde 48167905Snjl#include "cpufreq_if.h" 49167905Snjl 50216163Sjkimuint64_t tsc_freq; 51184102Sjkimint tsc_is_invariant; 52216279Sjkimint tsc_present; 53167905Snjlstatic eventhandler_tag tsc_levels_tag, tsc_pre_tag, tsc_post_tag; 541390Ssos 55184102SjkimSYSCTL_INT(_kern_timecounter, OID_AUTO, invariant_tsc, CTLFLAG_RDTUN, 56184108Sjkim &tsc_is_invariant, 0, "Indicates whether the TSC is P-state invariant"); 57184108SjkimTUNABLE_INT("kern.timecounter.invariant_tsc", &tsc_is_invariant); 58184102Sjkim 59113348Sdes#ifdef SMP 60113348Sdesstatic int smp_tsc; 61121307SsilbySYSCTL_INT(_kern_timecounter, OID_AUTO, smp_tsc, CTLFLAG_RDTUN, &smp_tsc, 0, 62113348Sdes "Indicates whether the TSC is safe to use in SMP mode"); 63113348SdesTUNABLE_INT("kern.timecounter.smp_tsc", &smp_tsc); 64113348Sdes#endif 65113348Sdes 66219473Sjkimstatic int tsc_disabled; 67219473SjkimSYSCTL_INT(_machdep, OID_AUTO, disable_tsc, CTLFLAG_RDTUN, &tsc_disabled, 0, 68219473Sjkim "Disable x86 Time Stamp Counter"); 69219473SjkimTUNABLE_INT("machdep.disable_tsc", &tsc_disabled); 70219473Sjkim 71167905Snjlstatic void tsc_freq_changed(void *arg, const struct cf_level *level, 72167905Snjl int status); 73167905Snjlstatic void tsc_freq_changing(void *arg, const struct cf_level *level, 74167905Snjl int *status); 7592765Salfredstatic unsigned tsc_get_timecount(struct timecounter *tc); 76167905Snjlstatic void tsc_levels_changed(void *arg, int unit); 7717353Sbde 7840610Sphkstatic struct timecounter tsc_timecounter = { 7933690Sphk tsc_get_timecount, /* get_timecount */ 8036741Sphk 0, /* no poll_pps */ 81167905Snjl ~0u, /* counter_mask */ 8233690Sphk 0, /* frequency */ 83167905Snjl "TSC", /* name */ 84118987Sphk 800, /* quality (adjusted in code) */ 8533690Sphk}; 8633690Sphk 871390Ssosvoid 88110370Sphkinit_TSC(void) 891390Ssos{ 90110370Sphk u_int64_t tscval[2]; 911390Ssos 92219473Sjkim if ((cpu_feature & CPUID_TSC) == 0) 93219473Sjkim return; 94219473Sjkim tsc_present = 1; 9532054Sphk 96219473Sjkim if (tsc_disabled) 97110370Sphk return; 9815508Sbde 99110370Sphk if (bootverbose) 100110370Sphk printf("Calibrating TSC clock ... "); 10115508Sbde 102110370Sphk tscval[0] = rdtsc(); 103110370Sphk DELAY(1000000); 104110370Sphk tscval[1] = rdtsc(); 10515508Sbde 106110370Sphk tsc_freq = tscval[1] - tscval[0]; 107110370Sphk if (bootverbose) 108110370Sphk printf("TSC clock: %ju Hz\n", (intmax_t)tsc_freq); 109167905Snjl 110216272Sjkim switch (cpu_vendor_id) { 111216272Sjkim case CPU_VENDOR_AMD: 112219469Sjkim if ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 || 113219469Sjkim (vm_guest == VM_GUEST_NO && 114219469Sjkim CPUID_TO_FAMILY(cpu_id) >= 0x10)) 115216272Sjkim tsc_is_invariant = 1; 116216272Sjkim break; 117216272Sjkim case CPU_VENDOR_INTEL: 118219469Sjkim if ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 || 119219469Sjkim (vm_guest == VM_GUEST_NO && 120219469Sjkim ((CPUID_TO_FAMILY(cpu_id) == 0x6 && 121216272Sjkim CPUID_TO_MODEL(cpu_id) >= 0xe) || 122216272Sjkim (CPUID_TO_FAMILY(cpu_id) == 0xf && 123219469Sjkim CPUID_TO_MODEL(cpu_id) >= 0x3)))) 124216272Sjkim tsc_is_invariant = 1; 125216272Sjkim break; 126216272Sjkim case CPU_VENDOR_CENTAUR: 127219469Sjkim if (vm_guest == VM_GUEST_NO && 128219469Sjkim CPUID_TO_FAMILY(cpu_id) == 0x6 && 129216272Sjkim CPUID_TO_MODEL(cpu_id) >= 0xf && 130216272Sjkim (rdmsr(0x1203) & 0x100000000ULL) == 0) 131216272Sjkim tsc_is_invariant = 1; 132216272Sjkim break; 133216272Sjkim } 134216272Sjkim 135167905Snjl /* 136216274Sjkim * Inform CPU accounting about our boot-time clock rate. This will 137216274Sjkim * be updated if someone loads a cpufreq driver after boot that 138216274Sjkim * discovers a new max frequency. 139167905Snjl */ 140155534Sphk set_cputicker(rdtsc, tsc_freq, 1); 141167905Snjl 142216274Sjkim if (tsc_is_invariant) 143216274Sjkim return; 144216274Sjkim 145167905Snjl /* Register to find out about changes in CPU frequency. */ 146184108Sjkim tsc_pre_tag = EVENTHANDLER_REGISTER(cpufreq_pre_change, 147184108Sjkim tsc_freq_changing, NULL, EVENTHANDLER_PRI_FIRST); 148167905Snjl tsc_post_tag = EVENTHANDLER_REGISTER(cpufreq_post_change, 149167905Snjl tsc_freq_changed, NULL, EVENTHANDLER_PRI_FIRST); 150167905Snjl tsc_levels_tag = EVENTHANDLER_REGISTER(cpufreq_levels_changed, 151167905Snjl tsc_levels_changed, NULL, EVENTHANDLER_PRI_ANY); 152118550Sphk} 15334617Sphk 154118550Sphkvoid 155118550Sphkinit_TSC_tc(void) 156118550Sphk{ 157209103Smav 158219473Sjkim if (!tsc_present || tsc_disabled) 159209103Smav return; 160209103Smav 16134617Sphk /* 162160964Syar * We can not use the TSC if we support APM. Precise timekeeping 16349186Smsmith * on an APM'ed machine is at best a fools pursuit, since 16434617Sphk * any and all of the time spent in various SMM code can't 16534617Sphk * be reliably accounted for. Reading the RTC is your only 166160964Syar * source of reliable time info. The i8254 loses too, of course, 16734617Sphk * but we need to have some kind of time... 16849186Smsmith * We don't know at this point whether APM is going to be used 16949186Smsmith * or not, nor when it might be activated. Play it safe. 17034617Sphk */ 17185835Siwasaki if (power_pm_get_type() == POWER_PM_TYPE_APM) { 172118987Sphk tsc_timecounter.tc_quality = -1000; 17385835Siwasaki if (bootverbose) 174110370Sphk printf("TSC timecounter disabled: APM enabled.\n"); 17564031Sphk } 17634617Sphk 177118987Sphk#ifdef SMP 178118987Sphk /* 179118987Sphk * We can not use the TSC in SMP mode unless the TSCs on all CPUs 180118987Sphk * are somehow synchronized. Some hardware configurations do 181118987Sphk * this, but we have no way of determining whether this is the 182118987Sphk * case, so we do not use the TSC in multi-processor systems 183118987Sphk * unless the user indicated (by setting kern.timecounter.smp_tsc 184118987Sphk * to 1) that he believes that his TSCs are synchronized. 185118987Sphk */ 186118987Sphk if (mp_ncpus > 1 && !smp_tsc) 187118987Sphk tsc_timecounter.tc_quality = -100; 188118987Sphk#endif 189118987Sphk 190219461Sjkim if (tsc_freq != 0) { 19140610Sphk tsc_timecounter.tc_frequency = tsc_freq; 19258377Sphk tc_init(&tsc_timecounter); 19333690Sphk } 1944Srgrimes} 1954Srgrimes 196167905Snjl/* 197167905Snjl * When cpufreq levels change, find out about the (new) max frequency. We 198167905Snjl * use this to update CPU accounting in case it got a lower estimate at boot. 199167905Snjl */ 200167905Snjlstatic void 201167905Snjltsc_levels_changed(void *arg, int unit) 202167905Snjl{ 203167905Snjl device_t cf_dev; 204167905Snjl struct cf_level *levels; 205167905Snjl int count, error; 206167905Snjl uint64_t max_freq; 207167905Snjl 208167905Snjl /* Only use values from the first CPU, assuming all are equal. */ 209167905Snjl if (unit != 0) 210167905Snjl return; 211167905Snjl 212167905Snjl /* Find the appropriate cpufreq device instance. */ 213167905Snjl cf_dev = devclass_get_device(devclass_find("cpufreq"), unit); 214167905Snjl if (cf_dev == NULL) { 215167905Snjl printf("tsc_levels_changed() called but no cpufreq device?\n"); 216167905Snjl return; 217167905Snjl } 218167905Snjl 219167905Snjl /* Get settings from the device and find the max frequency. */ 220167905Snjl count = 64; 221167905Snjl levels = malloc(count * sizeof(*levels), M_TEMP, M_NOWAIT); 222167905Snjl if (levels == NULL) 223167905Snjl return; 224167905Snjl error = CPUFREQ_LEVELS(cf_dev, levels, &count); 225167905Snjl if (error == 0 && count != 0) { 226167905Snjl max_freq = (uint64_t)levels[0].total_set.freq * 1000000; 227167905Snjl set_cputicker(rdtsc, max_freq, 1); 228167905Snjl } else 229167905Snjl printf("tsc_levels_changed: no max freq found\n"); 230167905Snjl free(levels, M_TEMP); 231167905Snjl} 232167905Snjl 233167905Snjl/* 234167905Snjl * If the TSC timecounter is in use, veto the pending change. It may be 235167905Snjl * possible in the future to handle a dynamically-changing timecounter rate. 236167905Snjl */ 237167905Snjlstatic void 238167905Snjltsc_freq_changing(void *arg, const struct cf_level *level, int *status) 239167905Snjl{ 240167905Snjl 241216274Sjkim if (*status != 0 || timecounter != &tsc_timecounter) 242167905Snjl return; 243167905Snjl 244167905Snjl printf("timecounter TSC must not be in use when " 245184102Sjkim "changing frequencies; change denied\n"); 246167905Snjl *status = EBUSY; 247167905Snjl} 248167905Snjl 249167905Snjl/* Update TSC freq with the value indicated by the caller. */ 250167905Snjlstatic void 251167905Snjltsc_freq_changed(void *arg, const struct cf_level *level, int status) 252167905Snjl{ 253216276Sjkim 254216276Sjkim /* If there was an error during the transition, don't do anything. */ 255219473Sjkim if (tsc_disabled || status != 0) 256167905Snjl return; 257167905Snjl 258167905Snjl /* Total setting for this level gives the new frequency in MHz. */ 259167905Snjl tsc_freq = (uint64_t)level->total_set.freq * 1000000; 260167905Snjl tsc_timecounter.tc_frequency = tsc_freq; 261167905Snjl} 262167905Snjl 26315508Sbdestatic int 26462573Sphksysctl_machdep_tsc_freq(SYSCTL_HANDLER_ARGS) 26515508Sbde{ 26615508Sbde int error; 267110039Sphk uint64_t freq; 26815508Sbde 26948888Sbde if (tsc_timecounter.tc_frequency == 0) 27015508Sbde return (EOPNOTSUPP); 27132005Sphk freq = tsc_freq; 272217616Smdf error = sysctl_handle_64(oidp, &freq, 0, req); 27333690Sphk if (error == 0 && req->newptr != NULL) { 27433690Sphk tsc_freq = freq; 27540610Sphk tsc_timecounter.tc_frequency = tsc_freq; 27633690Sphk } 27715508Sbde return (error); 27815508Sbde} 27915508Sbde 280217616SmdfSYSCTL_PROC(_machdep, OID_AUTO, tsc_freq, CTLTYPE_U64 | CTLFLAG_RW, 281211082Sdwmalone 0, 0, sysctl_machdep_tsc_freq, "QU", ""); 28233690Sphk 28336441Sphkstatic unsigned 28436719Sphktsc_get_timecount(struct timecounter *tc) 28533690Sphk{ 28636198Sphk return (rdtsc()); 28733690Sphk} 288