mptable.c revision 129663
1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * Copyright (c) 1996, by Steve Passe 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. The name of the developer may NOT be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/i386/i386/mptable.c 129663 2004-05-24 15:51:46Z jhb $"); 29 30#include "opt_mptable_force_htt.h" 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/kernel.h> 35#include <sys/malloc.h> 36 37#include <vm/vm.h> 38#include <vm/vm_param.h> 39#include <vm/pmap.h> 40 41#include <machine/apicreg.h> 42#include <machine/frame.h> 43#include <machine/intr_machdep.h> 44#include <machine/apicvar.h> 45#include <machine/md_var.h> 46#include <machine/mptable.h> 47#include <machine/specialreg.h> 48 49#include <dev/pci/pcivar.h> 50 51/* string defined by the Intel MP Spec as identifying the MP table */ 52#define MP_SIG 0x5f504d5f /* _MP_ */ 53 54#define NAPICID 32 /* Max number of APIC's */ 55 56#ifdef PC98 57#define BIOS_BASE (0xe8000) 58#define BIOS_SIZE (0x18000) 59#else 60#define BIOS_BASE (0xf0000) 61#define BIOS_SIZE (0x10000) 62#endif 63#define BIOS_COUNT (BIOS_SIZE/4) 64 65typedef void mptable_entry_handler(u_char *entry, void *arg); 66 67static basetable_entry basetable_entry_types[] = 68{ 69 {0, 20, "Processor"}, 70 {1, 8, "Bus"}, 71 {2, 8, "I/O APIC"}, 72 {3, 8, "I/O INT"}, 73 {4, 8, "Local INT"} 74}; 75 76typedef struct BUSDATA { 77 u_char bus_id; 78 enum busTypes bus_type; 79} bus_datum; 80 81typedef struct INTDATA { 82 u_char int_type; 83 u_short int_flags; 84 u_char src_bus_id; 85 u_char src_bus_irq; 86 u_char dst_apic_id; 87 u_char dst_apic_int; 88 u_char int_vector; 89} io_int, local_int; 90 91typedef struct BUSTYPENAME { 92 u_char type; 93 char name[7]; 94} bus_type_name; 95 96/* From MP spec v1.4, table 4-8. */ 97static bus_type_name bus_type_table[] = 98{ 99 {UNKNOWN_BUSTYPE, "CBUS "}, 100 {UNKNOWN_BUSTYPE, "CBUSII"}, 101 {EISA, "EISA "}, 102 {UNKNOWN_BUSTYPE, "FUTURE"}, 103 {UNKNOWN_BUSTYPE, "INTERN"}, 104 {ISA, "ISA "}, 105 {UNKNOWN_BUSTYPE, "MBI "}, 106 {UNKNOWN_BUSTYPE, "MBII "}, 107 {MCA, "MCA "}, 108 {UNKNOWN_BUSTYPE, "MPI "}, 109 {UNKNOWN_BUSTYPE, "MPSA "}, 110 {UNKNOWN_BUSTYPE, "NUBUS "}, 111 {PCI, "PCI "}, 112 {UNKNOWN_BUSTYPE, "PCMCIA"}, 113 {UNKNOWN_BUSTYPE, "TC "}, 114 {UNKNOWN_BUSTYPE, "VL "}, 115 {UNKNOWN_BUSTYPE, "VME "}, 116 {UNKNOWN_BUSTYPE, "XPRESS"} 117}; 118 119/* From MP spec v1.4, table 5-1. */ 120static int default_data[7][5] = 121{ 122/* nbus, id0, type0, id1, type1 */ 123 {1, 0, ISA, 255, NOBUS}, 124 {1, 0, EISA, 255, NOBUS}, 125 {1, 0, EISA, 255, NOBUS}, 126 {1, 0, MCA, 255, NOBUS}, 127 {2, 0, ISA, 1, PCI}, 128 {2, 0, EISA, 1, PCI}, 129 {2, 0, MCA, 1, PCI} 130}; 131 132struct pci_probe_table_args { 133 u_char bus; 134 u_char found; 135}; 136 137struct pci_route_interrupt_args { 138 u_char bus; /* Source bus. */ 139 u_char irq; /* Source slot:pin. */ 140 int vector; /* Return value. */ 141}; 142 143static mpfps_t mpfps; 144static mpcth_t mpct; 145static void *ioapics[NAPICID]; 146static bus_datum *busses; 147static int mptable_nioapics, mptable_nbusses, mptable_maxbusid; 148static int pci0 = -1; 149 150MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items"); 151 152static enum intr_polarity conforming_polarity(u_char src_bus, 153 u_char src_bus_irq); 154static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq); 155static enum intr_polarity intentry_polarity(int_entry_ptr intr); 156static enum intr_trigger intentry_trigger(int_entry_ptr intr); 157static int lookup_bus_type(char *name); 158static void mptable_count_items(void); 159static void mptable_count_items_handler(u_char *entry, void *arg); 160#ifdef MPTABLE_FORCE_HTT 161static void mptable_hyperthread_fixup(u_int id_mask); 162#endif 163static void mptable_parse_apics_and_busses(void); 164static void mptable_parse_apics_and_busses_handler(u_char *entry, 165 void *arg); 166static void mptable_parse_ints(void); 167static void mptable_parse_ints_handler(u_char *entry, void *arg); 168static void mptable_parse_io_int(int_entry_ptr intr); 169static void mptable_parse_local_int(int_entry_ptr intr); 170static void mptable_pci_probe_table_handler(u_char *entry, void *arg); 171static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg); 172static void mptable_pci_setup(void); 173static int mptable_probe(void); 174static int mptable_probe_cpus(void); 175static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused); 176static void mptable_register(void *dummy); 177static int mptable_setup_local(void); 178static int mptable_setup_io(void); 179static void mptable_walk_table(mptable_entry_handler *handler, void *arg); 180static int search_for_sig(u_int32_t target, int count); 181 182static struct apic_enumerator mptable_enumerator = { 183 "MPTable", 184 mptable_probe, 185 mptable_probe_cpus, 186 mptable_setup_local, 187 mptable_setup_io 188}; 189 190/* 191 * look for the MP spec signature 192 */ 193 194static int 195search_for_sig(u_int32_t target, int count) 196{ 197 int x; 198 u_int32_t *addr = (u_int32_t *) (KERNBASE + target); 199 200 for (x = 0; x < count; x += 4) 201 if (addr[x] == MP_SIG) 202 /* make array index a byte index */ 203 return (target + (x * sizeof(u_int32_t))); 204 return (-1); 205} 206 207static int 208lookup_bus_type(char *name) 209{ 210 int x; 211 212 for (x = 0; x < MAX_BUSTYPE; ++x) 213 if (strncmp(bus_type_table[x].name, name, 6) == 0) 214 return (bus_type_table[x].type); 215 216 return (UNKNOWN_BUSTYPE); 217} 218 219/* 220 * Look for an Intel MP spec table (ie, SMP capable hardware). 221 */ 222static int 223mptable_probe(void) 224{ 225 int x; 226 u_long segment; 227 u_int32_t target; 228 229 /* see if EBDA exists */ 230 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) { 231 /* search first 1K of EBDA */ 232 target = (u_int32_t) (segment << 4); 233 if ((x = search_for_sig(target, 1024 / 4)) >= 0) 234 goto found; 235 } else { 236 /* last 1K of base memory, effective 'top of base' passed in */ 237 target = (u_int32_t) ((basemem * 1024) - 0x400); 238 if ((x = search_for_sig(target, 1024 / 4)) >= 0) 239 goto found; 240 } 241 242 /* search the BIOS */ 243 target = (u_int32_t) BIOS_BASE; 244 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0) 245 goto found; 246 247 /* nothing found */ 248 return (ENXIO); 249 250found: 251 mpfps = (mpfps_t)(KERNBASE + x); 252 253 /* Map in the configuration table if it exists. */ 254 if (mpfps->config_type != 0) 255 mpct = NULL; 256 else { 257 if ((uintptr_t)mpfps->pap >= 1024 * 1024) { 258 printf("%s: Unable to map MP Configuration Table\n", 259 __func__); 260 return (ENXIO); 261 } 262 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap); 263 if (mpct->base_table_length + (uintptr_t)mpfps->pap >= 264 1024 * 1024) { 265 printf("%s: Unable to map end of MP Config Table\n", 266 __func__); 267 return (ENXIO); 268 } 269 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' || 270 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') { 271 printf("%s: MP Config Table has bad signature: %c%c%c%c\n", 272 __func__, mpct->signature[0], mpct->signature[1], 273 mpct->signature[2], mpct->signature[3]); 274 return (ENXIO); 275 } 276 if (bootverbose) 277 printf( 278 "MP Configuration Table version 1.%d found at %p\n", 279 mpct->spec_rev, mpct); 280 } 281 282 return (-100); 283} 284 285/* 286 * Run through the MP table enumerating CPUs. 287 */ 288static int 289mptable_probe_cpus(void) 290{ 291 u_int cpu_mask; 292 293 /* Is this a pre-defined config? */ 294 if (mpfps->config_type != 0) { 295 lapic_create(0, 1); 296 lapic_create(1, 0); 297 } else { 298 cpu_mask = 0; 299 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask); 300#ifdef MPTABLE_FORCE_HTT 301 mptable_hyperthread_fixup(cpu_mask); 302#endif 303 } 304 return (0); 305} 306 307/* 308 * Initialize the local APIC on the BSP. 309 */ 310static int 311mptable_setup_local(void) 312{ 313 314 /* Is this a pre-defined config? */ 315 printf("MPTable: <"); 316 if (mpfps->config_type != 0) { 317 lapic_init(DEFAULT_APIC_BASE); 318 printf("Preset Config %d", mpfps->config_type); 319 } else { 320 lapic_init((uintptr_t)mpct->apic_address); 321 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id, 322 (int)sizeof(mpct->product_id), mpct->product_id); 323 } 324 printf(">\n"); 325 return (0); 326} 327 328/* 329 * Run through the MP table enumerating I/O APICs. 330 */ 331static int 332mptable_setup_io(void) 333{ 334 int i; 335 u_char byte; 336 337 /* First, we count individual items and allocate arrays. */ 338 mptable_count_items(); 339 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE, 340 M_WAITOK); 341 for (i = 0; i <= mptable_maxbusid; i++) 342 busses[i].bus_type = NOBUS; 343 344 /* Second, we run through adding I/O APIC's and busses. */ 345 ioapic_enable_mixed_mode(); 346 mptable_parse_apics_and_busses(); 347 348 /* Third, we run through the table tweaking interrupt sources. */ 349 mptable_parse_ints(); 350 351 /* Fourth, we register all the I/O APIC's. */ 352 for (i = 0; i < NAPICID; i++) 353 if (ioapics[i] != NULL) 354 ioapic_register(ioapics[i]); 355 356 /* Fifth, we setup data structures to handle PCI interrupt routing. */ 357 mptable_pci_setup(); 358 359 /* Finally, we throw the switch to enable the I/O APIC's. */ 360 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) { 361 outb(0x22, 0x70); /* select IMCR */ 362 byte = inb(0x23); /* current contents */ 363 byte |= 0x01; /* mask external INTR */ 364 outb(0x23, byte); /* disconnect 8259s/NMI */ 365 } 366 367 return (0); 368} 369 370static void 371mptable_register(void *dummy __unused) 372{ 373 374 apic_register_enumerator(&mptable_enumerator); 375} 376SYSINIT(mptable_register, SI_SUB_CPU - 1, SI_ORDER_FIRST, mptable_register, 377 NULL) 378 379/* 380 * Call the handler routine for each entry in the MP config table. 381 */ 382static void 383mptable_walk_table(mptable_entry_handler *handler, void *arg) 384{ 385 u_int i; 386 u_char *entry; 387 388 entry = (u_char *)(mpct + 1); 389 for (i = 0; i < mpct->entry_count; i++) { 390 switch (*entry) { 391 case MPCT_ENTRY_PROCESSOR: 392 case MPCT_ENTRY_IOAPIC: 393 case MPCT_ENTRY_BUS: 394 case MPCT_ENTRY_INT: 395 case MPCT_ENTRY_LOCAL_INT: 396 break; 397 default: 398 panic("%s: Unknown MP Config Entry %d\n", __func__, 399 (int)*entry); 400 } 401 handler(entry, arg); 402 entry += basetable_entry_types[*entry].length; 403 } 404} 405 406static void 407mptable_probe_cpus_handler(u_char *entry, void *arg) 408{ 409 proc_entry_ptr proc; 410 u_int *cpu_mask; 411 412 switch (*entry) { 413 case MPCT_ENTRY_PROCESSOR: 414 proc = (proc_entry_ptr)entry; 415 if (proc->cpu_flags & PROCENTRY_FLAG_EN) { 416 lapic_create(proc->apic_id, proc->cpu_flags & 417 PROCENTRY_FLAG_BP); 418 cpu_mask = (u_int *)arg; 419 *cpu_mask |= (1 << proc->apic_id); 420 } 421 break; 422 } 423} 424 425static void 426mptable_count_items_handler(u_char *entry, void *arg __unused) 427{ 428 io_apic_entry_ptr apic; 429 bus_entry_ptr bus; 430 431 switch (*entry) { 432 case MPCT_ENTRY_BUS: 433 bus = (bus_entry_ptr)entry; 434 mptable_nbusses++; 435 if (bus->bus_id > mptable_maxbusid) 436 mptable_maxbusid = bus->bus_id; 437 break; 438 case MPCT_ENTRY_IOAPIC: 439 apic = (io_apic_entry_ptr)entry; 440 if (apic->apic_flags & IOAPICENTRY_FLAG_EN) 441 mptable_nioapics++; 442 break; 443 } 444} 445 446/* 447 * Count items in the table. 448 */ 449static void 450mptable_count_items(void) 451{ 452 453 /* Is this a pre-defined config? */ 454 if (mpfps->config_type != 0) { 455 mptable_nioapics = 1; 456 switch (mpfps->config_type) { 457 case 1: 458 case 2: 459 case 3: 460 case 4: 461 mptable_nbusses = 1; 462 break; 463 case 5: 464 case 6: 465 case 7: 466 mptable_nbusses = 2; 467 break; 468 default: 469 panic("Unknown pre-defined MP Table config type %d", 470 mpfps->config_type); 471 } 472 mptable_maxbusid = mptable_nbusses - 1; 473 } else 474 mptable_walk_table(mptable_count_items_handler, NULL); 475} 476 477/* 478 * Add a bus or I/O APIC from an entry in the table. 479 */ 480static void 481mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused) 482{ 483 io_apic_entry_ptr apic; 484 bus_entry_ptr bus; 485 enum busTypes bus_type; 486 int i; 487 488 489 switch (*entry) { 490 case MPCT_ENTRY_BUS: 491 bus = (bus_entry_ptr)entry; 492 bus_type = lookup_bus_type(bus->bus_type); 493 if (bus_type == UNKNOWN_BUSTYPE) { 494 printf("MPTable: Unknown bus %d type \"", bus->bus_id); 495 for (i = 0; i < 6; i++) 496 printf("%c", bus->bus_type[i]); 497 printf("\"\n"); 498 } 499 busses[bus->bus_id].bus_id = bus->bus_id; 500 busses[bus->bus_id].bus_type = bus_type; 501 break; 502 case MPCT_ENTRY_IOAPIC: 503 apic = (io_apic_entry_ptr)entry; 504 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN)) 505 break; 506 if (apic->apic_id >= NAPICID) 507 panic("%s: I/O APIC ID %d too high", __func__, 508 apic->apic_id); 509 if (ioapics[apic->apic_id] != NULL) 510 panic("%s: Double APIC ID %d", __func__, 511 apic->apic_id); 512 ioapics[apic->apic_id] = ioapic_create( 513 (uintptr_t)apic->apic_address, apic->apic_id, -1); 514 break; 515 default: 516 break; 517 } 518} 519 520/* 521 * Enumerate I/O APIC's and busses. 522 */ 523static void 524mptable_parse_apics_and_busses(void) 525{ 526 527 /* Is this a pre-defined config? */ 528 if (mpfps->config_type != 0) { 529 ioapics[0] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0); 530 busses[0].bus_id = 0; 531 busses[0].bus_type = default_data[mpfps->config_type][2]; 532 if (mptable_nbusses > 1) { 533 busses[1].bus_id = 1; 534 busses[1].bus_type = 535 default_data[mpfps->config_type][4]; 536 } 537 } else 538 mptable_walk_table(mptable_parse_apics_and_busses_handler, 539 NULL); 540} 541 542/* 543 * Determine conforming polarity for a given bus type. 544 */ 545static enum intr_polarity 546conforming_polarity(u_char src_bus, u_char src_bus_irq) 547{ 548 549 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus)); 550 switch (busses[src_bus].bus_type) { 551 case ISA: 552 case EISA: 553 return (INTR_POLARITY_HIGH); 554 case PCI: 555 return (INTR_POLARITY_LOW); 556 default: 557 panic("%s: unknown bus type %d", __func__, 558 busses[src_bus].bus_type); 559 } 560} 561 562/* 563 * Determine conforming trigger for a given bus type. 564 */ 565static enum intr_trigger 566conforming_trigger(u_char src_bus, u_char src_bus_irq) 567{ 568 569 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus)); 570 switch (busses[src_bus].bus_type) { 571 case ISA: 572 return (INTR_TRIGGER_EDGE); 573 case PCI: 574 return (INTR_TRIGGER_LEVEL); 575#ifndef PC98 576 case EISA: 577 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq)); 578 return (elcr_read_trigger(src_bus_irq)); 579#endif 580 default: 581 panic("%s: unknown bus type %d", __func__, 582 busses[src_bus].bus_type); 583 } 584} 585 586static enum intr_polarity 587intentry_polarity(int_entry_ptr intr) 588{ 589 590 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) { 591 case INTENTRY_FLAGS_POLARITY_CONFORM: 592 return (conforming_polarity(intr->src_bus_id, 593 intr->src_bus_irq)); 594 case INTENTRY_FLAGS_POLARITY_ACTIVEHI: 595 return (INTR_POLARITY_HIGH); 596 case INTENTRY_FLAGS_POLARITY_ACTIVELO: 597 return (INTR_POLARITY_LOW); 598 default: 599 panic("Bogus interrupt flags"); 600 } 601} 602 603static enum intr_trigger 604intentry_trigger(int_entry_ptr intr) 605{ 606 607 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) { 608 case INTENTRY_FLAGS_TRIGGER_CONFORM: 609 return (conforming_trigger(intr->src_bus_id, 610 intr->src_bus_irq)); 611 case INTENTRY_FLAGS_TRIGGER_EDGE: 612 return (INTR_TRIGGER_EDGE); 613 case INTENTRY_FLAGS_TRIGGER_LEVEL: 614 return (INTR_TRIGGER_LEVEL); 615 default: 616 panic("Bogus interrupt flags"); 617 } 618} 619 620/* 621 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC. 622 */ 623static void 624mptable_parse_io_int(int_entry_ptr intr) 625{ 626 void *ioapic; 627 u_int pin; 628 629 if (intr->dst_apic_id == 0xff) { 630 printf("MPTable: Ignoring global interrupt entry for pin %d\n", 631 intr->dst_apic_int); 632 return; 633 } 634 if (intr->dst_apic_id >= NAPICID) { 635 printf("MPTable: Ignoring interrupt entry for ioapic%d\n", 636 intr->dst_apic_id); 637 return; 638 } 639 ioapic = ioapics[intr->dst_apic_id]; 640 if (ioapic == NULL) { 641 printf( 642 "MPTable: Ignoring interrupt entry for missing ioapic%d\n", 643 intr->dst_apic_id); 644 return; 645 } 646 pin = intr->dst_apic_int; 647 switch (intr->int_type) { 648 case INTENTRY_TYPE_INT: 649 if (busses[intr->src_bus_id].bus_type == NOBUS) 650 panic("interrupt from missing bus"); 651 if (busses[intr->src_bus_id].bus_type == ISA && 652 intr->src_bus_irq != pin) { 653 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq); 654 if (ioapic_get_vector(ioapic, intr->src_bus_irq) == 655 intr->src_bus_irq) 656 ioapic_disable_pin(ioapic, intr->src_bus_irq); 657 } 658 break; 659 case INTENTRY_TYPE_NMI: 660 ioapic_set_nmi(ioapic, pin); 661 break; 662 case INTENTRY_TYPE_SMI: 663 ioapic_set_smi(ioapic, pin); 664 break; 665 case INTENTRY_TYPE_EXTINT: 666 ioapic_set_extint(ioapic, pin); 667 break; 668 default: 669 panic("%s: invalid interrupt entry type %d\n", __func__, 670 intr->int_type); 671 } 672 if (intr->int_type == INTENTRY_TYPE_INT || 673 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) != 674 INTENTRY_FLAGS_TRIGGER_CONFORM) 675 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr)); 676 if (intr->int_type == INTENTRY_TYPE_INT || 677 (intr->int_flags & INTENTRY_FLAGS_POLARITY) != 678 INTENTRY_FLAGS_POLARITY_CONFORM) 679 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr)); 680} 681 682/* 683 * Parse an interrupt entry for a local APIC LVT pin. 684 */ 685static void 686mptable_parse_local_int(int_entry_ptr intr) 687{ 688 u_int apic_id, pin; 689 690 if (intr->dst_apic_id == 0xff) 691 apic_id = APIC_ID_ALL; 692 else 693 apic_id = intr->dst_apic_id; 694 if (intr->dst_apic_int == 0) 695 pin = LVT_LINT0; 696 else 697 pin = LVT_LINT1; 698 switch (intr->int_type) { 699 case INTENTRY_TYPE_INT: 700#if 1 701 printf( 702 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n", 703 intr->dst_apic_int, intr->src_bus_irq); 704 return; 705#else 706 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED); 707 break; 708#endif 709 case INTENTRY_TYPE_NMI: 710 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI); 711 break; 712 case INTENTRY_TYPE_SMI: 713 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI); 714 break; 715 case INTENTRY_TYPE_EXTINT: 716 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT); 717 break; 718 default: 719 panic("%s: invalid interrupt entry type %d\n", __func__, 720 intr->int_type); 721 } 722 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) != 723 INTENTRY_FLAGS_TRIGGER_CONFORM) 724 lapic_set_lvt_triggermode(apic_id, pin, 725 intentry_trigger(intr)); 726 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) != 727 INTENTRY_FLAGS_POLARITY_CONFORM) 728 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr)); 729} 730 731/* 732 * Parse interrupt entries. 733 */ 734static void 735mptable_parse_ints_handler(u_char *entry, void *arg __unused) 736{ 737 int_entry_ptr intr; 738 739 intr = (int_entry_ptr)entry; 740 switch (*entry) { 741 case MPCT_ENTRY_INT: 742 mptable_parse_io_int(intr); 743 break; 744 case MPCT_ENTRY_LOCAL_INT: 745 mptable_parse_local_int(intr); 746 break; 747 } 748} 749 750/* 751 * Configure the interrupt pins 752 */ 753static void 754mptable_parse_ints(void) 755{ 756 757 /* Is this a pre-defined config? */ 758 if (mpfps->config_type != 0) { 759 /* Configure LINT pins. */ 760 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT); 761 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI); 762 763 /* Configure I/O APIC pins. */ 764 if (mpfps->config_type != 7) 765 ioapic_set_extint(ioapics[0], 0); 766 else 767 ioapic_disable_pin(ioapics[0], 0); 768 if (mpfps->config_type != 2) 769 ioapic_remap_vector(ioapics[0], 2, 0); 770 else 771 ioapic_disable_pin(ioapics[0], 2); 772 if (mpfps->config_type == 2) 773 ioapic_disable_pin(ioapics[0], 13); 774 } else 775 mptable_walk_table(mptable_parse_ints_handler, NULL); 776} 777 778#ifdef MPTABLE_FORCE_HTT 779/* 780 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's 781 * that aren't already listed in the table. 782 * 783 * XXX: We assume that all of the physical CPUs in the 784 * system have the same number of logical CPUs. 785 * 786 * XXX: We assume that APIC ID's are allocated such that 787 * the APIC ID's for a physical processor are aligned 788 * with the number of logical CPU's in the processor. 789 */ 790static void 791mptable_hyperthread_fixup(u_int id_mask) 792{ 793 u_int i, id, logical_cpus; 794 795 /* Nothing to do if there is no HTT support. */ 796 if ((cpu_feature & CPUID_HTT) == 0) 797 return; 798 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16; 799 if (logical_cpus <= 1) 800 return; 801 802 /* 803 * For each APIC ID of a CPU that is set in the mask, 804 * scan the other candidate APIC ID's for this 805 * physical processor. If any of those ID's are 806 * already in the table, then kill the fixup. 807 */ 808 for (id = 0; id < NAPICID; id++) { 809 if ((id_mask & 1 << id) == 0) 810 continue; 811 /* First, make sure we are on a logical_cpus boundary. */ 812 if (id % logical_cpus != 0) 813 return; 814 for (i = id + 1; i < id + logical_cpus; i++) 815 if ((id_mask & 1 << i) != 0) 816 return; 817 } 818 819 /* 820 * Ok, the ID's checked out, so perform the fixup by 821 * adding the logical CPUs. 822 */ 823 while ((id = ffs(id_mask)) != 0) { 824 id--; 825 for (i = id + 1; i < id + logical_cpus; i++) { 826 if (bootverbose) 827 printf( 828 "MPTable: Adding logical CPU %d from main CPU %d\n", 829 i, id); 830 lapic_create(i, 0); 831 } 832 id_mask &= ~(1 << id); 833 } 834} 835#endif /* MPTABLE_FORCE_HTT */ 836 837/* 838 * Support code for routing PCI interrupts using the MP Table. 839 */ 840static void 841mptable_pci_setup(void) 842{ 843 int i; 844 845 /* 846 * Find the first pci bus and call it 0. Panic if pci0 is not 847 * bus zero and there are multiple PCI busses. 848 */ 849 for (i = 0; i <= mptable_maxbusid; i++) 850 if (busses[i].bus_type == PCI) { 851 if (pci0 == -1) 852 pci0 = i; 853 else if (pci0 != 0) 854 panic( 855 "MPTable contains multiple PCI busses but no PCI bus 0"); 856 } 857} 858 859static void 860mptable_pci_probe_table_handler(u_char *entry, void *arg) 861{ 862 struct pci_probe_table_args *args; 863 int_entry_ptr intr; 864 865 if (*entry != MPCT_ENTRY_INT) 866 return; 867 intr = (int_entry_ptr)entry; 868 args = (struct pci_probe_table_args *)arg; 869 KASSERT(args->bus <= mptable_maxbusid, 870 ("bus %d is too big", args->bus)); 871 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus")); 872 if (intr->src_bus_id == args->bus) 873 args->found = 1; 874} 875 876int 877mptable_pci_probe_table(int bus) 878{ 879 struct pci_probe_table_args args; 880 881 if (bus < 0) 882 return (EINVAL); 883 if (pci0 == -1 || pci0 + bus > mptable_maxbusid) 884 return (ENXIO); 885 if (busses[pci0 + bus].bus_type != PCI) 886 return (ENXIO); 887 args.bus = pci0 + bus; 888 args.found = 0; 889 mptable_walk_table(mptable_pci_probe_table_handler, &args); 890 if (args.found == 0) 891 return (ENXIO); 892 return (0); 893} 894 895static void 896mptable_pci_route_interrupt_handler(u_char *entry, void *arg) 897{ 898 struct pci_route_interrupt_args *args; 899 int_entry_ptr intr; 900 int vector; 901 902 if (*entry != MPCT_ENTRY_INT) 903 return; 904 intr = (int_entry_ptr)entry; 905 args = (struct pci_route_interrupt_args *)arg; 906 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq) 907 return; 908 909 /* Make sure the APIC maps to a known APIC. */ 910 KASSERT(ioapics[intr->dst_apic_id] != NULL, 911 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id)); 912 913 /* 914 * Look up the vector for this APIC / pin combination. If we 915 * have previously matched an entry for this PCI IRQ but it 916 * has the same vector as this entry, just return. Otherwise, 917 * we use the vector for this APIC / pin combination. 918 */ 919 vector = ioapic_get_vector(ioapics[intr->dst_apic_id], 920 intr->dst_apic_int); 921 if (args->vector == vector) 922 return; 923 KASSERT(args->vector == -1, 924 ("Multiple entries for PCI IRQ %d", args->vector)); 925 args->vector = vector; 926} 927 928int 929mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin) 930{ 931 struct pci_route_interrupt_args args; 932 int slot; 933 934 /* Like ACPI, pin numbers are 0-3, not 1-4. */ 935 pin--; 936 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts")); 937 args.bus = pci_get_bus(dev) + pci0; 938 slot = pci_get_slot(dev); 939 940 /* 941 * PCI interrupt entries in the MP Table encode both the slot and 942 * pin into the IRQ with the pin being the two least significant 943 * bits, the slot being the next five bits, and the most significant 944 * bit being reserved. 945 */ 946 args.irq = slot << 2 | pin; 947 args.vector = -1; 948 mptable_walk_table(mptable_pci_route_interrupt_handler, &args); 949 if (args.vector < 0) { 950 device_printf(pcib, "unable to route slot %d INT%c\n", slot, 951 'A' + pin); 952 return (PCI_INVALID_IRQ); 953 } 954 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot, 'A' + pin, 955 args.vector); 956 return (args.vector); 957} 958