mptable.c revision 129008
1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * Copyright (c) 1996, by Steve Passe 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. The name of the developer may NOT be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/i386/i386/mptable.c 129008 2004-05-06 13:45:45Z nyan $"); 29 30#include "opt_mptable_force_htt.h" 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/kernel.h> 35#include <sys/malloc.h> 36 37#include <vm/vm.h> 38#include <vm/vm_param.h> 39#include <vm/pmap.h> 40 41#include <machine/apicreg.h> 42#include <machine/frame.h> 43#include <machine/intr_machdep.h> 44#include <machine/apicvar.h> 45#include <machine/md_var.h> 46#include <machine/mptable.h> 47#include <machine/specialreg.h> 48 49#include <dev/pci/pcivar.h> 50 51/* string defined by the Intel MP Spec as identifying the MP table */ 52#define MP_SIG 0x5f504d5f /* _MP_ */ 53 54#define NAPICID 32 /* Max number of APIC's */ 55 56#ifdef PC98 57#define BIOS_BASE (0xe8000) 58#define BIOS_SIZE (0x18000) 59#else 60#define BIOS_BASE (0xf0000) 61#define BIOS_SIZE (0x10000) 62#endif 63#define BIOS_COUNT (BIOS_SIZE/4) 64 65typedef void mptable_entry_handler(u_char *entry, void *arg); 66 67static basetable_entry basetable_entry_types[] = 68{ 69 {0, 20, "Processor"}, 70 {1, 8, "Bus"}, 71 {2, 8, "I/O APIC"}, 72 {3, 8, "I/O INT"}, 73 {4, 8, "Local INT"} 74}; 75 76typedef struct BUSDATA { 77 u_char bus_id; 78 enum busTypes bus_type; 79} bus_datum; 80 81typedef struct INTDATA { 82 u_char int_type; 83 u_short int_flags; 84 u_char src_bus_id; 85 u_char src_bus_irq; 86 u_char dst_apic_id; 87 u_char dst_apic_int; 88 u_char int_vector; 89} io_int, local_int; 90 91typedef struct BUSTYPENAME { 92 u_char type; 93 char name[7]; 94} bus_type_name; 95 96/* From MP spec v1.4, table 4-8. */ 97static bus_type_name bus_type_table[] = 98{ 99 {UNKNOWN_BUSTYPE, "CBUS "}, 100 {UNKNOWN_BUSTYPE, "CBUSII"}, 101 {EISA, "EISA "}, 102 {UNKNOWN_BUSTYPE, "FUTURE"}, 103 {UNKNOWN_BUSTYPE, "INTERN"}, 104 {ISA, "ISA "}, 105 {UNKNOWN_BUSTYPE, "MBI "}, 106 {UNKNOWN_BUSTYPE, "MBII "}, 107 {MCA, "MCA "}, 108 {UNKNOWN_BUSTYPE, "MPI "}, 109 {UNKNOWN_BUSTYPE, "MPSA "}, 110 {UNKNOWN_BUSTYPE, "NUBUS "}, 111 {PCI, "PCI "}, 112 {UNKNOWN_BUSTYPE, "PCMCIA"}, 113 {UNKNOWN_BUSTYPE, "TC "}, 114 {UNKNOWN_BUSTYPE, "VL "}, 115 {UNKNOWN_BUSTYPE, "VME "}, 116 {UNKNOWN_BUSTYPE, "XPRESS"} 117}; 118 119/* From MP spec v1.4, table 5-1. */ 120static int default_data[7][5] = 121{ 122/* nbus, id0, type0, id1, type1 */ 123 {1, 0, ISA, 255, NOBUS}, 124 {1, 0, EISA, 255, NOBUS}, 125 {1, 0, EISA, 255, NOBUS}, 126 {1, 0, MCA, 255, NOBUS}, 127 {2, 0, ISA, 1, PCI}, 128 {2, 0, EISA, 1, PCI}, 129 {2, 0, MCA, 1, PCI} 130}; 131 132struct pci_probe_table_args { 133 u_char bus; 134 u_char found; 135}; 136 137struct pci_route_interrupt_args { 138 u_char bus; /* Source bus. */ 139 u_char irq; /* Source slot:pin. */ 140 int vector; /* Return value. */ 141}; 142 143static mpfps_t mpfps; 144static mpcth_t mpct; 145static void *ioapics[NAPICID]; 146static bus_datum *busses; 147static int mptable_nioapics, mptable_nbusses, mptable_maxbusid; 148static int pci0 = -1; 149 150MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items"); 151 152static enum intr_polarity conforming_polarity(u_char src_bus, 153 u_char src_bus_irq); 154static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq); 155static enum intr_polarity intentry_polarity(int_entry_ptr intr); 156static enum intr_trigger intentry_trigger(int_entry_ptr intr); 157static int lookup_bus_type(char *name); 158static void mptable_count_items(void); 159static void mptable_count_items_handler(u_char *entry, void *arg); 160#ifdef MPTABLE_FORCE_HTT 161static void mptable_hyperthread_fixup(u_int id_mask); 162#endif 163static void mptable_parse_apics_and_busses(void); 164static void mptable_parse_apics_and_busses_handler(u_char *entry, 165 void *arg); 166static void mptable_parse_ints(void); 167static void mptable_parse_ints_handler(u_char *entry, void *arg); 168static void mptable_parse_io_int(int_entry_ptr intr); 169static void mptable_parse_local_int(int_entry_ptr intr); 170static void mptable_pci_probe_table_handler(u_char *entry, void *arg); 171static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg); 172static void mptable_pci_setup(void); 173static int mptable_probe(void); 174static int mptable_probe_cpus(void); 175static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused); 176static void mptable_register(void *dummy); 177static int mptable_setup_local(void); 178static int mptable_setup_io(void); 179static void mptable_walk_table(mptable_entry_handler *handler, void *arg); 180static int search_for_sig(u_int32_t target, int count); 181 182static struct apic_enumerator mptable_enumerator = { 183 "MPTable", 184 mptable_probe, 185 mptable_probe_cpus, 186 mptable_setup_local, 187 mptable_setup_io 188}; 189 190/* 191 * look for the MP spec signature 192 */ 193 194static int 195search_for_sig(u_int32_t target, int count) 196{ 197 int x; 198 u_int32_t *addr = (u_int32_t *) (KERNBASE + target); 199 200 for (x = 0; x < count; x += 4) 201 if (addr[x] == MP_SIG) 202 /* make array index a byte index */ 203 return (target + (x * sizeof(u_int32_t))); 204 return (-1); 205} 206 207static int 208lookup_bus_type(char *name) 209{ 210 int x; 211 212 for (x = 0; x < MAX_BUSTYPE; ++x) 213 if (strncmp(bus_type_table[x].name, name, 6) == 0) 214 return (bus_type_table[x].type); 215 216 return (UNKNOWN_BUSTYPE); 217} 218 219/* 220 * Look for an Intel MP spec table (ie, SMP capable hardware). 221 */ 222static int 223mptable_probe(void) 224{ 225 int x; 226 u_long segment; 227 u_int32_t target; 228 229 /* see if EBDA exists */ 230 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) { 231 /* search first 1K of EBDA */ 232 target = (u_int32_t) (segment << 4); 233 if ((x = search_for_sig(target, 1024 / 4)) >= 0) 234 goto found; 235 } else { 236 /* last 1K of base memory, effective 'top of base' passed in */ 237 target = (u_int32_t) ((basemem * 1024) - 0x400); 238 if ((x = search_for_sig(target, 1024 / 4)) >= 0) 239 goto found; 240 } 241 242 /* search the BIOS */ 243 target = (u_int32_t) BIOS_BASE; 244 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0) 245 goto found; 246 247 /* nothing found */ 248 return (ENXIO); 249 250found: 251 mpfps = (mpfps_t)(KERNBASE + x); 252 253 /* Map in the configuration table if it exists. */ 254 if (mpfps->config_type != 0) 255 mpct = NULL; 256 else { 257 if ((uintptr_t)mpfps->pap >= 1024 * 1024) { 258 printf("%s: Unable to map MP Configuration Table\n", 259 __func__); 260 return (ENXIO); 261 } 262 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap); 263 if (mpct->base_table_length + (uintptr_t)mpfps->pap >= 264 1024 * 1024) { 265 printf("%s: Unable to map end of MP Config Table\n", 266 __func__); 267 return (ENXIO); 268 } 269 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' || 270 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') { 271 printf("%s: MP Config Table has bad signature: %c%c%c%c\n", 272 __func__, mpct->signature[0], mpct->signature[1], 273 mpct->signature[2], mpct->signature[3]); 274 return (ENXIO); 275 } 276 if (bootverbose) 277 printf( 278 "MP Configuration Table version 1.%d found at %p\n", 279 mpct->spec_rev, mpct); 280 } 281 282 return (-100); 283} 284 285/* 286 * Run through the MP table enumerating CPUs. 287 */ 288static int 289mptable_probe_cpus(void) 290{ 291 u_int cpu_mask; 292 293 /* Is this a pre-defined config? */ 294 if (mpfps->config_type != 0) { 295 lapic_create(0, 1); 296 lapic_create(1, 0); 297 } else { 298 cpu_mask = 0; 299 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask); 300#ifdef MPTABLE_FORCE_HTT 301 mptable_hyperthread_fixup(cpu_mask); 302#endif 303 } 304 return (0); 305} 306 307/* 308 * Initialize the local APIC on the BSP. 309 */ 310static int 311mptable_setup_local(void) 312{ 313 314 /* Is this a pre-defined config? */ 315 printf("MPTable: <"); 316 if (mpfps->config_type != 0) { 317 lapic_init(DEFAULT_APIC_BASE); 318 printf("Preset Config %d", mpfps->config_type); 319 } else { 320 lapic_init((uintptr_t)mpct->apic_address); 321 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id, 322 (int)sizeof(mpct->product_id), mpct->product_id); 323 } 324 printf(">\n"); 325 return (0); 326} 327 328/* 329 * Run through the MP table enumerating I/O APICs. 330 */ 331static int 332mptable_setup_io(void) 333{ 334 int i; 335 u_char byte; 336 337 /* First, we count individual items and allocate arrays. */ 338 mptable_count_items(); 339 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE, 340 M_WAITOK); 341 for (i = 0; i <= mptable_maxbusid; i++) 342 busses[i].bus_type = NOBUS; 343 344 /* Second, we run through adding I/O APIC's and busses. */ 345 mptable_parse_apics_and_busses(); 346 347 /* Third, we run through the table tweaking interrupt sources. */ 348 mptable_parse_ints(); 349 350 /* Fourth, we register all the I/O APIC's. */ 351 for (i = 0; i < NAPICID; i++) 352 if (ioapics[i] != NULL) 353 ioapic_register(ioapics[i]); 354 355 /* Fifth, we setup data structures to handle PCI interrupt routing. */ 356 mptable_pci_setup(); 357 358 /* Finally, we throw the switch to enable the I/O APIC's. */ 359 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) { 360 outb(0x22, 0x70); /* select IMCR */ 361 byte = inb(0x23); /* current contents */ 362 byte |= 0x01; /* mask external INTR */ 363 outb(0x23, byte); /* disconnect 8259s/NMI */ 364 } 365 366 return (0); 367} 368 369static void 370mptable_register(void *dummy __unused) 371{ 372 373 apic_register_enumerator(&mptable_enumerator); 374} 375SYSINIT(mptable_register, SI_SUB_CPU - 1, SI_ORDER_FIRST, mptable_register, 376 NULL) 377 378/* 379 * Call the handler routine for each entry in the MP config table. 380 */ 381static void 382mptable_walk_table(mptable_entry_handler *handler, void *arg) 383{ 384 u_int i; 385 u_char *entry; 386 387 entry = (u_char *)(mpct + 1); 388 for (i = 0; i < mpct->entry_count; i++) { 389 switch (*entry) { 390 case MPCT_ENTRY_PROCESSOR: 391 case MPCT_ENTRY_IOAPIC: 392 case MPCT_ENTRY_BUS: 393 case MPCT_ENTRY_INT: 394 case MPCT_ENTRY_LOCAL_INT: 395 break; 396 default: 397 panic("%s: Unknown MP Config Entry %d\n", __func__, 398 (int)*entry); 399 } 400 handler(entry, arg); 401 entry += basetable_entry_types[*entry].length; 402 } 403} 404 405static void 406mptable_probe_cpus_handler(u_char *entry, void *arg) 407{ 408 proc_entry_ptr proc; 409 u_int *cpu_mask; 410 411 switch (*entry) { 412 case MPCT_ENTRY_PROCESSOR: 413 proc = (proc_entry_ptr)entry; 414 if (proc->cpu_flags & PROCENTRY_FLAG_EN) { 415 lapic_create(proc->apic_id, proc->cpu_flags & 416 PROCENTRY_FLAG_BP); 417 cpu_mask = (u_int *)arg; 418 *cpu_mask |= (1 << proc->apic_id); 419 } 420 break; 421 } 422} 423 424static void 425mptable_count_items_handler(u_char *entry, void *arg __unused) 426{ 427 io_apic_entry_ptr apic; 428 bus_entry_ptr bus; 429 430 switch (*entry) { 431 case MPCT_ENTRY_BUS: 432 bus = (bus_entry_ptr)entry; 433 mptable_nbusses++; 434 if (bus->bus_id > mptable_maxbusid) 435 mptable_maxbusid = bus->bus_id; 436 break; 437 case MPCT_ENTRY_IOAPIC: 438 apic = (io_apic_entry_ptr)entry; 439 if (apic->apic_flags & IOAPICENTRY_FLAG_EN) 440 mptable_nioapics++; 441 break; 442 } 443} 444 445/* 446 * Count items in the table. 447 */ 448static void 449mptable_count_items(void) 450{ 451 452 /* Is this a pre-defined config? */ 453 if (mpfps->config_type != 0) { 454 mptable_nioapics = 1; 455 switch (mpfps->config_type) { 456 case 1: 457 case 2: 458 case 3: 459 case 4: 460 mptable_nbusses = 1; 461 break; 462 case 5: 463 case 6: 464 case 7: 465 mptable_nbusses = 2; 466 break; 467 default: 468 panic("Unknown pre-defined MP Table config type %d", 469 mpfps->config_type); 470 } 471 mptable_maxbusid = mptable_nbusses - 1; 472 } else 473 mptable_walk_table(mptable_count_items_handler, NULL); 474} 475 476/* 477 * Add a bus or I/O APIC from an entry in the table. 478 */ 479static void 480mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused) 481{ 482 io_apic_entry_ptr apic; 483 bus_entry_ptr bus; 484 enum busTypes bus_type; 485 int i; 486 487 488 switch (*entry) { 489 case MPCT_ENTRY_BUS: 490 bus = (bus_entry_ptr)entry; 491 bus_type = lookup_bus_type(bus->bus_type); 492 if (bus_type == UNKNOWN_BUSTYPE) { 493 printf("MPTable: Unknown bus %d type \"", bus->bus_id); 494 for (i = 0; i < 6; i++) 495 printf("%c", bus->bus_type[i]); 496 printf("\"\n"); 497 } 498 busses[bus->bus_id].bus_id = bus->bus_id; 499 busses[bus->bus_id].bus_type = bus_type; 500 break; 501 case MPCT_ENTRY_IOAPIC: 502 apic = (io_apic_entry_ptr)entry; 503 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN)) 504 break; 505 if (apic->apic_id >= NAPICID) 506 panic("%s: I/O APIC ID %d too high", __func__, 507 apic->apic_id); 508 if (ioapics[apic->apic_id] != NULL) 509 panic("%s: Double APIC ID %d", __func__, 510 apic->apic_id); 511 ioapics[apic->apic_id] = ioapic_create( 512 (uintptr_t)apic->apic_address, apic->apic_id, -1); 513 break; 514 default: 515 break; 516 } 517} 518 519/* 520 * Enumerate I/O APIC's and busses. 521 */ 522static void 523mptable_parse_apics_and_busses(void) 524{ 525 526 /* Is this a pre-defined config? */ 527 if (mpfps->config_type != 0) { 528 ioapics[0] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0); 529 busses[0].bus_id = 0; 530 busses[0].bus_type = default_data[mpfps->config_type][2]; 531 if (mptable_nbusses > 1) { 532 busses[1].bus_id = 1; 533 busses[1].bus_type = 534 default_data[mpfps->config_type][4]; 535 } 536 } else 537 mptable_walk_table(mptable_parse_apics_and_busses_handler, 538 NULL); 539} 540 541/* 542 * Determine conforming polarity for a given bus type. 543 */ 544static enum intr_polarity 545conforming_polarity(u_char src_bus, u_char src_bus_irq) 546{ 547 548 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus)); 549 switch (busses[src_bus].bus_type) { 550 case ISA: 551 return (INTR_POLARITY_HIGH); 552 case PCI: 553 return (INTR_POLARITY_LOW); 554#ifndef PC98 555 case EISA: 556 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq)); 557 if (elcr_read_trigger(src_bus_irq) == INTR_TRIGGER_LEVEL) 558 return (INTR_POLARITY_LOW); 559 else 560 return (INTR_POLARITY_HIGH); 561#endif 562 default: 563 panic("%s: unknown bus type %d", __func__, 564 busses[src_bus].bus_type); 565 } 566} 567 568/* 569 * Determine conforming trigger for a given bus type. 570 */ 571static enum intr_trigger 572conforming_trigger(u_char src_bus, u_char src_bus_irq) 573{ 574 575 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus)); 576 switch (busses[src_bus].bus_type) { 577 case ISA: 578 return (INTR_TRIGGER_EDGE); 579 case PCI: 580 return (INTR_TRIGGER_LEVEL); 581#ifndef PC98 582 case EISA: 583 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq)); 584 return (elcr_read_trigger(src_bus_irq)); 585#endif 586 default: 587 panic("%s: unknown bus type %d", __func__, 588 busses[src_bus].bus_type); 589 } 590} 591 592static enum intr_polarity 593intentry_polarity(int_entry_ptr intr) 594{ 595 596 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) { 597 case INTENTRY_FLAGS_POLARITY_CONFORM: 598 return (conforming_polarity(intr->src_bus_id, 599 intr->src_bus_irq)); 600 case INTENTRY_FLAGS_POLARITY_ACTIVEHI: 601 return (INTR_POLARITY_HIGH); 602 case INTENTRY_FLAGS_POLARITY_ACTIVELO: 603 return (INTR_POLARITY_LOW); 604 default: 605 panic("Bogus interrupt flags"); 606 } 607} 608 609static enum intr_trigger 610intentry_trigger(int_entry_ptr intr) 611{ 612 613 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) { 614 case INTENTRY_FLAGS_TRIGGER_CONFORM: 615 return (conforming_trigger(intr->src_bus_id, 616 intr->src_bus_irq)); 617 case INTENTRY_FLAGS_TRIGGER_EDGE: 618 return (INTR_TRIGGER_EDGE); 619 case INTENTRY_FLAGS_TRIGGER_LEVEL: 620 return (INTR_TRIGGER_LEVEL); 621 default: 622 panic("Bogus interrupt flags"); 623 } 624} 625 626/* 627 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC. 628 */ 629static void 630mptable_parse_io_int(int_entry_ptr intr) 631{ 632 void *ioapic; 633 u_int pin; 634 635 if (intr->dst_apic_id == 0xff) { 636 printf("MPTable: Ignoring global interrupt entry for pin %d\n", 637 intr->dst_apic_int); 638 return; 639 } 640 if (intr->dst_apic_id >= NAPICID) { 641 printf("MPTable: Ignoring interrupt entry for ioapic%d\n", 642 intr->dst_apic_id); 643 return; 644 } 645 ioapic = ioapics[intr->dst_apic_id]; 646 if (ioapic == NULL) { 647 printf( 648 "MPTable: Ignoring interrupt entry for missing ioapic%d\n", 649 intr->dst_apic_id); 650 return; 651 } 652 pin = intr->dst_apic_int; 653 switch (intr->int_type) { 654 case INTENTRY_TYPE_INT: 655 if (busses[intr->src_bus_id].bus_type == NOBUS) 656 panic("interrupt from missing bus"); 657 if (busses[intr->src_bus_id].bus_type == ISA && 658 intr->src_bus_irq != pin) { 659 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq); 660 if (ioapic_get_vector(ioapic, intr->src_bus_irq) == 661 intr->src_bus_irq) 662 ioapic_disable_pin(ioapic, intr->src_bus_irq); 663 } 664 break; 665 case INTENTRY_TYPE_NMI: 666 ioapic_set_nmi(ioapic, pin); 667 break; 668 case INTENTRY_TYPE_SMI: 669 ioapic_set_smi(ioapic, pin); 670 break; 671 case INTENTRY_TYPE_EXTINT: 672 ioapic_set_extint(ioapic, pin); 673 break; 674 default: 675 panic("%s: invalid interrupt entry type %d\n", __func__, 676 intr->int_type); 677 } 678 if (intr->int_type == INTENTRY_TYPE_INT || 679 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) != 680 INTENTRY_FLAGS_TRIGGER_CONFORM) 681 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr)); 682 if (intr->int_type == INTENTRY_TYPE_INT || 683 (intr->int_flags & INTENTRY_FLAGS_POLARITY) != 684 INTENTRY_FLAGS_POLARITY_CONFORM) 685 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr)); 686} 687 688/* 689 * Parse an interrupt entry for a local APIC LVT pin. 690 */ 691static void 692mptable_parse_local_int(int_entry_ptr intr) 693{ 694 u_int apic_id, pin; 695 696 if (intr->dst_apic_id == 0xff) 697 apic_id = APIC_ID_ALL; 698 else 699 apic_id = intr->dst_apic_id; 700 if (intr->dst_apic_int == 0) 701 pin = LVT_LINT0; 702 else 703 pin = LVT_LINT1; 704 switch (intr->int_type) { 705 case INTENTRY_TYPE_INT: 706#if 1 707 printf( 708 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n", 709 intr->dst_apic_int, intr->src_bus_irq); 710 return; 711#else 712 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED); 713 break; 714#endif 715 case INTENTRY_TYPE_NMI: 716 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI); 717 break; 718 case INTENTRY_TYPE_SMI: 719 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI); 720 break; 721 case INTENTRY_TYPE_EXTINT: 722 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT); 723 break; 724 default: 725 panic("%s: invalid interrupt entry type %d\n", __func__, 726 intr->int_type); 727 } 728 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) != 729 INTENTRY_FLAGS_TRIGGER_CONFORM) 730 lapic_set_lvt_triggermode(apic_id, pin, 731 intentry_trigger(intr)); 732 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) != 733 INTENTRY_FLAGS_POLARITY_CONFORM) 734 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr)); 735} 736 737/* 738 * Parse interrupt entries. 739 */ 740static void 741mptable_parse_ints_handler(u_char *entry, void *arg __unused) 742{ 743 int_entry_ptr intr; 744 745 intr = (int_entry_ptr)entry; 746 switch (*entry) { 747 case MPCT_ENTRY_INT: 748 mptable_parse_io_int(intr); 749 break; 750 case MPCT_ENTRY_LOCAL_INT: 751 mptable_parse_local_int(intr); 752 break; 753 } 754} 755 756/* 757 * Configure the interrupt pins 758 */ 759static void 760mptable_parse_ints(void) 761{ 762 763 /* Is this a pre-defined config? */ 764 if (mpfps->config_type != 0) { 765 /* Configure LINT pins. */ 766 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT); 767 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI); 768 769 /* Configure I/O APIC pins. */ 770 if (mpfps->config_type != 7) 771 ioapic_set_extint(ioapics[0], 0); 772 else 773 ioapic_disable_pin(ioapics[0], 0); 774 if (mpfps->config_type != 2) 775 ioapic_remap_vector(ioapics[0], 2, 0); 776 else 777 ioapic_disable_pin(ioapics[0], 2); 778 if (mpfps->config_type == 2) 779 ioapic_disable_pin(ioapics[0], 13); 780 } else 781 mptable_walk_table(mptable_parse_ints_handler, NULL); 782} 783 784#ifdef MPTABLE_FORCE_HTT 785/* 786 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's 787 * that aren't already listed in the table. 788 * 789 * XXX: We assume that all of the physical CPUs in the 790 * system have the same number of logical CPUs. 791 * 792 * XXX: We assume that APIC ID's are allocated such that 793 * the APIC ID's for a physical processor are aligned 794 * with the number of logical CPU's in the processor. 795 */ 796static void 797mptable_hyperthread_fixup(u_int id_mask) 798{ 799 u_int i, id, logical_cpus; 800 801 /* Nothing to do if there is no HTT support. */ 802 if ((cpu_feature & CPUID_HTT) == 0) 803 return; 804 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16; 805 if (logical_cpus <= 1) 806 return; 807 808 /* 809 * For each APIC ID of a CPU that is set in the mask, 810 * scan the other candidate APIC ID's for this 811 * physical processor. If any of those ID's are 812 * already in the table, then kill the fixup. 813 */ 814 for (id = 0; id < NAPICID; id++) { 815 if ((id_mask & 1 << id) == 0) 816 continue; 817 /* First, make sure we are on a logical_cpus boundary. */ 818 if (id % logical_cpus != 0) 819 return; 820 for (i = id + 1; i < id + logical_cpus; i++) 821 if ((id_mask & 1 << i) != 0) 822 return; 823 } 824 825 /* 826 * Ok, the ID's checked out, so perform the fixup by 827 * adding the logical CPUs. 828 */ 829 while ((id = ffs(id_mask)) != 0) { 830 id--; 831 for (i = id + 1; i < id + logical_cpus; i++) { 832 if (bootverbose) 833 printf( 834 "MPTable: Adding logical CPU %d from main CPU %d\n", 835 i, id); 836 lapic_create(i, 0); 837 } 838 id_mask &= ~(1 << id); 839 } 840} 841#endif /* MPTABLE_FORCE_HTT */ 842 843/* 844 * Support code for routing PCI interrupts using the MP Table. 845 */ 846static void 847mptable_pci_setup(void) 848{ 849 int i; 850 851 /* 852 * Find the first pci bus and call it 0. Panic if pci0 is not 853 * bus zero and there are multiple PCI busses. 854 */ 855 for (i = 0; i <= mptable_maxbusid; i++) 856 if (busses[i].bus_type == PCI) { 857 if (pci0 == -1) 858 pci0 = i; 859 else if (pci0 != 0) 860 panic( 861 "MPTable contains multiple PCI busses but no PCI bus 0"); 862 } 863} 864 865static void 866mptable_pci_probe_table_handler(u_char *entry, void *arg) 867{ 868 struct pci_probe_table_args *args; 869 int_entry_ptr intr; 870 871 if (*entry != MPCT_ENTRY_INT) 872 return; 873 intr = (int_entry_ptr)entry; 874 args = (struct pci_probe_table_args *)arg; 875 KASSERT(args->bus <= mptable_maxbusid, 876 ("bus %d is too big", args->bus)); 877 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus")); 878 if (intr->src_bus_id == args->bus) 879 args->found = 1; 880} 881 882int 883mptable_pci_probe_table(int bus) 884{ 885 struct pci_probe_table_args args; 886 887 if (bus < 0) 888 return (EINVAL); 889 if (pci0 == -1 || pci0 + bus > mptable_maxbusid) 890 return (ENXIO); 891 if (busses[pci0 + bus].bus_type != PCI) 892 return (ENXIO); 893 args.bus = pci0 + bus; 894 args.found = 0; 895 mptable_walk_table(mptable_pci_probe_table_handler, &args); 896 if (args.found == 0) 897 return (ENXIO); 898 return (0); 899} 900 901static void 902mptable_pci_route_interrupt_handler(u_char *entry, void *arg) 903{ 904 struct pci_route_interrupt_args *args; 905 int_entry_ptr intr; 906 int vector; 907 908 if (*entry != MPCT_ENTRY_INT) 909 return; 910 intr = (int_entry_ptr)entry; 911 args = (struct pci_route_interrupt_args *)arg; 912 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq) 913 return; 914 915 /* Make sure the APIC maps to a known APIC. */ 916 KASSERT(ioapics[intr->dst_apic_id] != NULL, 917 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id)); 918 919 /* 920 * Look up the vector for this APIC / pin combination. If we 921 * have previously matched an entry for this PCI IRQ but it 922 * has the same vector as this entry, just return. Otherwise, 923 * we use the vector for this APIC / pin combination. 924 */ 925 vector = ioapic_get_vector(ioapics[intr->dst_apic_id], 926 intr->dst_apic_int); 927 if (args->vector == vector) 928 return; 929 KASSERT(args->vector == -1, 930 ("Multiple entries for PCI IRQ %d", args->vector)); 931 args->vector = vector; 932} 933 934int 935mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin) 936{ 937 struct pci_route_interrupt_args args; 938 int slot; 939 940 /* Like ACPI, pin numbers are 0-3, not 1-4. */ 941 pin--; 942 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts")); 943 args.bus = pci_get_bus(dev) + pci0; 944 slot = pci_get_slot(dev); 945 946 /* 947 * PCI interrupt entries in the MP Table encode both the slot and 948 * pin into the IRQ with the pin being the two least significant 949 * bits, the slot being the next five bits, and the most significant 950 * bit being reserved. 951 */ 952 args.irq = slot << 2 | pin; 953 args.vector = -1; 954 mptable_walk_table(mptable_pci_route_interrupt_handler, &args); 955 if (args.vector < 0) { 956 device_printf(pcib, "unable to route slot %d INT%c\n", slot, 957 'A' + pin); 958 return (PCI_INVALID_IRQ); 959 } 960 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot, 'A' + pin, 961 args.vector); 962 return (args.vector); 963} 964