isa.c revision 798
1285SN/A/*- 2367SN/A * Copyright (c) 1991 The Regents of the University of California. 3285SN/A * All rights reserved. 4285SN/A * 5285SN/A * This code is derived from software contributed to Berkeley by 6285SN/A * William Jolitz. 7285SN/A * 8285SN/A * Redistribution and use in source and binary forms, with or without 9285SN/A * modification, are permitted provided that the following conditions 10285SN/A * are met: 11285SN/A * 1. Redistributions of source code must retain the above copyright 12285SN/A * notice, this list of conditions and the following disclaimer. 13285SN/A * 2. Redistributions in binary form must reproduce the above copyright 14285SN/A * notice, this list of conditions and the following disclaimer in the 15285SN/A * documentation and/or other materials provided with the distribution. 16285SN/A * 3. All advertising materials mentioning features or use of this software 17285SN/A * must display the following acknowledgement: 18285SN/A * This product includes software developed by the University of 19285SN/A * California, Berkeley and its contributors. 20285SN/A * 4. Neither the name of the University nor the names of its contributors 21285SN/A * may be used to endorse or promote products derived from this software 22285SN/A * without specific prior written permission. 23285SN/A * 24285SN/A * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25285SN/A * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26285SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27285SN/A * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28285SN/A * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29285SN/A * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30285SN/A * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31285SN/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32285SN/A * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33285SN/A * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34285SN/A * SUCH DAMAGE. 35285SN/A * 36285SN/A * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37285SN/A * $Id: isa.c,v 1.9 1993/11/17 00:21:03 ache Exp $ 38367SN/A */ 39285SN/A 40285SN/A/* 41285SN/A * code to manage AT bus 42285SN/A * 43285SN/A * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 44285SN/A * Fixed uninitialized variable problem and added code to deal 45285SN/A * with DMA page boundaries in isa_dmarangecheck(). Fixed word 46285SN/A * mode DMA count compution and reorganized DMA setup code in 47285SN/A * isa_dmastart() 48285SN/A */ 49285SN/A 50285SN/A#include "param.h" 51285SN/A#include "systm.h" /* isn't it a joy */ 52285SN/A#include "kernel.h" /* to have three of these */ 53285SN/A#include "conf.h" 54285SN/A#include "file.h" 55285SN/A#include "buf.h" 56285SN/A#include "uio.h" 57285SN/A#include "syslog.h" 58285SN/A#include "malloc.h" 59285SN/A#include "rlist.h" 60285SN/A#include "machine/segments.h" 61285SN/A#include "vm/vm.h" 62285SN/A#include "i386/isa/isa_device.h" 63285SN/A#include "i386/isa/isa.h" 64285SN/A#include "i386/isa/icu.h" 65285SN/A#include "i386/isa/ic/i8237.h" 66285SN/A#include "i386/isa/ic/i8042.h" 67285SN/A 68285SN/A/* 69285SN/A** Register definitions for DMA controller 1 (channels 0..3): 70285SN/A*/ 71285SN/A#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 72285SN/A#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 73285SN/A#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 74285SN/A#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 75285SN/A 76285SN/A/* 77285SN/A** Register definitions for DMA controller 2 (channels 4..7): 78285SN/A*/ 79285SN/A#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 80285SN/A#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 81285SN/A#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 82285SN/A#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 83285SN/A 84285SN/Avoid config_isadev __P((struct isa_device *, u_int *)); 85285SN/A 86285SN/A/* 87285SN/A * print a conflict message 88285SN/A */ 89285SN/Avoid 90285SN/Aconflict(dvp, tmpdvp, item, reason, format) 91285SN/A struct isa_device *dvp, *tmpdvp; 92285SN/A int item; 93285SN/A char *reason; 94285SN/A char *format; 95285SN/A{ 96285SN/A printf("%s%d not probed due to %s conflict with %s%d at ", 97285SN/A dvp->id_driver->name, dvp->id_unit, reason, 98285SN/A tmpdvp->id_driver->name, tmpdvp->id_unit); 99367SN/A printf(format, item); 100367SN/A printf("\n"); 101367SN/A} 102367SN/A 103367SN/A/* 104367SN/A * Check to see if things are alread in use, like IRQ's, I/O addresses 105367SN/A * and Memory addresses. 106367SN/A */ 107367SN/Aint 108367SN/Ahaveseen(dvp, tmpdvp) 109367SN/A struct isa_device *dvp, *tmpdvp; 110367SN/A{ 111367SN/A int status = 0; 112367SN/A 113367SN/A /* 114367SN/A * Only check against devices that have already been found 115367SN/A */ 116367SN/A if (tmpdvp->id_alive) { 117367SN/A /* 118367SN/A * Check for I/O address conflict. We can only check the 119367SN/A * starting address of the device against the range of the 120367SN/A * device that has already been probed since we do not 121367SN/A * know how many I/O addresses this device uses. 122367SN/A */ 123367SN/A if (tmpdvp->id_alive != -1) { 124367SN/A if ((dvp->id_iobase >= tmpdvp->id_iobase) && 125367SN/A (dvp->id_iobase <= 126367SN/A (tmpdvp->id_iobase + tmpdvp->id_alive - 1))) { 127367SN/A conflict(dvp, tmpdvp, dvp->id_iobase, 128367SN/A "I/O address", "0x%x"); 129367SN/A status = 1; 130367SN/A } 131367SN/A } 132367SN/A /* 133367SN/A * Check for Memory address conflict. We can check for 134367SN/A * range overlap, but it will not catch all cases since the 135367SN/A * driver may adjust the msize paramater during probe, for 136367SN/A * now we just check that the starting address does not 137367SN/A * fall within any allocated region. 138367SN/A * XXX could add a second check after the probe for overlap, 139367SN/A * since at that time we would know the full range. 140367SN/A * XXX KERNBASE is a hack, we should have vaddr in the table! 141367SN/A */ 142367SN/A if(tmpdvp->id_maddr) { 143367SN/A if((KERNBASE + dvp->id_maddr >= tmpdvp->id_maddr) && 144367SN/A (KERNBASE + dvp->id_maddr <= 145367SN/A (tmpdvp->id_maddr + tmpdvp->id_msize - 1))) { 146367SN/A conflict(dvp, tmpdvp, dvp->id_maddr, "maddr", 147367SN/A "0x%x"); 148367SN/A status = 1; 149367SN/A } 150367SN/A } 151367SN/A#ifndef COM_MULTIPORT 152367SN/A /* 153367SN/A * Check for IRQ conflicts. 154367SN/A */ 155367SN/A if(tmpdvp->id_irq) { 156367SN/A if (tmpdvp->id_irq == dvp->id_irq) { 157367SN/A conflict(dvp, tmpdvp, ffs(dvp->id_irq) - 1, 158367SN/A "irq", "%d"); 159367SN/A status = 1; 160367SN/A } 161367SN/A } 162367SN/A#endif 163367SN/A /* 164367SN/A * Check for DRQ conflicts. 165367SN/A */ 166367SN/A if(tmpdvp->id_drq != -1) { 167367SN/A if (tmpdvp->id_drq == dvp->id_drq) { 168367SN/A conflict(dvp, tmpdvp, dvp->id_drq, 169285SN/A "drq", "%d"); 170285SN/A status = 1; 171285SN/A } 172367SN/A } 173285SN/A } 174285SN/A return (status); 175285SN/A} 176285SN/A 177285SN/A/* 178285SN/A * Search through all the isa_devtab_* tables looking for anything that 179285SN/A * conflicts with the current device. 180285SN/A */ 181285SN/Aint 182285SN/Ahaveseen_isadev(dvp) 183367SN/A struct isa_device *dvp; 184285SN/A{ 185285SN/A struct isa_device *tmpdvp; 186285SN/A int status = 0; 187285SN/A 188285SN/A for (tmpdvp = isa_devtab_tty; tmpdvp->id_driver; tmpdvp++) { 189285SN/A status |= haveseen(dvp, tmpdvp); 190285SN/A } 191367SN/A for (tmpdvp = isa_devtab_bio; tmpdvp->id_driver; tmpdvp++) { 192285SN/A status |= haveseen(dvp, tmpdvp); 193285SN/A } 194285SN/A for (tmpdvp = isa_devtab_net; tmpdvp->id_driver; tmpdvp++) { 195285SN/A status |= haveseen(dvp, tmpdvp); 196285SN/A } 197285SN/A for (tmpdvp = isa_devtab_null; tmpdvp->id_driver; tmpdvp++) { 198285SN/A status |= haveseen(dvp, tmpdvp); 199285SN/A } 200285SN/A return(status); 201285SN/A} 202285SN/A 203285SN/A/* 204285SN/A * Configure all ISA devices 205285SN/A */ 206285SN/Avoid 207285SN/Aisa_configure() { 208285SN/A struct isa_device *dvp; 209285SN/A 210285SN/A enable_intr(); 211285SN/A splhigh(); 212285SN/A INTREN(IRQ_SLAVE); 213285SN/A printf("Probing for devices on the ISA bus:\n"); 214285SN/A for (dvp = isa_devtab_tty; dvp->id_driver; dvp++) { 215285SN/A if (!haveseen_isadev(dvp)) 216285SN/A config_isadev(dvp,&ttymask); 217285SN/A } 218285SN/A for (dvp = isa_devtab_bio; dvp->id_driver; dvp++) { 219285SN/A if (!haveseen_isadev(dvp)) 220285SN/A config_isadev(dvp,&biomask); 221285SN/A } 222285SN/A for (dvp = isa_devtab_net; dvp->id_driver; dvp++) { 223367SN/A if (!haveseen_isadev(dvp)) 224285SN/A config_isadev(dvp,&netmask); 225285SN/A } 226285SN/A for (dvp = isa_devtab_null; dvp->id_driver; dvp++) { 227285SN/A if (!haveseen_isadev(dvp)) 228285SN/A config_isadev(dvp,(u_int *) NULL); 229285SN/A } 230285SN/A/* 231285SN/A * XXX We should really add the tty device to netmask when the line is 232285SN/A * switched to SLIPDISC, and then remove it when it is switched away from 233285SN/A * SLIPDISC. No need to block out ALL ttys during a splnet when only one 234285SN/A * of them is running slip. 235285SN/A */ 236285SN/A#include "sl.h" 237285SN/A#if NSL > 0 238285SN/A netmask |= ttymask; 239285SN/A ttymask |= netmask; 240285SN/A#endif 241285SN/A /* if netmask == 0, then the loopback code can do some really 242285SN/A * bad things. 243285SN/A */ 244285SN/A if (netmask == 0) 245285SN/A netmask = 0x10000; 246285SN/A /* biomask |= ttymask ; can some tty devices use buffers? */ 247285SN/A printf("biomask %x ttymask %x netmask %x\n", biomask, ttymask, netmask); 248285SN/A splnone(); 249285SN/A} 250285SN/A 251285SN/A/* 252285SN/A * Configure an ISA device. 253285SN/A */ 254285SN/Avoid 255367SN/Aconfig_isadev(isdp, mp) 256285SN/A struct isa_device *isdp; 257285SN/A u_int *mp; 258285SN/A{ 259285SN/A struct isa_driver *dp = isdp->id_driver; 260285SN/A 261285SN/A if (isdp->id_maddr) { 262285SN/A extern u_int atdevbase; 263285SN/A 264285SN/A isdp->id_maddr -= 0xa0000; /* XXX should be a define */ 265285SN/A isdp->id_maddr += atdevbase; 266285SN/A } 267285SN/A isdp->id_alive = (*dp->probe)(isdp); 268285SN/A if (isdp->id_alive) { 269285SN/A /* 270285SN/A * Only print the I/O address range if id_alive != -1 271285SN/A * Right now this is a temporary fix just for the new 272285SN/A * NPX code so that if it finds a 486 that can use trap 273285SN/A * 16 it will not report I/O addresses. 274285SN/A * Rod Grimes 04/26/94 275285SN/A */ 276285SN/A printf("%s%d", dp->name, isdp->id_unit); 277285SN/A if (isdp->id_alive != -1) { 278285SN/A printf(" at 0x%x", isdp->id_iobase); 279285SN/A if ((isdp->id_iobase + isdp->id_alive - 1) != 280285SN/A isdp->id_iobase) { 281285SN/A printf("-0x%x", 282285SN/A isdp->id_iobase + 283285SN/A isdp->id_alive - 1); 284285SN/A } 285285SN/A } 286285SN/A if(isdp->id_irq) 287285SN/A printf(" irq %d", ffs(isdp->id_irq) - 1); 288285SN/A if (isdp->id_drq != -1) 289285SN/A printf(" drq %d", isdp->id_drq); 290285SN/A if (isdp->id_maddr) 291285SN/A printf(" maddr 0x%x", kvtop(isdp->id_maddr)); 292285SN/A if (isdp->id_msize) 293285SN/A printf(" msize %d", isdp->id_msize); 294285SN/A if (isdp->id_flags) 295285SN/A printf(" flags 0x%x", isdp->id_flags); 296285SN/A if (isdp->id_iobase < 0x100) 297285SN/A printf(" on motherboard\n"); 298285SN/A else 299285SN/A printf(" on isa\n"); 300285SN/A 301285SN/A (*dp->attach)(isdp); 302285SN/A 303285SN/A if(isdp->id_irq) { 304285SN/A int intrno; 305285SN/A 306285SN/A intrno = ffs(isdp->id_irq)-1; 307285SN/A setidt(ICU_OFFSET+intrno, isdp->id_intr, 308285SN/A SDT_SYS386IGT, SEL_KPL); 309285SN/A if(mp) { 310285SN/A INTRMASK(*mp,isdp->id_irq); 311285SN/A } 312285SN/A INTREN(isdp->id_irq); 313285SN/A } 314285SN/A } else { 315285SN/A printf("%s%d not found", dp->name, isdp->id_unit); 316367SN/A if (isdp->id_iobase) { 317285SN/A printf(" at 0x%x", isdp->id_iobase); 318285SN/A } 319285SN/A printf("\n"); 320285SN/A } 321285SN/A} 322285SN/A 323285SN/A#define IDTVEC(name) __CONCAT(X,name) 324285SN/A/* default interrupt vector table entries */ 325285SN/Aextern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3), 326285SN/A IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7), 327285SN/A IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11), 328285SN/A IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15); 329285SN/A 330285SN/Astatic *defvec[16] = { 331285SN/A &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3), 332285SN/A &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), 333285SN/A &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), 334285SN/A &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) }; 335285SN/A 336285SN/A/* out of range default interrupt vector gate entry */ 337285SN/Aextern IDTVEC(intrdefault); 338285SN/A 339367SN/A/* 340285SN/A * Fill in default interrupt table (in case of spuruious interrupt 341285SN/A * during configuration of kernel, setup interrupt control unit 342285SN/A */ 343285SN/Avoid 344285SN/Aisa_defaultirq() 345285SN/A{ 346285SN/A int i; 347285SN/A 348285SN/A /* icu vectors */ 349285SN/A for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++) 350367SN/A setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL); 351285SN/A 352285SN/A /* out of range vectors */ 353285SN/A for (i = NRSVIDT; i < NIDT; i++) 354285SN/A setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL); 355285SN/A 356285SN/A /* initialize 8259's */ 357285SN/A outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 358285SN/A outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */ 359285SN/A outb(IO_ICU1+1, 1<<2); /* slave on line 2 */ 360285SN/A#ifdef AUTO_EOI_1 361285SN/A outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ 362285SN/A#else 363285SN/A outb(IO_ICU1+1, 1); /* 8086 mode */ 364285SN/A#endif 365285SN/A outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ 366285SN/A outb(IO_ICU1, 0x0a); /* default to IRR on read */ 367285SN/A outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 368285SN/A 369367SN/A outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 370285SN/A outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */ 371285SN/A outb(IO_ICU2+1,2); /* my slave id is 2 */ 372285SN/A#ifdef AUTO_EOI_2 373285SN/A outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */ 374285SN/A#else 375285SN/A outb(IO_ICU2+1,1); /* 8086 mode */ 376285SN/A#endif 377285SN/A outb(IO_ICU2+1, 0xff); /* leave interrupts masked */ 378285SN/A outb(IO_ICU2, 0x0a); /* default to IRR on read */ 379285SN/A} 380367SN/A 381285SN/A/* region of physical memory known to be contiguous */ 382285SN/Avm_offset_t isaphysmem; 383285SN/Astatic caddr_t dma_bounce[8]; /* XXX */ 384285SN/Astatic char bounced[8]; /* XXX */ 385285SN/A#define MAXDMASZ 512 /* XXX */ 386285SN/A 387285SN/A/* high byte of address is stored in this port for i-th dma channel */ 388285SN/Astatic short dmapageport[8] = 389285SN/A { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 390285SN/A 391367SN/A/* 392285SN/A * isa_dmacascade(): program 8237 DMA controller channel to accept 393285SN/A * external dma control by a board. 394285SN/A */ 395285SN/Avoid isa_dmacascade(unsigned chan) 396285SN/A{ 397285SN/A if (chan > 7) 398285SN/A panic("isa_dmacascade: impossible request"); 399285SN/A 400285SN/A /* set dma channel mode, and set dma channel mode */ 401285SN/A if ((chan & 4) == 0) { 402285SN/A outb(DMA1_MODE, DMA37MD_CASCADE | chan); 403285SN/A outb(DMA1_SMSK, chan); 404285SN/A } else { 405285SN/A outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 406285SN/A outb(DMA2_SMSK, chan & 3); 407285SN/A } 408285SN/A} 409285SN/A 410285SN/A/* 411285SN/A * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 412285SN/A * problems by using a bounce buffer. 413285SN/A */ 414285SN/Avoid isa_dmastart(int flags, caddr_t addr, unsigned nbytes, unsigned chan) 415285SN/A{ vm_offset_t phys; 416285SN/A int waport; 417285SN/A caddr_t newaddr; 418367SN/A 419285SN/A if ( chan > 7 420285SN/A || (chan < 4 && nbytes > (1<<16)) 421285SN/A || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 422285SN/A panic("isa_dmastart: impossible request"); 423285SN/A 424285SN/A if (isa_dmarangecheck(addr, nbytes, chan)) { 425285SN/A if (dma_bounce[chan] == 0) 426285SN/A dma_bounce[chan] = 427285SN/A /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/ 428285SN/A (caddr_t) isaphysmem + NBPG*chan; 429367SN/A bounced[chan] = 1; 430285SN/A newaddr = dma_bounce[chan]; 431285SN/A *(int *) newaddr = 0; /* XXX */ 432285SN/A 433285SN/A /* copy bounce buffer on write */ 434285SN/A if (!(flags & B_READ)) 435285SN/A bcopy(addr, newaddr, nbytes); 436285SN/A addr = newaddr; 437285SN/A } 438285SN/A 439285SN/A /* translate to physical */ 440285SN/A phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 441285SN/A 442285SN/A if ((chan & 4) == 0) { 443285SN/A /* 444285SN/A * Program one of DMA channels 0..3. These are 445285SN/A * byte mode channels. 446285SN/A */ 447285SN/A /* set dma channel mode, and reset address ff */ 448285SN/A if (flags & B_READ) 449285SN/A outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 450285SN/A else 451285SN/A outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 452285SN/A outb(DMA1_FFC, 0); 453285SN/A 454285SN/A /* send start address */ 455285SN/A waport = DMA1_CHN(chan); 456285SN/A outb(waport, phys); 457285SN/A outb(waport, phys>>8); 458285SN/A outb(dmapageport[chan], phys>>16); 459285SN/A 460285SN/A /* send count */ 461367SN/A outb(waport + 1, --nbytes); 462285SN/A outb(waport + 1, nbytes>>8); 463285SN/A 464285SN/A /* unmask channel */ 465285SN/A outb(DMA1_SMSK, chan); 466285SN/A } else { 467285SN/A /* 468285SN/A * Program one of DMA channels 4..7. These are 469285SN/A * word mode channels. 470285SN/A */ 471285SN/A /* set dma channel mode, and reset address ff */ 472285SN/A if (flags & B_READ) 473285SN/A outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 474285SN/A else 475285SN/A outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 476285SN/A outb(DMA2_FFC, 0); 477285SN/A 478285SN/A /* send start address */ 479285SN/A waport = DMA2_CHN(chan - 4); 480285SN/A outb(waport, phys>>1); 481285SN/A outb(waport, phys>>9); 482285SN/A outb(dmapageport[chan], phys>>16); 483285SN/A 484285SN/A /* send count */ 485285SN/A nbytes >>= 1; 486285SN/A outb(waport + 2, --nbytes); 487285SN/A outb(waport + 2, nbytes>>8); 488285SN/A 489285SN/A /* unmask channel */ 490285SN/A outb(DMA2_SMSK, chan & 3); 491285SN/A } 492285SN/A} 493285SN/A 494285SN/Avoid isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 495285SN/A{ 496285SN/A 497285SN/A /* copy bounce buffer on read */ 498285SN/A /*if ((flags & (B_PHYS|B_READ)) == (B_PHYS|B_READ))*/ 499285SN/A if (bounced[chan]) { 500285SN/A bcopy(dma_bounce[chan], addr, nbytes); 501285SN/A bounced[chan] = 0; 502285SN/A } 503285SN/A} 504285SN/A 505285SN/A/* 506285SN/A * Check for problems with the address range of a DMA transfer 507285SN/A * (non-contiguous physical pages, outside of bus address space, 508285SN/A * crossing DMA page boundaries). 509285SN/A * Return true if special handling needed. 510285SN/A */ 511285SN/A 512285SN/Aint 513285SN/Aisa_dmarangecheck(caddr_t va, unsigned length, unsigned chan) { 514285SN/A vm_offset_t phys, priorpage = 0, endva; 515285SN/A u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 516285SN/A 517285SN/A endva = (vm_offset_t)round_page(va + length); 518285SN/A for (; va < (caddr_t) endva ; va += NBPG) { 519285SN/A phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 520285SN/A#define ISARAM_END RAM_END 521285SN/A if (phys == 0) 522285SN/A panic("isa_dmacheck: no physical page present"); 523285SN/A if (phys > ISARAM_END) 524285SN/A return (1); 525285SN/A if (priorpage) { 526285SN/A if (priorpage + NBPG != phys) 527367SN/A return (1); 528285SN/A /* check if crossing a DMA page boundary */ 529285SN/A if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 530285SN/A return (1); 531285SN/A } 532285SN/A priorpage = phys; 533285SN/A } 534285SN/A return (0); 535285SN/A} 536285SN/A 537285SN/A/* head of queue waiting for physmem to become available */ 538285SN/Astruct buf isa_physmemq; 539285SN/A 540285SN/A/* blocked waiting for resource to become free for exclusive use */ 541285SN/Astatic isaphysmemflag; 542285SN/A/* if waited for and call requested when free (B_CALL) */ 543285SN/Astatic void (*isaphysmemunblock)(); /* needs to be a list */ 544285SN/A 545285SN/A/* 546285SN/A * Allocate contiguous physical memory for transfer, returning 547285SN/A * a *virtual* address to region. May block waiting for resource. 548285SN/A * (assumed to be called at splbio()) 549285SN/A */ 550285SN/Acaddr_t 551285SN/Aisa_allocphysmem(caddr_t va, unsigned length, void (*func)()) { 552285SN/A 553285SN/A isaphysmemunblock = func; 554285SN/A while (isaphysmemflag & B_BUSY) { 555285SN/A isaphysmemflag |= B_WANTED; 556285SN/A tsleep((caddr_t)&isaphysmemflag, PRIBIO, "isaphys", 0); 557285SN/A } 558285SN/A isaphysmemflag |= B_BUSY; 559285SN/A 560285SN/A return((caddr_t)isaphysmem); 561285SN/A} 562285SN/A 563285SN/A/* 564285SN/A * Free contiguous physical memory used for transfer. 565367SN/A * (assumed to be called at splbio()) 566285SN/A */ 567285SN/Avoid 568285SN/Aisa_freephysmem(caddr_t va, unsigned length) { 569285SN/A 570285SN/A isaphysmemflag &= ~B_BUSY; 571285SN/A if (isaphysmemflag & B_WANTED) { 572285SN/A isaphysmemflag &= B_WANTED; 573285SN/A wakeup((caddr_t)&isaphysmemflag); 574285SN/A if (isaphysmemunblock) 575285SN/A (*isaphysmemunblock)(); 576285SN/A } 577285SN/A} 578285SN/A 579285SN/A/* 580285SN/A * Handle a NMI, possibly a machine check. 581285SN/A * return true to panic system, false to ignore. 582285SN/A */ 583367SN/Aint 584285SN/Aisa_nmi(cd) 585285SN/A int cd; 586285SN/A{ 587285SN/A 588285SN/A log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70)); 589367SN/A return(0); 590285SN/A} 591367SN/A 592285SN/A/* 593285SN/A * Caught a stray interrupt, notify 594285SN/A */ 595285SN/Avoid 596285SN/Aisa_strayintr(d) 597285SN/A int d; 598367SN/A{ 599367SN/A 600367SN/A /* DON'T BOTHER FOR NOW! */ 601367SN/A /* for some reason, we get bursts of intr #7, even if not enabled! */ 602367SN/A /* 603367SN/A * Well the reason you got bursts of intr #7 is because someone 604367SN/A * raised an interrupt line and dropped it before the 8259 could 605367SN/A * prioritize it. This is documented in the intel data book. This 606367SN/A * means you have BAD hardware! I have changed this so that only 607367SN/A * the first 5 get logged, then it quits logging them, and puts 608367SN/A * out a special message. rgrimes 3/25/1993 609367SN/A */ 610367SN/A extern u_long intrcnt_stray; 611367SN/A 612367SN/A intrcnt_stray++; 613367SN/A if (intrcnt_stray <= 5) 614367SN/A log(LOG_ERR,"ISA strayintr %x\n", d); 615367SN/A if (intrcnt_stray == 5) 616367SN/A log(LOG_CRIT,"Too many ISA strayintr not logging any more\n"); 617367SN/A} 618367SN/A 619285SN/A/* 620285SN/A * Wait "n" microseconds. 621367SN/A * Relies on timer 1 counting down from (TIMER_FREQ / hz) at 622285SN/A * (1 * TIMER_FREQ) Hz. 623285SN/A * Note: timer had better have been programmed before this is first used! 624367SN/A * (The standard programming causes the timer to generate a square wave and 625285SN/A * the counter is decremented twice every cycle.) 626367SN/A */ 627285SN/A#define CF (1 * TIMER_FREQ) 628285SN/A#define TIMER_FREQ 1193182 /* XXX - should be elsewhere */ 629285SN/A 630285SN/Avoid 631285SN/ADELAY(n) 632285SN/A int n; 633285SN/A{ 634285SN/A int counter_limit; 635285SN/A int prev_tick; 636285SN/A int tick; 637285SN/A int ticks_left; 638285SN/A int sec; 639285SN/A int usec; 640285SN/A 641285SN/A#ifdef DELAYDEBUG 642285SN/A int getit_calls = 1; 643285SN/A int n1; 644285SN/A static int state = 0; 645285SN/A 646285SN/A if (state == 0) { 647285SN/A state = 1; 648285SN/A for (n1 = 1; n1 <= 10000000; n1 *= 10) 649285SN/A DELAY(n1); 650285SN/A state = 2; 651285SN/A } 652285SN/A if (state == 1) 653285SN/A printf("DELAY(%d)...", n); 654285SN/A#endif 655285SN/A 656285SN/A /* 657285SN/A * Read the counter first, so that the rest of the setup overhead is 658285SN/A * counted. Guess the initial overhead is 20 usec (on most systems it 659285SN/A * takes about 1.5 usec for each of the i/o's in getit(). The loop 660285SN/A * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 661285SN/A * multiplications and divisions to scale the count take a while). 662285SN/A */ 663285SN/A prev_tick = getit(0, 0); 664285SN/A n -= 20; 665285SN/A 666285SN/A /* 667285SN/A * Calculate (n * (CF / 1e6)) without using floating point and without 668285SN/A * any avoidable overflows. 669285SN/A */ 670285SN/A sec = n / 1000000; 671285SN/A usec = n - sec * 1000000; 672285SN/A ticks_left = sec * CF 673285SN/A + usec * (CF / 1000000) 674285SN/A + usec * ((CF % 1000000) / 1000) / 1000 675285SN/A + usec * (CF % 1000) / 1000000; 676285SN/A 677285SN/A counter_limit = TIMER_FREQ / hz; 678285SN/A while (ticks_left > 0) { 679285SN/A tick = getit(0, 0); 680285SN/A#ifdef DELAYDEBUG 681285SN/A ++getit_calls; 682285SN/A#endif 683285SN/A if (tick > prev_tick) 684285SN/A ticks_left -= prev_tick - (tick - counter_limit); 685285SN/A else 686285SN/A ticks_left -= prev_tick - tick; 687285SN/A prev_tick = tick; 688285SN/A } 689285SN/A#ifdef DELAYDEBUG 690285SN/A if (state == 1) 691285SN/A printf(" %d calls to getit() at %d usec each\n", 692285SN/A getit_calls, (n + 5) / getit_calls); 693285SN/A#endif 694285SN/A} 695285SN/A 696285SN/Aint 697285SN/Agetit(unit, timer) 698285SN/A int unit; 699285SN/A int timer; 700367SN/A{ 701285SN/A int high; 702285SN/A int low; 703367SN/A 704285SN/A /* 705285SN/A * XXX - isa.h defines bogus timers. There's no such timer as 706285SN/A * IO_TIMER_2 = 0x48. There's a timer in the CMOS RAM chip but 707285SN/A * its interface is quite different. Neither timer is an 8252. 708285SN/A * We actually only call this with unit = 0 and timer = 0. It 709285SN/A * could be static... 710285SN/A */ 711285SN/A /* 712367SN/A * Protect ourself against interrupts. 713285SN/A * XXX - sysbeep() and sysbeepstop() need protection. 714367SN/A */ 715285SN/A disable_intr(); 716285SN/A /* 717285SN/A * Latch the count for 'timer' (cc00xxxx, c = counter, x = any). 718285SN/A */ 719285SN/A outb(IO_TIMER1 + 3, timer << 6); 720285SN/A 721285SN/A low = inb(IO_TIMER1 + timer); 722 high = inb(IO_TIMER1 + timer); 723 enable_intr(); 724 return ((high << 8) | low); 725} 726 727static int beeping; 728 729static void 730sysbeepstop(f, dummy) 731 caddr_t f; 732 int dummy; 733{ 734 /* disable counter 2 */ 735 outb(0x61, inb(0x61) & 0xFC); 736 if (f) 737 timeout(sysbeepstop, (caddr_t)0, (int)f); 738 else 739 beeping = 0; 740} 741 742void 743sysbeep(int pitch, int period) 744{ 745 746 outb(0x61, inb(0x61) | 3); /* enable counter 2 */ 747 /* 748 * XXX - move timer stuff to clock.c. 749 * Program counter 2: 750 * ccaammmb, c counter, a = access, m = mode, b = BCD 751 * 1011x110, 11 for aa = LSB then MSB, x11 for mmm = square wave. 752 */ 753 outb(0x43, 0xb6); /* set command for counter 2, 2 byte write */ 754 755 outb(0x42, pitch); 756 outb(0x42, (pitch>>8)); 757 758 if (!beeping) { 759 beeping = period; 760 timeout(sysbeepstop, (caddr_t)(period/2), period); 761 } 762} 763 764/* 765 * Pass command to keyboard controller (8042) 766 */ 767unsigned 768kbc_8042cmd(val) 769 int val; 770{ 771 772 while (inb(KBSTATP)&KBS_IBF); 773 if (val) outb(KBCMDP, val); 774 while (inb(KBSTATP)&KBS_IBF); 775 return (inb(KBDATAP)); 776} 777 778/* 779 * find an ISA device in a given isa_devtab_* table, given 780 * the table to search, the expected id_driver entry, and the unit number. 781 * 782 * this function is defined in isa_device.h, and this location is debatable; 783 * i put it there because it's useless w/o, and directly operates on 784 * the other stuff in that file. 785 * 786 */ 787 788struct isa_device *find_isadev(table, driverp, unit) 789 struct isa_device *table; 790 struct isa_driver *driverp; 791 int unit; 792{ 793 if (driverp == NULL) /* sanity check */ 794 return NULL; 795 796 while ((table->id_driver != driverp) || (table->id_unit != unit)) { 797 if (table->id_driver == 0) 798 return NULL; 799 800 table++; 801 } 802 803 return table; 804} 805 806/* 807 * Return nonzero if a (masked) irq is pending for a given device. 808 */ 809int 810isa_irq_pending(dvp) 811 struct isa_device *dvp; 812{ 813 unsigned id_irq; 814 815 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */ 816 if (id_irq & 0xff) 817 return (inb(IO_ICU1) & id_irq); 818 return (inb(IO_ICU2) & (id_irq >> 8)); 819} 820