isa.c revision 3258
14Srgrimes/*-
24Srgrimes * Copyright (c) 1991 The Regents of the University of California.
34Srgrimes * All rights reserved.
44Srgrimes *
54Srgrimes * This code is derived from software contributed to Berkeley by
64Srgrimes * William Jolitz.
74Srgrimes *
84Srgrimes * Redistribution and use in source and binary forms, with or without
94Srgrimes * modification, are permitted provided that the following conditions
104Srgrimes * are met:
114Srgrimes * 1. Redistributions of source code must retain the above copyright
124Srgrimes *    notice, this list of conditions and the following disclaimer.
134Srgrimes * 2. Redistributions in binary form must reproduce the above copyright
144Srgrimes *    notice, this list of conditions and the following disclaimer in the
154Srgrimes *    documentation and/or other materials provided with the distribution.
164Srgrimes * 3. All advertising materials mentioning features or use of this software
174Srgrimes *    must display the following acknowledgement:
184Srgrimes *	This product includes software developed by the University of
194Srgrimes *	California, Berkeley and its contributors.
204Srgrimes * 4. Neither the name of the University nor the names of its contributors
214Srgrimes *    may be used to endorse or promote products derived from this software
224Srgrimes *    without specific prior written permission.
234Srgrimes *
244Srgrimes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
254Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
264Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
274Srgrimes * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
284Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
294Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
304Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
314Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
324Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
334Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
344Srgrimes * SUCH DAMAGE.
354Srgrimes *
36593Srgrimes *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
373258Sdg *	$Id: isa.c,v 1.26 1994/09/30 05:35:55 swallace Exp $
384Srgrimes */
394Srgrimes
404Srgrimes/*
414Srgrimes * code to manage AT bus
424Srgrimes *
434Srgrimes * 92/08/18  Frank P. MacLachlan (fpm@crash.cts.com):
444Srgrimes * Fixed uninitialized variable problem and added code to deal
454Srgrimes * with DMA page boundaries in isa_dmarangecheck().  Fixed word
464Srgrimes * mode DMA count compution and reorganized DMA setup code in
474Srgrimes * isa_dmastart()
484Srgrimes */
494Srgrimes
502056Swollman#include <sys/param.h>
512056Swollman#include <sys/systm.h>		/* isn't it a joy */
522056Swollman#include <sys/kernel.h>		/* to have three of these */
532056Swollman#include <sys/conf.h>
542056Swollman#include <sys/file.h>
552056Swollman#include <sys/buf.h>
562056Swollman#include <sys/uio.h>
572056Swollman#include <sys/syslog.h>
582056Swollman#include <sys/malloc.h>
592056Swollman#include <sys/rlist.h>
602056Swollman#include <machine/segments.h>
612056Swollman#include <vm/vm.h>
621549Srgrimes#include <machine/spl.h>
632056Swollman#include <i386/isa/isa_device.h>
642056Swollman#include <i386/isa/isa.h>
652056Swollman#include <i386/isa/icu.h>
662056Swollman#include <i386/isa/ic/i8237.h>
672056Swollman#include <i386/isa/ic/i8042.h>
682103Sdg#include "vector.h"
694Srgrimes
704Srgrimes/*
714Srgrimes**  Register definitions for DMA controller 1 (channels 0..3):
724Srgrimes*/
734Srgrimes#define	DMA1_CHN(c)	(IO_DMA1 + 1*(2*(c)))	/* addr reg for channel c */
744Srgrimes#define	DMA1_SMSK	(IO_DMA1 + 1*10)	/* single mask register */
754Srgrimes#define	DMA1_MODE	(IO_DMA1 + 1*11)	/* mode register */
764Srgrimes#define	DMA1_FFC	(IO_DMA1 + 1*12)	/* clear first/last FF */
774Srgrimes
784Srgrimes/*
794Srgrimes**  Register definitions for DMA controller 2 (channels 4..7):
804Srgrimes*/
81630Srgrimes#define	DMA2_CHN(c)	(IO_DMA2 + 2*(2*(c)))	/* addr reg for channel c */
824Srgrimes#define	DMA2_SMSK	(IO_DMA2 + 2*10)	/* single mask register */
834Srgrimes#define	DMA2_MODE	(IO_DMA2 + 2*11)	/* mode register */
844Srgrimes#define	DMA2_FFC	(IO_DMA2 + 2*12)	/* clear first/last FF */
854Srgrimes
862103Sdg/*
872103Sdg * Bits to specify the type and amount of conflict checking.
882103Sdg */
892103Sdg#define	CC_ATTACH	(1 << 0)
902103Sdg#define	CC_DRQ		(1 << 1)
912103Sdg#define	CC_IOADDR	(1 << 2)
922103Sdg#define	CC_IRQ		(1 << 3)
932103Sdg#define	CC_MEMADDR	(1 << 4)
944Srgrimes
954Srgrimes/*
962103Sdg * XXX these defines should be in a central place.
972103Sdg */
982103Sdg#define	read_eflags()		({u_long ef; \
992103Sdg				  __asm("pushfl; popl %0" : "=a" (ef)); \
1002103Sdg				  ef; })
1012103Sdg#define	write_eflags(ef)	__asm("pushl %0; popfl" : : "a" ((u_long)(ef)))
1022103Sdg
1032103Sdgu_long	*intr_countp[ICU_LEN];
1042103Sdginthand2_t *intr_handler[ICU_LEN];
1052103Sdgu_int	intr_mask[ICU_LEN];
1062103Sdgint	intr_unit[ICU_LEN];
1072103Sdg
1082103Sdgstatic inthand_t *fastintr[ICU_LEN] = {
1092103Sdg	&IDTVEC(fastintr0), &IDTVEC(fastintr1),
1102103Sdg	&IDTVEC(fastintr2), &IDTVEC(fastintr3),
1112103Sdg	&IDTVEC(fastintr4), &IDTVEC(fastintr5),
1122103Sdg	&IDTVEC(fastintr6), &IDTVEC(fastintr7),
1132103Sdg	&IDTVEC(fastintr8), &IDTVEC(fastintr9),
1142103Sdg	&IDTVEC(fastintr10), &IDTVEC(fastintr11),
1152103Sdg	&IDTVEC(fastintr12), &IDTVEC(fastintr13),
1162103Sdg	&IDTVEC(fastintr14), &IDTVEC(fastintr15)
1172103Sdg};
1182103Sdg
1192103Sdgstatic inthand_t *slowintr[ICU_LEN] = {
1202103Sdg	&IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
1212103Sdg	&IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
1222103Sdg	&IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
1232103Sdg	&IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15)
1242103Sdg};
1252103Sdg
1262103Sdgstatic void config_isadev __P((struct isa_device *isdp, u_int *mp));
1272103Sdgstatic void conflict __P((struct isa_device *dvp, struct isa_device *tmpdvp,
1282103Sdg			  int item, char const *whatnot, char const *reason,
1292103Sdg			  char const *format));
1302103Sdgstatic int haveseen __P((struct isa_device *dvp, struct isa_device *tmpdvp,
1312103Sdg			 u_int checkbits));
1322103Sdgstatic int haveseen_isadev __P((struct isa_device *dvp, u_int checkbits));
1332103Sdgstatic inthand2_t isa_strayintr;
1342103Sdgstatic void register_imask __P((struct isa_device *dvp, u_int mask));
1352103Sdg
1362103Sdg/*
137593Srgrimes * print a conflict message
1384Srgrimes */
1392103Sdgstatic void
1402103Sdgconflict(dvp, tmpdvp, item, whatnot, reason, format)
1412103Sdg	struct isa_device	*dvp;
1422103Sdg	struct isa_device	*tmpdvp;
143593Srgrimes	int			item;
1442103Sdg	char const		*whatnot;
1452103Sdg	char const		*reason;
1462103Sdg	char const		*format;
147593Srgrimes{
1482103Sdg	printf("%s%d not %sed due to %s conflict with %s%d at ",
1492103Sdg		dvp->id_driver->name, dvp->id_unit, whatnot, reason,
150593Srgrimes		tmpdvp->id_driver->name, tmpdvp->id_unit);
151593Srgrimes	printf(format, item);
152593Srgrimes	printf("\n");
1534Srgrimes}
1544Srgrimes
1554Srgrimes/*
156593Srgrimes * Check to see if things are alread in use, like IRQ's, I/O addresses
157593Srgrimes * and Memory addresses.
1584Srgrimes */
1592103Sdgstatic int
1602103Sdghaveseen(dvp, tmpdvp, checkbits)
1612103Sdg	struct isa_device *dvp;
1622103Sdg	struct isa_device *tmpdvp;
1632103Sdg	u_int	checkbits;
1644Srgrimes{
165593Srgrimes	int	status = 0;
1664Srgrimes
167593Srgrimes	/*
168593Srgrimes	 * Only check against devices that have already been found
169593Srgrimes	 */
170593Srgrimes	if (tmpdvp->id_alive) {
1712103Sdg		char const *whatnot;
1722103Sdg
1732466Sats		whatnot = checkbits & CC_ATTACH ? "attach" : "prob";
174593Srgrimes		/*
175593Srgrimes		 * Check for I/O address conflict.  We can only check the
176593Srgrimes		 * starting address of the device against the range of the
177593Srgrimes		 * device that has already been probed since we do not
178593Srgrimes		 * know how many I/O addresses this device uses.
179593Srgrimes		 */
1802103Sdg		if (checkbits & CC_IOADDR && tmpdvp->id_alive != -1) {
181593Srgrimes			if ((dvp->id_iobase >= tmpdvp->id_iobase) &&
182593Srgrimes			    (dvp->id_iobase <=
183593Srgrimes				  (tmpdvp->id_iobase + tmpdvp->id_alive - 1))) {
1842103Sdg				conflict(dvp, tmpdvp, dvp->id_iobase, whatnot,
185593Srgrimes					 "I/O address", "0x%x");
186593Srgrimes				status = 1;
187593Srgrimes			}
1884Srgrimes		}
189593Srgrimes		/*
190593Srgrimes		 * Check for Memory address conflict.  We can check for
191593Srgrimes		 * range overlap, but it will not catch all cases since the
192593Srgrimes		 * driver may adjust the msize paramater during probe, for
193593Srgrimes		 * now we just check that the starting address does not
194593Srgrimes		 * fall within any allocated region.
195593Srgrimes		 * XXX could add a second check after the probe for overlap,
196593Srgrimes		 * since at that time we would know the full range.
197593Srgrimes		 * XXX KERNBASE is a hack, we should have vaddr in the table!
198593Srgrimes		 */
1992103Sdg		if (checkbits & CC_MEMADDR && tmpdvp->id_maddr) {
2002103Sdg			if ((KERNBASE + dvp->id_maddr >= tmpdvp->id_maddr) &&
2012103Sdg			    (KERNBASE + dvp->id_maddr <=
2022103Sdg			     (tmpdvp->id_maddr + tmpdvp->id_msize - 1))) {
2032103Sdg				conflict(dvp, tmpdvp, (int)dvp->id_maddr,
2042103Sdg					 whatnot, "maddr", "0x%x");
205593Srgrimes				status = 1;
2064Srgrimes			}
207593Srgrimes		}
208593Srgrimes		/*
209593Srgrimes		 * Check for IRQ conflicts.
210593Srgrimes		 */
2112103Sdg		if (checkbits & CC_IRQ && tmpdvp->id_irq) {
212593Srgrimes			if (tmpdvp->id_irq == dvp->id_irq) {
213593Srgrimes				conflict(dvp, tmpdvp, ffs(dvp->id_irq) - 1,
2142103Sdg					 whatnot, "irq", "%d");
215593Srgrimes				status = 1;
2164Srgrimes			}
217593Srgrimes		}
218593Srgrimes		/*
219593Srgrimes		 * Check for DRQ conflicts.
220593Srgrimes		 */
2212103Sdg		if (checkbits & CC_DRQ && tmpdvp->id_drq != -1) {
222593Srgrimes			if (tmpdvp->id_drq == dvp->id_drq) {
2232103Sdg				conflict(dvp, tmpdvp, dvp->id_drq, whatnot,
2242103Sdg					 "drq", "%d");
225593Srgrimes				status = 1;
2264Srgrimes			}
227593Srgrimes		}
228593Srgrimes	}
229593Srgrimes	return (status);
230593Srgrimes}
2314Srgrimes
232593Srgrimes/*
233593Srgrimes * Search through all the isa_devtab_* tables looking for anything that
234593Srgrimes * conflicts with the current device.
235593Srgrimes */
2362103Sdgstatic int
2372103Sdghaveseen_isadev(dvp, checkbits)
238593Srgrimes	struct isa_device *dvp;
2392103Sdg	u_int	checkbits;
240593Srgrimes{
241593Srgrimes	struct isa_device *tmpdvp;
242593Srgrimes	int	status = 0;
2434Srgrimes
2442103Sdg	for (tmpdvp = isa_devtab_tty; tmpdvp->id_driver; tmpdvp++)
2452103Sdg		status |= haveseen(dvp, tmpdvp, checkbits);
2462103Sdg	for (tmpdvp = isa_devtab_bio; tmpdvp->id_driver; tmpdvp++)
2472103Sdg		status |= haveseen(dvp, tmpdvp, checkbits);
2482103Sdg	for (tmpdvp = isa_devtab_net; tmpdvp->id_driver; tmpdvp++)
2492103Sdg		status |= haveseen(dvp, tmpdvp, checkbits);
2502103Sdg	for (tmpdvp = isa_devtab_null; tmpdvp->id_driver; tmpdvp++)
2512103Sdg		status |= haveseen(dvp, tmpdvp, checkbits);
252593Srgrimes	return(status);
2534Srgrimes}
254593Srgrimes
2554Srgrimes/*
2564Srgrimes * Configure all ISA devices
2574Srgrimes */
258593Srgrimesvoid
2594Srgrimesisa_configure() {
2604Srgrimes	struct isa_device *dvp;
2614Srgrimes
2622103Sdg	splhigh();
2634Srgrimes	enable_intr();
2644Srgrimes	INTREN(IRQ_SLAVE);
265593Srgrimes	printf("Probing for devices on the ISA bus:\n");
2662103Sdg	for (dvp = isa_devtab_tty; dvp->id_driver; dvp++)
2672103Sdg		config_isadev(dvp, &tty_imask);
2682103Sdg	for (dvp = isa_devtab_bio; dvp->id_driver; dvp++)
2692103Sdg		config_isadev(dvp, &bio_imask);
2702103Sdg	for (dvp = isa_devtab_net; dvp->id_driver; dvp++)
2712103Sdg		config_isadev(dvp, &net_imask);
2722103Sdg	for (dvp = isa_devtab_null; dvp->id_driver; dvp++)
2732103Sdg		config_isadev(dvp, (u_int *)NULL);
2741321Sdg	bio_imask |= SWI_CLOCK_MASK;
2751321Sdg	net_imask |= SWI_NET_MASK;
2761321Sdg	tty_imask |= SWI_TTY_MASK;
2771321Sdg
278593Srgrimes/*
2791321Sdg * XXX we should really add the tty device to net_imask when the line is
280593Srgrimes * switched to SLIPDISC, and then remove it when it is switched away from
2811321Sdg * SLIPDISC.  No need to block out ALL ttys during a splimp when only one
282593Srgrimes * of them is running slip.
2831321Sdg *
2841321Sdg * XXX actually, blocking all ttys during a splimp doesn't matter so much
2851321Sdg * with sio because the serial interrupt layer doesn't use tty_imask.  Only
2861321Sdg * non-serial ttys suffer.  It's more stupid that ALL 'net's are blocked
2871321Sdg * during spltty.
288593Srgrimes */
2894Srgrimes#include "sl.h"
2904Srgrimes#if NSL > 0
2911321Sdg	net_imask |= tty_imask;
2921321Sdg	tty_imask = net_imask;
2934Srgrimes#endif
2941321Sdg	/* bio_imask |= tty_imask ;  can some tty devices use buffers? */
2951321Sdg#ifdef DIAGNOSTIC
2961321Sdg	printf("bio_imask %x tty_imask %x net_imask %x\n",
2971321Sdg	       bio_imask, tty_imask, net_imask);
2981321Sdg#endif
2992103Sdg	/*
3002103Sdg	 * Finish initializing intr_mask[].  Note that the partly
3012103Sdg	 * constructed masks aren't actually used since we're at splhigh.
3022103Sdg	 * For fully dynamic initialization, register_intr() and
3032103Sdg	 * unregister_intr() will have to adjust the masks for _all_
3042103Sdg	 * interrupts and for tty_imask, etc.
3052103Sdg	 */
3062103Sdg	for (dvp = isa_devtab_tty; dvp->id_driver; dvp++)
3072103Sdg		register_imask(dvp, tty_imask);
3082103Sdg	for (dvp = isa_devtab_bio; dvp->id_driver; dvp++)
3092103Sdg		register_imask(dvp, bio_imask);
3102103Sdg	for (dvp = isa_devtab_net; dvp->id_driver; dvp++)
3112103Sdg		register_imask(dvp, net_imask);
3122103Sdg	for (dvp = isa_devtab_null; dvp->id_driver; dvp++)
3132103Sdg		register_imask(dvp, SWI_CLOCK_MASK);
3142918Sbde	spl0();
3154Srgrimes}
3164Srgrimes
3174Srgrimes/*
3184Srgrimes * Configure an ISA device.
3194Srgrimes */
3203258Sdg
3213258Sdg
3223258Sdgstatic void config_isadev_c();
3233258Sdg
3242103Sdgstatic void
3254Srgrimesconfig_isadev(isdp, mp)
3263258Sdg     struct isa_device *isdp;
3273258Sdg     u_int *mp;
3283258Sdg{
3293258Sdg	config_isadev_c(isdp, mp, 0);
3303258Sdg}
3313258Sdg
3323258Sdgvoid
3333258Sdgreconfig_isadev(isdp, mp)
3344Srgrimes	struct isa_device *isdp;
3354Srgrimes	u_int *mp;
3364Srgrimes{
3373258Sdg	config_isadev_c(isdp, mp, 1);
3383258Sdg}
3393258Sdg
3403258Sdgstatic void
3413258Sdgconfig_isadev_c(isdp, mp, reconfig)
3423258Sdg	struct isa_device *isdp;
3433258Sdg	u_int *mp;
3443258Sdg	int reconfig;
3453258Sdg{
3462103Sdg	u_int checkbits;
3472103Sdg	int id_alive;
3483258Sdg	int last_alive;
349593Srgrimes	struct isa_driver *dp = isdp->id_driver;
3504Srgrimes
3512103Sdg 	checkbits = 0;
3523224Sswallace#ifndef ALLOW_CONFLICT_IRQ
3533224Sswallace	checkbits |= CC_IRQ;
3543224Sswallace#endif
3552103Sdg#ifndef ALLOW_CONFLICT_DRQ
3562103Sdg	checkbits |= CC_DRQ;
3572103Sdg#endif
3582103Sdg#ifndef ALLOW_CONFLICT_IOADDR
3592103Sdg	checkbits |= CC_IOADDR;
3602103Sdg#endif
3612103Sdg#ifndef ALLOW_CONFLICT_MEMADDR
3622103Sdg	checkbits |= CC_MEMADDR;
3632103Sdg#endif
3643258Sdg	if (!reconfig && haveseen_isadev(isdp, checkbits))
3652103Sdg		return;
3663258Sdg	if (!reconfig && isdp->id_maddr) {
367593Srgrimes		isdp->id_maddr -= 0xa0000; /* XXX should be a define */
368593Srgrimes		isdp->id_maddr += atdevbase;
369593Srgrimes	}
3703258Sdg	if (reconfig) {
3713258Sdg		last_alive = isdp->id_alive;
3723258Sdg	}
3733258Sdg	else {
3743258Sdg		last_alive = 0;
3753258Sdg	}
3762103Sdg	id_alive = (*dp->probe)(isdp);
3772103Sdg	if (id_alive) {
378593Srgrimes		/*
379593Srgrimes		 * Only print the I/O address range if id_alive != -1
380593Srgrimes		 * Right now this is a temporary fix just for the new
381593Srgrimes		 * NPX code so that if it finds a 486 that can use trap
382593Srgrimes		 * 16 it will not report I/O addresses.
383593Srgrimes		 * Rod Grimes 04/26/94
384593Srgrimes		 */
3853258Sdg		if (!isdp->id_reconfig) {
3863258Sdg			printf("%s%d", dp->name, isdp->id_unit);
3873258Sdg			if (id_alive != -1) {
3883258Sdg 				printf(" at 0x%x", isdp->id_iobase);
3893258Sdg 				if ((isdp->id_iobase + id_alive - 1) !=
3903258Sdg 				     isdp->id_iobase) {
3913258Sdg 					printf("-0x%x",
3923258Sdg					       isdp->id_iobase + id_alive - 1);
3933258Sdg				}
394593Srgrimes			}
3953258Sdg			if (isdp->id_irq)
3963258Sdg				printf(" irq %d", ffs(isdp->id_irq) - 1);
3973258Sdg			if (isdp->id_drq != -1)
3983258Sdg				printf(" drq %d", isdp->id_drq);
3993258Sdg			if (isdp->id_maddr)
4003258Sdg				printf(" maddr 0x%lx", kvtop(isdp->id_maddr));
4013258Sdg			if (isdp->id_msize)
4023258Sdg				printf(" msize %d", isdp->id_msize);
4033258Sdg			if (isdp->id_flags)
4043258Sdg				printf(" flags 0x%x", isdp->id_flags);
4053258Sdg			if (isdp->id_iobase) {
4063258Sdg				if (isdp->id_iobase < 0x100) {
4073258Sdg					printf(" on motherboard\n");
4081002Srgrimes				} else {
4093258Sdg					if (isdp->id_iobase >= 0x1000) {
4103258Sdg						printf (" on eisa\n");
4113258Sdg					} else {
4123258Sdg						printf (" on isa\n");
4133258Sdg					}
4141002Srgrimes				}
4151002Srgrimes			}
4163258Sdg			/*
4173258Sdg			 * Check for conflicts again.  The driver may have
4183258Sdg			 * changed *dvp.  We should weaken the early check
4193258Sdg			 * since the driver may have been able to change
4203258Sdg			 * *dvp to avoid conflicts if given a chance.  We
4213258Sdg			 * already skip the early check for IRQs and force
4223258Sdg			 * a check for IRQs in the next group of checks.
4233258Sdg		 	 */
4243224Sswallace#ifndef ALLOW_CONFLICT_IRQ
4253258Sdg			checkbits |= CC_IRQ;
4263224Sswallace#endif
4273258Sdg			if (haveseen_isadev(isdp, checkbits))
4283258Sdg				return;
4293258Sdg			isdp->id_alive = id_alive;
4303258Sdg		}
431593Srgrimes		(*dp->attach)(isdp);
4322103Sdg		if (isdp->id_irq) {
4332103Sdg			if (mp)
4342103Sdg				INTRMASK(*mp, isdp->id_irq);
4352103Sdg			register_intr(ffs(isdp->id_irq) - 1, isdp->id_id,
4362103Sdg				      isdp->id_ri_flags, isdp->id_intr,
4372103Sdg				      mp ? *mp : 0, isdp->id_unit);
438593Srgrimes			INTREN(isdp->id_irq);
4394Srgrimes		}
440593Srgrimes	} else {
4413258Sdg		if (isdp->id_reconfig) {
4423258Sdg			(*dp->attach)(isdp); /* reconfiguration attach */
443593Srgrimes		}
4443258Sdg		if (!last_alive) {
4453258Sdg			if (!isdp->id_reconfig) {
4463258Sdg				printf("%s%d not found", dp->name, isdp->id_unit);
4473258Sdg				if (isdp->id_iobase) {
4483258Sdg					printf(" at 0x%x", isdp->id_iobase);
4493258Sdg				}
4503258Sdg				printf("\n");
4513258Sdg			}
4523258Sdg		}
4533258Sdg		else {
4543258Sdg			/* This code has not been tested.... */
4553258Sdg			if (isdp->id_irq) {
4563258Sdg				INTRDIS(isdp->id_irq);
4573258Sdg				unregister_intr(ffs(isdp->id_irq) - 1,
4583258Sdg						isdp->id_intr);
4593258Sdg				if (mp)
4603258Sdg					INTRUNMASK(*mp, isdp->id_irq);
4613258Sdg			}
4623258Sdg		}
463593Srgrimes	}
4644Srgrimes}
4654Srgrimes
4664Srgrimes/*
4674Srgrimes * Fill in default interrupt table (in case of spuruious interrupt
4684Srgrimes * during configuration of kernel, setup interrupt control unit
4694Srgrimes */
470798Swollmanvoid
471798Swollmanisa_defaultirq()
472798Swollman{
4734Srgrimes	int i;
4744Srgrimes
4754Srgrimes	/* icu vectors */
4761321Sdg	for (i = 0; i < ICU_LEN; i++)
4772103Sdg		unregister_intr(i, (inthand2_t *)NULL);
4784Srgrimes
4794Srgrimes	/* initialize 8259's */
4804Srgrimes	outb(IO_ICU1, 0x11);		/* reset; program device, four bytes */
4814Srgrimes	outb(IO_ICU1+1, NRSVIDT);	/* starting at this vector index */
4824Srgrimes	outb(IO_ICU1+1, 1<<2);		/* slave on line 2 */
4834Srgrimes#ifdef AUTO_EOI_1
4844Srgrimes	outb(IO_ICU1+1, 2 | 1);		/* auto EOI, 8086 mode */
4854Srgrimes#else
4864Srgrimes	outb(IO_ICU1+1, 1);		/* 8086 mode */
4874Srgrimes#endif
4884Srgrimes	outb(IO_ICU1+1, 0xff);		/* leave interrupts masked */
4894Srgrimes	outb(IO_ICU1, 0x0a);		/* default to IRR on read */
4904Srgrimes	outb(IO_ICU1, 0xc0 | (3 - 1));	/* pri order 3-7, 0-2 (com2 first) */
4914Srgrimes
4924Srgrimes	outb(IO_ICU2, 0x11);		/* reset; program device, four bytes */
4934Srgrimes	outb(IO_ICU2+1, NRSVIDT+8);	/* staring at this vector index */
4944Srgrimes	outb(IO_ICU2+1,2);		/* my slave id is 2 */
4954Srgrimes#ifdef AUTO_EOI_2
4964Srgrimes	outb(IO_ICU2+1, 2 | 1);		/* auto EOI, 8086 mode */
4974Srgrimes#else
4984Srgrimes	outb(IO_ICU2+1,1);		/* 8086 mode */
4994Srgrimes#endif
5004Srgrimes	outb(IO_ICU2+1, 0xff);		/* leave interrupts masked */
5014Srgrimes	outb(IO_ICU2, 0x0a);		/* default to IRR on read */
5024Srgrimes}
5034Srgrimes
5044Srgrimes/* region of physical memory known to be contiguous */
5054Srgrimesvm_offset_t isaphysmem;
5064Srgrimesstatic caddr_t dma_bounce[8];		/* XXX */
5074Srgrimesstatic char bounced[8];		/* XXX */
5084Srgrimes#define MAXDMASZ 512		/* XXX */
5094Srgrimes
5104Srgrimes/* high byte of address is stored in this port for i-th dma channel */
5114Srgrimesstatic short dmapageport[8] =
5124Srgrimes	{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
5134Srgrimes
5144Srgrimes/*
5154Srgrimes * isa_dmacascade(): program 8237 DMA controller channel to accept
5164Srgrimes * external dma control by a board.
5174Srgrimes */
5184Srgrimesvoid isa_dmacascade(unsigned chan)
5194Srgrimes{
5204Srgrimes	if (chan > 7)
5214Srgrimes		panic("isa_dmacascade: impossible request");
5224Srgrimes
5234Srgrimes	/* set dma channel mode, and set dma channel mode */
5244Srgrimes	if ((chan & 4) == 0) {
5254Srgrimes		outb(DMA1_MODE, DMA37MD_CASCADE | chan);
5264Srgrimes		outb(DMA1_SMSK, chan);
5274Srgrimes	} else {
5284Srgrimes		outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
5294Srgrimes		outb(DMA2_SMSK, chan & 3);
5304Srgrimes	}
5314Srgrimes}
5324Srgrimes
5332103Sdgstatic int
5342103Sdgisa_dmarangecheck(caddr_t va, unsigned length, unsigned chan);
5352103Sdg
5364Srgrimes/*
5374Srgrimes * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
5384Srgrimes * problems by using a bounce buffer.
5394Srgrimes */
5404Srgrimesvoid isa_dmastart(int flags, caddr_t addr, unsigned nbytes, unsigned chan)
5414Srgrimes{	vm_offset_t phys;
5424Srgrimes	int waport;
5434Srgrimes	caddr_t newaddr;
5444Srgrimes
5454Srgrimes	if (    chan > 7
5464Srgrimes	    || (chan < 4 && nbytes > (1<<16))
5474Srgrimes	    || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
5484Srgrimes		panic("isa_dmastart: impossible request");
5494Srgrimes
5504Srgrimes	if (isa_dmarangecheck(addr, nbytes, chan)) {
5514Srgrimes		if (dma_bounce[chan] == 0)
5524Srgrimes			dma_bounce[chan] =
5534Srgrimes				/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
5544Srgrimes				(caddr_t) isaphysmem + NBPG*chan;
5554Srgrimes		bounced[chan] = 1;
5564Srgrimes		newaddr = dma_bounce[chan];
5574Srgrimes		*(int *) newaddr = 0;	/* XXX */
5584Srgrimes
5594Srgrimes		/* copy bounce buffer on write */
5604Srgrimes		if (!(flags & B_READ))
5614Srgrimes			bcopy(addr, newaddr, nbytes);
5624Srgrimes		addr = newaddr;
5634Srgrimes	}
5644Srgrimes
5654Srgrimes	/* translate to physical */
5664Srgrimes	phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
5674Srgrimes
5684Srgrimes	if ((chan & 4) == 0) {
5694Srgrimes		/*
5704Srgrimes		 * Program one of DMA channels 0..3.  These are
5714Srgrimes		 * byte mode channels.
5724Srgrimes		 */
5734Srgrimes		/* set dma channel mode, and reset address ff */
5744Srgrimes		if (flags & B_READ)
5754Srgrimes			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
5764Srgrimes		else
5774Srgrimes			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
5784Srgrimes		outb(DMA1_FFC, 0);
5794Srgrimes
5804Srgrimes		/* send start address */
5814Srgrimes		waport =  DMA1_CHN(chan);
5824Srgrimes		outb(waport, phys);
5834Srgrimes		outb(waport, phys>>8);
5844Srgrimes		outb(dmapageport[chan], phys>>16);
5854Srgrimes
5864Srgrimes		/* send count */
5874Srgrimes		outb(waport + 1, --nbytes);
5884Srgrimes		outb(waport + 1, nbytes>>8);
5894Srgrimes
5904Srgrimes		/* unmask channel */
5914Srgrimes		outb(DMA1_SMSK, chan);
5924Srgrimes	} else {
5934Srgrimes		/*
5944Srgrimes		 * Program one of DMA channels 4..7.  These are
5954Srgrimes		 * word mode channels.
5964Srgrimes		 */
5974Srgrimes		/* set dma channel mode, and reset address ff */
5984Srgrimes		if (flags & B_READ)
5994Srgrimes			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
6004Srgrimes		else
6014Srgrimes			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
6024Srgrimes		outb(DMA2_FFC, 0);
6034Srgrimes
6044Srgrimes		/* send start address */
6054Srgrimes		waport = DMA2_CHN(chan - 4);
6064Srgrimes		outb(waport, phys>>1);
6074Srgrimes		outb(waport, phys>>9);
6084Srgrimes		outb(dmapageport[chan], phys>>16);
6094Srgrimes
6104Srgrimes		/* send count */
6114Srgrimes		nbytes >>= 1;
6124Srgrimes		outb(waport + 2, --nbytes);
6134Srgrimes		outb(waport + 2, nbytes>>8);
6144Srgrimes
6154Srgrimes		/* unmask channel */
6164Srgrimes		outb(DMA2_SMSK, chan & 3);
6174Srgrimes	}
6184Srgrimes}
6194Srgrimes
6204Srgrimesvoid isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
6214Srgrimes{
6224Srgrimes
6234Srgrimes	/* copy bounce buffer on read */
6244Srgrimes	/*if ((flags & (B_PHYS|B_READ)) == (B_PHYS|B_READ))*/
6254Srgrimes	if (bounced[chan]) {
6264Srgrimes		bcopy(dma_bounce[chan], addr, nbytes);
6274Srgrimes		bounced[chan] = 0;
6284Srgrimes	}
6294Srgrimes}
6304Srgrimes
6314Srgrimes/*
6324Srgrimes * Check for problems with the address range of a DMA transfer
6334Srgrimes * (non-contiguous physical pages, outside of bus address space,
6344Srgrimes * crossing DMA page boundaries).
6354Srgrimes * Return true if special handling needed.
6364Srgrimes */
6374Srgrimes
6382103Sdgstatic int
6394Srgrimesisa_dmarangecheck(caddr_t va, unsigned length, unsigned chan) {
6404Srgrimes	vm_offset_t phys, priorpage = 0, endva;
6414Srgrimes	u_int dma_pgmsk = (chan & 4) ?  ~(128*1024-1) : ~(64*1024-1);
6424Srgrimes
6434Srgrimes	endva = (vm_offset_t)round_page(va + length);
6444Srgrimes	for (; va < (caddr_t) endva ; va += NBPG) {
6454Srgrimes		phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
6464Srgrimes#define ISARAM_END	RAM_END
6474Srgrimes		if (phys == 0)
6484Srgrimes			panic("isa_dmacheck: no physical page present");
6491323Sache		if (phys >= ISARAM_END)
6504Srgrimes			return (1);
6514Srgrimes		if (priorpage) {
6524Srgrimes			if (priorpage + NBPG != phys)
6534Srgrimes				return (1);
6544Srgrimes			/* check if crossing a DMA page boundary */
6554Srgrimes			if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
6564Srgrimes				return (1);
6574Srgrimes		}
6584Srgrimes		priorpage = phys;
6594Srgrimes	}
6604Srgrimes	return (0);
6614Srgrimes}
6624Srgrimes
6634Srgrimes/* head of queue waiting for physmem to become available */
6644Srgrimesstruct buf isa_physmemq;
6654Srgrimes
6664Srgrimes/* blocked waiting for resource to become free for exclusive use */
6674Srgrimesstatic isaphysmemflag;
6684Srgrimes/* if waited for and call requested when free (B_CALL) */
6694Srgrimesstatic void (*isaphysmemunblock)(); /* needs to be a list */
6704Srgrimes
6714Srgrimes/*
6724Srgrimes * Allocate contiguous physical memory for transfer, returning
6734Srgrimes * a *virtual* address to region. May block waiting for resource.
6744Srgrimes * (assumed to be called at splbio())
6754Srgrimes */
6764Srgrimescaddr_t
6774Srgrimesisa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
6784Srgrimes
6794Srgrimes	isaphysmemunblock = func;
6804Srgrimes	while (isaphysmemflag & B_BUSY) {
6814Srgrimes		isaphysmemflag |= B_WANTED;
682798Swollman		tsleep((caddr_t)&isaphysmemflag, PRIBIO, "isaphys", 0);
6834Srgrimes	}
6844Srgrimes	isaphysmemflag |= B_BUSY;
6854Srgrimes
6864Srgrimes	return((caddr_t)isaphysmem);
6874Srgrimes}
6884Srgrimes
6894Srgrimes/*
6904Srgrimes * Free contiguous physical memory used for transfer.
6914Srgrimes * (assumed to be called at splbio())
6924Srgrimes */
6934Srgrimesvoid
6944Srgrimesisa_freephysmem(caddr_t va, unsigned length) {
6954Srgrimes
6964Srgrimes	isaphysmemflag &= ~B_BUSY;
6974Srgrimes	if (isaphysmemflag & B_WANTED) {
6984Srgrimes		isaphysmemflag &= B_WANTED;
699798Swollman		wakeup((caddr_t)&isaphysmemflag);
7004Srgrimes		if (isaphysmemunblock)
7014Srgrimes			(*isaphysmemunblock)();
7024Srgrimes	}
7034Srgrimes}
7044Srgrimes
7052001Swollman#define NMI_PARITY (1 << 7)
7062001Swollman#define NMI_IOCHAN (1 << 6)
7072001Swollman#define ENMI_WATCHDOG (1 << 7)
7082001Swollman#define ENMI_BUSTIMER (1 << 6)
7092001Swollman#define ENMI_IOSTATUS (1 << 5)
7102001Swollman
7114Srgrimes/*
7124Srgrimes * Handle a NMI, possibly a machine check.
7134Srgrimes * return true to panic system, false to ignore.
7144Srgrimes */
715798Swollmanint
716798Swollmanisa_nmi(cd)
717798Swollman	int cd;
718798Swollman{
7192001Swollman	int isa_port = inb(0x61);
7202001Swollman	int eisa_port = inb(0x461);
7212001Swollman	if(isa_port & NMI_PARITY) {
7222001Swollman		panic("RAM parity error, likely hardware failure.");
7232001Swollman	} else if(isa_port & NMI_IOCHAN) {
7242001Swollman		panic("I/O channel check, likely hardware failure.");
7252001Swollman	} else if(eisa_port & ENMI_WATCHDOG) {
7262001Swollman		panic("EISA watchdog timer expired, likely hardware failure.");
7272001Swollman	} else if(eisa_port & ENMI_BUSTIMER) {
7282001Swollman		panic("EISA bus timeout, likely hardware failure.");
7292001Swollman	} else if(eisa_port & ENMI_IOSTATUS) {
7302001Swollman		panic("EISA I/O port status error.");
7312001Swollman	} else {
7322001Swollman		printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
7332001Swollman		return(0);
7342001Swollman	}
7354Srgrimes}
7364Srgrimes
7374Srgrimes/*
7384Srgrimes * Caught a stray interrupt, notify
7394Srgrimes */
7402103Sdgstatic void
741798Swollmanisa_strayintr(d)
742798Swollman	int d;
743798Swollman{
7444Srgrimes
7454Srgrimes	/* DON'T BOTHER FOR NOW! */
7464Srgrimes	/* for some reason, we get bursts of intr #7, even if not enabled! */
7474Srgrimes	/*
7484Srgrimes	 * Well the reason you got bursts of intr #7 is because someone
7494Srgrimes	 * raised an interrupt line and dropped it before the 8259 could
7504Srgrimes	 * prioritize it.  This is documented in the intel data book.  This
7514Srgrimes	 * means you have BAD hardware!  I have changed this so that only
7524Srgrimes	 * the first 5 get logged, then it quits logging them, and puts
7534Srgrimes	 * out a special message. rgrimes 3/25/1993
7544Srgrimes	 */
7552103Sdg	/*
7562103Sdg	 * XXX TODO print a different message for #7 if it is for a
7572103Sdg	 * glitch.  Glitches can be distinguished from real #7's by
7582103Sdg	 * testing that the in-service bit is _not_ set.  The test
7592103Sdg	 * must be done before sending an EOI so it can't be done if
7602103Sdg	 * we are using AUTO_EOI_1.
7612103Sdg	 */
7622103Sdg	if (intrcnt[NR_DEVICES + d] <= 5)
7632103Sdg		log(LOG_ERR, "stray irq %d\n", d);
7642103Sdg	if (intrcnt[NR_DEVICES + d] == 5)
7652103Sdg		log(LOG_CRIT,
7662103Sdg		    "too many stray irq %d's; not logging any more\n", d);
7674Srgrimes}
7684Srgrimes
7694Srgrimes/*
7704Srgrimes * find an ISA device in a given isa_devtab_* table, given
7714Srgrimes * the table to search, the expected id_driver entry, and the unit number.
7724Srgrimes *
7734Srgrimes * this function is defined in isa_device.h, and this location is debatable;
7744Srgrimes * i put it there because it's useless w/o, and directly operates on
7754Srgrimes * the other stuff in that file.
7764Srgrimes *
7774Srgrimes */
7784Srgrimes
7794Srgrimesstruct isa_device *find_isadev(table, driverp, unit)
7804Srgrimes     struct isa_device *table;
7814Srgrimes     struct isa_driver *driverp;
7824Srgrimes     int unit;
7834Srgrimes{
7844Srgrimes  if (driverp == NULL) /* sanity check */
7854Srgrimes    return NULL;
7864Srgrimes
7874Srgrimes  while ((table->id_driver != driverp) || (table->id_unit != unit)) {
7884Srgrimes    if (table->id_driver == 0)
7894Srgrimes      return NULL;
7904Srgrimes
7914Srgrimes    table++;
7924Srgrimes  }
7934Srgrimes
7944Srgrimes  return table;
7954Srgrimes}
7964Srgrimes
7974Srgrimes/*
7984Srgrimes * Return nonzero if a (masked) irq is pending for a given device.
7994Srgrimes */
8004Srgrimesint
8014Srgrimesisa_irq_pending(dvp)
8024Srgrimes	struct isa_device *dvp;
8034Srgrimes{
8044Srgrimes	unsigned id_irq;
8054Srgrimes
8062103Sdg	id_irq = dvp->id_irq;
8074Srgrimes	if (id_irq & 0xff)
8084Srgrimes		return (inb(IO_ICU1) & id_irq);
8094Srgrimes	return (inb(IO_ICU2) & (id_irq >> 8));
8104Srgrimes}
8112103Sdg
8122103Sdgint
8132103Sdgregister_intr(intr, device_id, flags, handler, mask, unit)
8142103Sdg	int	intr;
8152103Sdg	int	device_id;
8162103Sdg	u_int	flags;
8172103Sdg	inthand2_t *handler;
8182103Sdg	u_int	mask;
8192103Sdg	int	unit;
8202103Sdg{
8212103Sdg	char	*cp;
8222103Sdg	u_long	ef;
8232103Sdg	int	id;
8242103Sdg
8252103Sdg	if ((u_int)intr >= ICU_LEN || intr == 2
8262103Sdg	    || (u_int)device_id >= NR_DEVICES)
8272103Sdg		return (EINVAL);
8282103Sdg	if (intr_handler[intr] != isa_strayintr)
8292103Sdg		return (EBUSY);
8302103Sdg	ef = read_eflags();
8312103Sdg	disable_intr();
8322103Sdg	intr_countp[intr] = &intrcnt[device_id];
8332103Sdg	intr_handler[intr] = handler;
8342103Sdg	intr_mask[intr] = mask | (1 << intr);
8352103Sdg	intr_unit[intr] = unit;
8362103Sdg	setidt(ICU_OFFSET + intr,
8372103Sdg	       flags & RI_FAST ? fastintr[intr] : slowintr[intr],
8382103Sdg	       SDT_SYS386IGT, SEL_KPL);
8392103Sdg	write_eflags(ef);
8402103Sdg	for (cp = intrnames, id = 0; id <= device_id; id++)
8412103Sdg		while (*cp++ != '\0')
8422103Sdg			;
8432103Sdg	if (cp > eintrnames)
8442103Sdg		return (0);
8452103Sdg	if (intr < 10) {
8462103Sdg		cp[-3] = intr + '0';
8472103Sdg		cp[-2] = ' ';
8482103Sdg	} else {
8492103Sdg		cp[-3] = '1';
8502103Sdg		cp[-2] = intr - 10 + '0';
8512103Sdg	}
8522103Sdg	return (0);
8532103Sdg}
8542103Sdg
8552103Sdgstatic void
8562103Sdgregister_imask(dvp, mask)
8572103Sdg	struct isa_device *dvp;
8582103Sdg	u_int	mask;
8592103Sdg{
8602103Sdg	if (dvp->id_alive && dvp->id_irq) {
8612103Sdg		int	intr;
8622103Sdg
8632103Sdg		intr = ffs(dvp->id_irq) - 1;
8642103Sdg		intr_mask[intr] = mask | (1 <<intr);
8652103Sdg	}
8662103Sdg}
8672103Sdg
8682103Sdgint
8692103Sdgunregister_intr(intr, handler)
8702103Sdg	int	intr;
8712103Sdg	inthand2_t *handler;
8722103Sdg{
8732103Sdg	u_long	ef;
8742103Sdg
8752103Sdg	if ((u_int)intr >= ICU_LEN || handler != intr_handler[intr])
8762103Sdg		return (EINVAL);
8772103Sdg	ef = read_eflags();
8782103Sdg	disable_intr();
8792103Sdg	intr_countp[intr] = &intrcnt[NR_DEVICES + intr];
8802103Sdg	intr_handler[intr] = isa_strayintr;
8812103Sdg	intr_mask[intr] = HWI_MASK | SWI_MASK;
8822103Sdg	intr_unit[intr] = intr;
8832103Sdg	setidt(ICU_OFFSET + intr, slowintr[intr], SDT_SYS386IGT, SEL_KPL);
8842103Sdg	write_eflags(ef);
8852103Sdg	return (0);
8862103Sdg}
887