1213237Sgonzo/* $NetBSD: gpio.h,v 1.7 2009/09/25 20:27:50 mbalmer Exp $ */ 2213237Sgonzo/* $OpenBSD: gpio.h,v 1.7 2008/11/26 14:51:20 mbalmer Exp $ */ 3213237Sgonzo/*- 4213237Sgonzo * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 5213237Sgonzo * All rights reserved. 6213237Sgonzo * 7213237Sgonzo * Redistribution and use in source and binary forms, with or without 8213237Sgonzo * modification, are permitted provided that the following conditions 9213237Sgonzo * are met: 10213237Sgonzo * 1. Redistributions of source code must retain the above copyright 11213237Sgonzo * notice unmodified, this list of conditions, and the following 12213237Sgonzo * disclaimer. 13213237Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 14213237Sgonzo * notice, this list of conditions and the following disclaimer in the 15213237Sgonzo * documentation and/or other materials provided with the distribution. 16213237Sgonzo * 17213237Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18213237Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19213237Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20213237Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21213237Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22213237Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23213237Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24213237Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25213237Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26213237Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27213237Sgonzo * SUCH DAMAGE. 28213237Sgonzo * 29213237Sgonzo * $FreeBSD: stable/11/sys/sys/gpio.h 324755 2017-10-19 16:07:57Z ian $ 30213237Sgonzo * 31213237Sgonzo */ 32213237Sgonzo 33213237Sgonzo/* 34213237Sgonzo * Copyright (c) 2009 Marc Balmer <marc@msys.ch> 35213237Sgonzo * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org> 36213237Sgonzo * 37213237Sgonzo * Permission to use, copy, modify, and distribute this software for any 38213237Sgonzo * purpose with or without fee is hereby granted, provided that the above 39213237Sgonzo * copyright notice and this permission notice appear in all copies. 40213237Sgonzo * 41213237Sgonzo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 42213237Sgonzo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 43213237Sgonzo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 44213237Sgonzo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 45213237Sgonzo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 46213237Sgonzo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 47213237Sgonzo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 48213237Sgonzo */ 49213237Sgonzo 50213237Sgonzo#ifndef __GPIO_H__ 51213237Sgonzo#define __GPIO_H__ 52213237Sgonzo 53213237Sgonzo#include <sys/ioccom.h> 54213237Sgonzo 55213237Sgonzo/* GPIO pin states */ 56213237Sgonzo#define GPIO_PIN_LOW 0x00 /* low level (logical 0) */ 57213237Sgonzo#define GPIO_PIN_HIGH 0x01 /* high level (logical 1) */ 58213237Sgonzo 59213237Sgonzo/* Max name length of a pin */ 60213237Sgonzo#define GPIOMAXNAME 64 61213237Sgonzo 62213237Sgonzo/* GPIO pin configuration flags */ 63298738Smmel#define GPIO_PIN_INPUT 0x00000001 /* input direction */ 64298738Smmel#define GPIO_PIN_OUTPUT 0x00000002 /* output direction */ 65298738Smmel#define GPIO_PIN_OPENDRAIN 0x00000004 /* open-drain output */ 66298738Smmel#define GPIO_PIN_PUSHPULL 0x00000008 /* push-pull output */ 67298738Smmel#define GPIO_PIN_TRISTATE 0x00000010 /* output disabled */ 68298738Smmel#define GPIO_PIN_PULLUP 0x00000020 /* internal pull-up enabled */ 69298738Smmel#define GPIO_PIN_PULLDOWN 0x00000040 /* internal pull-down enabled */ 70298738Smmel#define GPIO_PIN_INVIN 0x00000080 /* invert input */ 71298738Smmel#define GPIO_PIN_INVOUT 0x00000100 /* invert output */ 72298738Smmel#define GPIO_PIN_PULSATE 0x00000200 /* pulsate in hardware */ 73324755Sian#define GPIO_PIN_PRESET_LOW 0x00000400 /* preset pin to high or */ 74324755Sian#define GPIO_PIN_PRESET_HIGH 0x00000800 /* low before enabling output */ 75298738Smmel/* GPIO interrupt capabilities */ 76298738Smmel#define GPIO_INTR_NONE 0x00000000 /* no interrupt support */ 77298738Smmel#define GPIO_INTR_LEVEL_LOW 0x00010000 /* level trigger, low */ 78298738Smmel#define GPIO_INTR_LEVEL_HIGH 0x00020000 /* level trigger, high */ 79298738Smmel#define GPIO_INTR_EDGE_RISING 0x00040000 /* edge trigger, rising */ 80298738Smmel#define GPIO_INTR_EDGE_FALLING 0x00080000 /* edge trigger, falling */ 81298738Smmel#define GPIO_INTR_EDGE_BOTH 0x00100000 /* edge trigger, both */ 82298738Smmel#define GPIO_INTR_MASK (GPIO_INTR_LEVEL_LOW | GPIO_INTR_LEVEL_HIGH | \ 83298738Smmel GPIO_INTR_EDGE_RISING | \ 84298738Smmel GPIO_INTR_EDGE_FALLING | GPIO_INTR_EDGE_BOTH) 85213237Sgonzo 86213237Sgonzostruct gpio_pin { 87213237Sgonzo uint32_t gp_pin; /* pin number */ 88213237Sgonzo char gp_name[GPIOMAXNAME]; /* human-readable name */ 89213237Sgonzo uint32_t gp_caps; /* capabilities */ 90213237Sgonzo uint32_t gp_flags; /* current flags */ 91213237Sgonzo}; 92213237Sgonzo 93213237Sgonzo/* GPIO pin request (read/write/toggle) */ 94213237Sgonzostruct gpio_req { 95213237Sgonzo uint32_t gp_pin; /* pin number */ 96213237Sgonzo uint32_t gp_value; /* value */ 97213237Sgonzo}; 98213237Sgonzo 99213237Sgonzo/* 100324755Sian * gpio_access_32 / GPIOACCESS32 101324755Sian * 102324755Sian * Simultaneously read and/or change up to 32 adjacent pins. 103324755Sian * If the device cannot change the pins simultaneously, returns EOPNOTSUPP. 104324755Sian * 105324755Sian * This accesses an adjacent set of up to 32 pins starting at first_pin within 106324755Sian * the device's collection of pins. How the hardware pins are mapped to the 32 107324755Sian * bits in the arguments is device-specific. It is expected that lower-numbered 108324755Sian * pins in the device's number space map linearly to lower-ordered bits within 109324755Sian * the 32-bit words (i.e., bit 0 is first_pin, bit 1 is first_pin+1, etc). 110324755Sian * Other mappings are possible; know your device. 111324755Sian * 112324755Sian * Some devices may limit the value of first_pin to 0, or to multiples of 16 or 113324755Sian * 32 or some other hardware-specific number; to access pin 2 would require 114324755Sian * first_pin to be zero and then manipulate bit (1 << 2) in the 32-bit word. 115324755Sian * Invalid values in first_pin result in an EINVAL error return. 116324755Sian * 117324755Sian * The starting state of the pins is captured and stored in orig_pins, then the 118324755Sian * pins are set to ((starting_state & ~clear_pins) ^ change_pins). 119324755Sian * 120324755Sian * Clear Change Hardware pin after call 121324755Sian * 0 0 No change 122324755Sian * 0 1 Opposite of current value 123324755Sian * 1 0 Cleared 124324755Sian * 1 1 Set 125324755Sian */ 126324755Sianstruct gpio_access_32 { 127324755Sian uint32_t first_pin; /* First pin in group of 32 adjacent */ 128324755Sian uint32_t clear_pins; /* Pins are changed using: */ 129324755Sian uint32_t change_pins; /* ((hwstate & ~clear_pins) ^ change_pins) */ 130324755Sian uint32_t orig_pins; /* Returned hwstate of pins before change. */ 131324755Sian}; 132324755Sian 133324755Sian/* 134324755Sian * gpio_config_32 / GPIOCONFIG32 135324755Sian * 136324755Sian * Simultaneously configure up to 32 adjacent pins. This is intended to change 137324755Sian * the configuration of all the pins simultaneously, such that pins configured 138324755Sian * for output all begin to drive the configured values simultaneously, but not 139324755Sian * all hardware can do that, so the driver "does the best it can" in this 140324755Sian * regard. Notably unlike pin_access_32(), this does NOT fail if the pins 141324755Sian * cannot be atomically configured; it is expected that callers understand the 142324755Sian * hardware and have decided to live with any such limitations it may have. 143324755Sian * 144324755Sian * The pin_flags argument is an array of GPIO_PIN_xxxx flags. If the array 145324755Sian * contains any GPIO_PIN_OUTPUT flags, the driver will manipulate the hardware 146324755Sian * such that all output pins become driven with the proper initial values 147324755Sian * simultaneously if it can. The elements in the array map to pins in the same 148324755Sian * way that bits are mapped by pin_acces_32(), and the same restrictions may 149324755Sian * apply. For example, to configure pins 2 and 3 it may be necessary to set 150324755Sian * first_pin to zero and only populate pin_flags[2] and pin_flags[3]. If a 151324755Sian * given array entry doesn't contain GPIO_PIN_INPUT or GPIO_PIN_OUTPUT then no 152324755Sian * configuration is done for that pin. 153324755Sian * 154324755Sian * Some devices may limit the value of first_pin to 0, or to multiples of 16 or 155324755Sian * 32 or some other hardware-specific number. Invalid values in first_pin or 156324755Sian * num_pins result in an error return with errno set to EINVAL. 157324755Sian */ 158324755Sianstruct gpio_config_32 { 159324755Sian uint32_t first_pin; 160324755Sian uint32_t num_pins; 161324755Sian uint32_t pin_flags[32]; 162324755Sian}; 163324755Sian 164324755Sian/* 165213237Sgonzo * ioctls 166213237Sgonzo */ 167213237Sgonzo#define GPIOMAXPIN _IOR('G', 0, int) 168213237Sgonzo#define GPIOGETCONFIG _IOWR('G', 1, struct gpio_pin) 169213237Sgonzo#define GPIOSETCONFIG _IOW('G', 2, struct gpio_pin) 170213237Sgonzo#define GPIOGET _IOWR('G', 3, struct gpio_req) 171213237Sgonzo#define GPIOSET _IOW('G', 4, struct gpio_req) 172213237Sgonzo#define GPIOTOGGLE _IOWR('G', 5, struct gpio_req) 173279761Sloos#define GPIOSETNAME _IOW('G', 6, struct gpio_pin) 174324755Sian#define GPIOACCESS32 _IOWR('G', 7, struct gpio_access_32) 175324755Sian#define GPIOCONFIG32 _IOW('G', 8, struct gpio_config_32) 176213237Sgonzo 177213237Sgonzo#endif /* __GPIO_H__ */ 178