ata.h revision 84584
174298Ssos/*- 274298Ssos * Copyright (c) 2000,2001 S�ren Schmidt 374298Ssos * All rights reserved. 474298Ssos * 574298Ssos * Redistribution and use in source and binary forms, with or without 674298Ssos * modification, are permitted provided that the following conditions 774298Ssos * are met: 874298Ssos * 1. Redistributions of source code must retain the above copyright 974298Ssos * notice, this list of conditions and the following disclaimer, 1074298Ssos * without modification, immediately at the beginning of the file. 1174298Ssos * 2. Redistributions in binary form must reproduce the above copyright 1274298Ssos * notice, this list of conditions and the following disclaimer in the 1374298Ssos * documentation and/or other materials provided with the distribution. 1474298Ssos * 3. The name of the author may not be used to endorse or promote products 1574298Ssos * derived from this software without specific prior written permission. 1674298Ssos * 1774298Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1874298Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1974298Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2074298Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2174298Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2274298Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2374298Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2474298Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2574298Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2674298Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2774298Ssos * 2874298Ssos * $FreeBSD: head/sys/sys/ata.h 84584 2001-10-06 11:07:04Z sos $ 2974298Ssos */ 3074298Ssos 3174298Ssos#ifndef _SYS_ATA_H_ 3274298Ssos#define _SYS_ATA_H_ 3374298Ssos 3474298Ssos#include <sys/ioccom.h> 3574298Ssos 3674298Ssos/* ATA/ATAPI device parameter information */ 3774298Ssosstruct ata_params { 3884584Ssos/*000*/ u_int16_t packet_size :2; /* packet command size */ 3982560Ssos#define ATAPI_PSIZE_12 0 /* 12 bytes */ 4082560Ssos#define ATAPI_PSIZE_16 1 /* 16 bytes */ 4174298Ssos 4284584Ssos u_int16_t incomplete :1; 4384584Ssos u_int16_t :2; 4484584Ssos u_int16_t drq_type :2; /* DRQ type */ 4582560Ssos#define ATAPI_DRQT_MPROC 0 /* cpu 3 ms delay */ 4682560Ssos#define ATAPI_DRQT_INTR 1 /* intr 10 ms delay */ 4782560Ssos#define ATAPI_DRQT_ACCEL 2 /* accel 50 us delay */ 4874298Ssos 4984584Ssos u_int16_t removable :1; /* device is removable */ 5084584Ssos u_int16_t type :5; /* device type */ 5182560Ssos#define ATAPI_TYPE_DIRECT 0 /* disk/floppy */ 5282560Ssos#define ATAPI_TYPE_TAPE 1 /* streaming tape */ 5382560Ssos#define ATAPI_TYPE_CDROM 5 /* CD-ROM device */ 5482560Ssos#define ATAPI_TYPE_OPTICAL 7 /* optical disk */ 5574298Ssos 5684584Ssos u_int16_t :2; 5784584Ssos u_int16_t cmd_protocol :1; /* command protocol */ 5884584Ssos#define ATA_PROTO_ATA 0 5984584Ssos#define ATA_PROTO_ATAPI 1 6074298Ssos 6184584Ssos/*001*/ u_int16_t cylinders; /* # of cylinders */ 6284584Ssos u_int16_t reserved2; 6384584Ssos/*003*/ u_int16_t heads; /* # heads */ 6484584Ssos u_int16_t obsolete4; 6584584Ssos u_int16_t obsolete5; 6684584Ssos/*006*/ u_int16_t sectors; /* # sectors/track */ 6784584Ssos/*007*/ u_int16_t vendor7[3]; 6884584Ssos/*010*/ u_int8_t serial[20]; /* serial number */ 6984584Ssos u_int16_t retired20; 7084584Ssos u_int16_t retired21; 7184584Ssos u_int16_t obsolete22; 7284584Ssos/*023*/ u_int8_t revision[8]; /* firmware revision */ 7384584Ssos/*027*/ u_int8_t model[40]; /* model name */ 7484584Ssos/*047*/ u_int16_t sectors_intr:8; /* sectors per interrupt */ 7584584Ssos u_int16_t :8; 7674298Ssos 7784584Ssos/*048*/ u_int16_t usedmovsd; /* double word read/write? */ 7884584Ssos/*049*/ u_int16_t retired49:8; 7984584Ssos u_int16_t support_dma :1; /* DMA supported */ 8084584Ssos u_int16_t support_lba :1; /* LBA supported */ 8184584Ssos u_int16_t disable_iordy :1; /* IORDY may be disabled */ 8284584Ssos u_int16_t support_iordy :1; /* IORDY supported */ 8384584Ssos u_int16_t softreset :1; /* needs softreset when busy */ 8484584Ssos u_int16_t stdby_ovlap :1; /* standby/overlap supported */ 8584584Ssos u_int16_t support_queueing:1; /* supports queuing overlap */ 8684584Ssos u_int16_t support_idma :1; /* interleaved DMA supported */ 8774298Ssos 8884584Ssos/*050*/ u_int16_t device_stdby_min:1; 8984584Ssos u_int16_t :13; 9084584Ssos u_int16_t capability_one:1; 9184584Ssos u_int16_t capability_zero:1; 9274298Ssos 9384584Ssos/*051*/ u_int16_t vendor51:8; 9484584Ssos u_int16_t retired_piomode:8; /* PIO modes 0-2 */ 9584584Ssos/*052*/ u_int16_t vendor52:8; 9684584Ssos u_int16_t retired_dmamode:8; /* DMA modes, not ATA-3 */ 9784584Ssos/*053*/ u_int16_t atavalid; /* fields valid */ 9882560Ssos#define ATA_FLAG_54_58 1 /* words 54-58 valid */ 9982560Ssos#define ATA_FLAG_64_70 2 /* words 64-70 valid */ 10082560Ssos#define ATA_FLAG_88 4 /* word 88 valid */ 10174298Ssos 10284584Ssos u_int16_t obsolete54[5]; 10384584Ssos/*059*/ u_int16_t multi_count:8; 10484584Ssos u_int16_t multi_valid:1; 10584584Ssos u_int16_t :7; 10674298Ssos 10784584Ssos/*060*/ u_int32_t lba_size; 10884584Ssos u_int16_t obsolete62; 10984584Ssos/*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */ 11084584Ssos/*064*/ u_int16_t apiomodes; /* advanced PIO modes */ 11174298Ssos 11284584Ssos/*065*/ u_int16_t mwdmamin; /* min. M/W DMA time/word ns */ 11384584Ssos/*066*/ u_int16_t mwdmarec; /* rec. M/W DMA time ns */ 11484584Ssos/*067*/ u_int16_t pioblind; /* min. PIO cycle w/o flow */ 11584584Ssos/*068*/ u_int16_t pioiordy; /* min. PIO cycle IORDY flow */ 11684584Ssos u_int16_t reserved69; 11784584Ssos u_int16_t reserved70; 11884584Ssos/*071*/ u_int16_t rlsovlap; /* rel time (us) for overlap */ 11984584Ssos/*072*/ u_int16_t rlsservice; /* rel time (us) for service */ 12084584Ssos u_int16_t reserved73; 12184584Ssos u_int16_t reserved74; 12274298Ssos 12384584Ssos/*075*/ u_int16_t queuelen:5; 12484584Ssos u_int16_t :11; 12584584Ssos 12684584Ssos u_int16_t reserved76; 12784584Ssos u_int16_t reserved77; 12884584Ssos u_int16_t reserved78; 12984584Ssos u_int16_t reserved79; 13084584Ssos/*080*/ u_int16_t version_major; 13184584Ssos/*081*/ u_int16_t version_minor; 13284584Ssos struct { 13384584Ssos/*082/085*/ u_int16_t smart:1; 13484584Ssos u_int16_t security:1; 13584584Ssos u_int16_t removable:1; 13684584Ssos u_int16_t power_mngt:1; 13784584Ssos u_int16_t packet:1; 13884584Ssos u_int16_t write_cache:1; 13984584Ssos u_int16_t look_ahead:1; 14084584Ssos u_int16_t release_irq:1; 14184584Ssos u_int16_t service_irq:1; 14284584Ssos u_int16_t reset:1; 14384584Ssos u_int16_t protected:1; 14484584Ssos u_int16_t :1; 14584584Ssos u_int16_t write_buffer:1; 14684584Ssos u_int16_t read_buffer:1; 14784584Ssos u_int16_t nop:1; 14884584Ssos u_int16_t :1; 14984584Ssos 15084584Ssos/*083/086*/ u_int16_t microcode:1; 15184584Ssos u_int16_t queued:1; 15284584Ssos u_int16_t cfa:1; 15384584Ssos u_int16_t apm:1; 15484584Ssos u_int16_t notify:1; 15584584Ssos u_int16_t standby:1; 15684584Ssos u_int16_t spinup:1; 15784584Ssos u_int16_t :1; 15884584Ssos u_int16_t max_security:1; 15984584Ssos u_int16_t auto_acoustic:1; 16084584Ssos u_int16_t address48:1; 16184584Ssos u_int16_t config_overlay:1; 16284584Ssos u_int16_t flush_cache:1; 16384584Ssos u_int16_t flush_cache48:1; 16484584Ssos u_int16_t support_one:1; 16584584Ssos u_int16_t support_zero:1; 16684584Ssos 16784584Ssos/*084/087*/ u_int16_t smart_error_log:1; 16884584Ssos u_int16_t smart_self_test:1; 16984584Ssos u_int16_t media_serial_no:1; 17084584Ssos u_int16_t media_card_pass:1; 17184584Ssos u_int16_t streaming:1; 17284584Ssos u_int16_t logging:1; 17384584Ssos u_int16_t :8; 17484584Ssos u_int16_t extended_one:1; 17584584Ssos u_int16_t extended_zero:1; 17684584Ssos } support, enabled; 17784584Ssos 17884584Ssos/*088*/ u_int16_t udmamodes; /* UltraDMA modes */ 17984584Ssos/*089*/ u_int16_t erase_time; 18084584Ssos/*090*/ u_int16_t enhanced_erase_time; 18184584Ssos/*091*/ u_int16_t apm_value; 18284584Ssos/*092*/ u_int16_t master_passwd_revision; 18384584Ssos 18484584Ssos/*093*/ u_int16_t hwres_master :8; 18584584Ssos u_int16_t hwres_slave :5; 18684584Ssos u_int16_t hwres_cblid :1; 18784584Ssos u_int16_t hwres_valid:2; 18884584Ssos 18984584Ssos/*094*/ u_int16_t current_acoustic:8; 19084584Ssos u_int16_t vendor_acoustic:8; 19184584Ssos 19284584Ssos/*095*/ u_int16_t stream_min_req_size; 19384584Ssos/*096*/ u_int16_t stream_transfer_time; 19484584Ssos/*097*/ u_int16_t stream_access_latency; 19584584Ssos/*098*/ u_int32_t stream_granularity; 19684584Ssos/*100*/ u_int64_t lba_size48; 19784584Ssos u_int16_t reserved104[23]; 19884584Ssos/*127*/ u_int16_t removable_status; 19984584Ssos/*128*/ u_int16_t security_status; 20084584Ssos u_int16_t reserved129[31]; 20184584Ssos/*160*/ u_int16_t cfa_powermode1; 20284584Ssos u_int16_t reserved161[14]; 20384584Ssos/*176*/ u_int16_t media_serial[30]; 20484584Ssos u_int16_t reserved206[49]; 20584584Ssos/*255*/ u_int16_t integrity; 20674298Ssos}; 20774298Ssos 20882560Ssos#define ATA_MODE_MASK 0x0f 20982560Ssos#define ATA_DMA_MASK 0xf0 21076740Ssos#define ATA_PIO 0x00 21176740Ssos#define ATA_PIO0 0x08 21282560Ssos#define ATA_PIO1 0x09 21382560Ssos#define ATA_PIO2 0x0a 21482560Ssos#define ATA_PIO3 0x0b 21582560Ssos#define ATA_PIO4 0x0c 21682560Ssos#define ATA_DMA 0x10 21782560Ssos#define ATA_WDMA 0x20 21882560Ssos#define ATA_WDMA2 0x22 21982560Ssos#define ATA_UDMA 0x40 22082560Ssos#define ATA_UDMA2 0x42 22182560Ssos#define ATA_UDMA4 0x44 22282560Ssos#define ATA_UDMA5 0x45 22384584Ssos#define ATA_UDMA6 0x46 22474298Ssos 22576740Ssosstruct ata_cmd { 22682560Ssos int channel; 22782560Ssos int device; 22876740Ssos int cmd; 22982560Ssos#define ATAGPARM 1 23082560Ssos#define ATAGMODE 2 23182560Ssos#define ATASMODE 3 23282560Ssos#define ATAREINIT 4 23382560Ssos#define ATAATTACH 5 23482560Ssos#define ATADETACH 6 23582560Ssos#define ATAPICMD 7 23674298Ssos 23776740Ssos union { 23876740Ssos struct { 23976740Ssos int mode[2]; 24076740Ssos } mode; 24183421Sobrien struct { 24276740Ssos int type[2]; 24376740Ssos char name[2][32]; 24476740Ssos struct ata_params params[2]; 24576740Ssos } param; 24682560Ssos struct { 24782560Ssos char ccb[16]; 24882560Ssos caddr_t data; 24982560Ssos int count; 25082560Ssos int flags; 25182560Ssos#define ATAPI_CMD_CTRL 0x00 25282560Ssos#define ATAPI_CMD_READ 0x01 25382560Ssos#define ATAPI_CMD_WRITE 0x02 25482560Ssos 25582560Ssos int timeout; 25682560Ssos int error; 25782560Ssos char sense_data[18]; 25882560Ssos } atapi; 25976740Ssos } u; 26074298Ssos}; 26174298Ssos 26276740Ssos#define IOCATA _IOWR('a', 1, struct ata_cmd) 26374298Ssos 26474298Ssos#endif /* _SYS_ATA_H_ */ 265