ata.h revision 319089
174298Ssos/*- 2230132Suqs * Copyright (c) 2000 - 2008 S��ren Schmidt <sos@FreeBSD.org> 374298Ssos * All rights reserved. 474298Ssos * 574298Ssos * Redistribution and use in source and binary forms, with or without 674298Ssos * modification, are permitted provided that the following conditions 774298Ssos * are met: 874298Ssos * 1. Redistributions of source code must retain the above copyright 974298Ssos * notice, this list of conditions and the following disclaimer, 1074298Ssos * without modification, immediately at the beginning of the file. 1174298Ssos * 2. Redistributions in binary form must reproduce the above copyright 1274298Ssos * notice, this list of conditions and the following disclaimer in the 1374298Ssos * documentation and/or other materials provided with the distribution. 1474298Ssos * 1574298Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1674298Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1774298Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1874298Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1974298Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2074298Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2174298Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2274298Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2374298Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2474298Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2574298Ssos * 2674298Ssos * $FreeBSD: stable/11/sys/sys/ata.h 319089 2017-05-29 05:22:34Z rpokala $ 2774298Ssos */ 2874298Ssos 2974298Ssos#ifndef _SYS_ATA_H_ 3074298Ssos#define _SYS_ATA_H_ 3174298Ssos 3274298Ssos#include <sys/ioccom.h> 3374298Ssos 34119404Ssos/* ATA/ATAPI device parameters */ 3593881Ssosstruct ata_params { 36146266Ssos/*000*/ u_int16_t config; /* configuration info */ 37146266Ssos#define ATA_PROTO_MASK 0x8003 38146266Ssos#define ATA_PROTO_ATAPI 0x8000 39146266Ssos#define ATA_PROTO_ATAPI_12 0x8000 40146266Ssos#define ATA_PROTO_ATAPI_16 0x8001 41174682Sphk#define ATA_PROTO_CFA 0x848a 42146266Ssos#define ATA_ATAPI_TYPE_MASK 0x1f00 43146266Ssos#define ATA_ATAPI_TYPE_DIRECT 0x0000 /* disk/floppy */ 44146266Ssos#define ATA_ATAPI_TYPE_TAPE 0x0100 /* streaming tape */ 45146266Ssos#define ATA_ATAPI_TYPE_CDROM 0x0500 /* CD-ROM device */ 46146266Ssos#define ATA_ATAPI_TYPE_OPTICAL 0x0700 /* optical disk */ 47146266Ssos#define ATA_DRQ_MASK 0x0060 48146266Ssos#define ATA_DRQ_SLOW 0x0000 /* cpu 3 ms delay */ 49146266Ssos#define ATA_DRQ_INTR 0x0020 /* interrupt 10 ms delay */ 50146266Ssos#define ATA_DRQ_FAST 0x0040 /* accel 50 us delay */ 51203421Smav#define ATA_RESP_INCOMPLETE 0x0004 5293881Ssos 53146266Ssos/*001*/ u_int16_t cylinders; /* # of cylinders */ 54204354Smav/*002*/ u_int16_t specconf; /* specific configuration */ 55146266Ssos/*003*/ u_int16_t heads; /* # heads */ 56146266Ssos u_int16_t obsolete4; 57146266Ssos u_int16_t obsolete5; 58146266Ssos/*006*/ u_int16_t sectors; /* # sectors/track */ 59146266Ssos/*007*/ u_int16_t vendor7[3]; 60146266Ssos/*010*/ u_int8_t serial[20]; /* serial number */ 61146266Ssos/*020*/ u_int16_t retired20; 62146266Ssos u_int16_t retired21; 63146266Ssos u_int16_t obsolete22; 64146266Ssos/*023*/ u_int8_t revision[8]; /* firmware revision */ 65146266Ssos/*027*/ u_int8_t model[40]; /* model name */ 66146266Ssos/*047*/ u_int16_t sectors_intr; /* sectors per interrupt */ 67146266Ssos/*048*/ u_int16_t usedmovsd; /* double word read/write? */ 68146266Ssos/*049*/ u_int16_t capabilities1; 69146266Ssos#define ATA_SUPPORT_DMA 0x0100 70146266Ssos#define ATA_SUPPORT_LBA 0x0200 71197540Smav#define ATA_SUPPORT_IORDY 0x0400 72197540Smav#define ATA_SUPPORT_IORDYDIS 0x0800 73146266Ssos#define ATA_SUPPORT_OVERLAP 0x4000 7493881Ssos 75146266Ssos/*050*/ u_int16_t capabilities2; 76146266Ssos/*051*/ u_int16_t retired_piomode; /* PIO modes 0-2 */ 77146266Ssos#define ATA_RETIRED_PIO_MASK 0x0300 7874298Ssos 79146266Ssos/*052*/ u_int16_t retired_dmamode; /* DMA modes */ 80146266Ssos#define ATA_RETIRED_DMA_MASK 0x0003 8174298Ssos 82146266Ssos/*053*/ u_int16_t atavalid; /* fields valid */ 83146266Ssos#define ATA_FLAG_54_58 0x0001 /* words 54-58 valid */ 84146266Ssos#define ATA_FLAG_64_70 0x0002 /* words 64-70 valid */ 85146266Ssos#define ATA_FLAG_88 0x0004 /* word 88 valid */ 8674298Ssos 87146266Ssos/*054*/ u_int16_t current_cylinders; 88146266Ssos/*055*/ u_int16_t current_heads; 89146266Ssos/*056*/ u_int16_t current_sectors; 90146266Ssos/*057*/ u_int16_t current_size_1; 91146266Ssos/*058*/ u_int16_t current_size_2; 92146266Ssos/*059*/ u_int16_t multi; 93146266Ssos#define ATA_MULTI_VALID 0x0100 9493881Ssos 95146266Ssos/*060*/ u_int16_t lba_size_1; 96146266Ssos u_int16_t lba_size_2; 97146266Ssos u_int16_t obsolete62; 98146266Ssos/*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */ 99146266Ssos/*064*/ u_int16_t apiomodes; /* advanced PIO modes */ 10074298Ssos 101146266Ssos/*065*/ u_int16_t mwdmamin; /* min. M/W DMA time/word ns */ 102146266Ssos/*066*/ u_int16_t mwdmarec; /* rec. M/W DMA time ns */ 103146266Ssos/*067*/ u_int16_t pioblind; /* min. PIO cycle w/o flow */ 104146266Ssos/*068*/ u_int16_t pioiordy; /* min. PIO cycle IORDY flow */ 105201139Smav/*069*/ u_int16_t support3; 106201139Smav#define ATA_SUPPORT_RZAT 0x0020 107201139Smav#define ATA_SUPPORT_DRAT 0x4000 108300207Sken#define ATA_SUPPORT_ZONE_MASK 0x0003 109300207Sken#define ATA_SUPPORT_ZONE_NR 0x0000 110300207Sken#define ATA_SUPPORT_ZONE_HOST_AWARE 0x0001 111300207Sken#define ATA_SUPPORT_ZONE_DEV_MANAGED 0x0002 112146266Ssos u_int16_t reserved70; 113146266Ssos/*071*/ u_int16_t rlsovlap; /* rel time (us) for overlap */ 114146266Ssos/*072*/ u_int16_t rlsservice; /* rel time (us) for service */ 115146266Ssos u_int16_t reserved73; 116146266Ssos u_int16_t reserved74; 117146266Ssos/*075*/ u_int16_t queue; 118146266Ssos#define ATA_QUEUE_LEN(x) ((x) & 0x001f) 11974298Ssos 120197540Smav/*76*/ u_int16_t satacapabilities; 121146266Ssos#define ATA_SATA_GEN1 0x0002 122146266Ssos#define ATA_SATA_GEN2 0x0004 123197540Smav#define ATA_SATA_GEN3 0x0008 124146266Ssos#define ATA_SUPPORT_NCQ 0x0100 125146266Ssos#define ATA_SUPPORT_IFPWRMNGTRCV 0x0200 126194902Smav#define ATA_SUPPORT_PHYEVENTCNT 0x0400 127194902Smav#define ATA_SUPPORT_NCQ_UNLOAD 0x0800 128194902Smav#define ATA_SUPPORT_NCQ_PRIO 0x1000 129197540Smav#define ATA_SUPPORT_HAPST 0x2000 130197540Smav#define ATA_SUPPORT_DAPST 0x4000 131197540Smav#define ATA_SUPPORT_READLOGDMAEXT 0x8000 132127021Ssos 133197540Smav/*77*/ u_int16_t satacapabilities2; 134197540Smav#define ATA_SATA_CURR_GEN_MASK 0x0006 135197540Smav#define ATA_SUPPORT_NCQ_STREAM 0x0010 136197540Smav#define ATA_SUPPORT_NCQ_QMANAGEMENT 0x0020 137264853Ssmh#define ATA_SUPPORT_RCVSND_FPDMA_QUEUED 0x0040 138197540Smav/*78*/ u_int16_t satasupport; 139146266Ssos#define ATA_SUPPORT_NONZERO 0x0002 140146266Ssos#define ATA_SUPPORT_AUTOACTIVATE 0x0004 141146266Ssos#define ATA_SUPPORT_IFPWRMNGT 0x0008 142146266Ssos#define ATA_SUPPORT_INORDERDATA 0x0010 143220602Smav#define ATA_SUPPORT_ASYNCNOTIF 0x0020 144197540Smav#define ATA_SUPPORT_SOFTSETPRESERVE 0x0040 145197540Smav/*79*/ u_int16_t sataenabled; 146197540Smav#define ATA_ENABLED_DAPST 0x0080 147127021Ssos 148146266Ssos/*080*/ u_int16_t version_major; 149146266Ssos/*081*/ u_int16_t version_minor; 150119404Ssos 15184584Ssos struct { 152146266Ssos/*082/085*/ u_int16_t command1; 153146266Ssos#define ATA_SUPPORT_SMART 0x0001 154146266Ssos#define ATA_SUPPORT_SECURITY 0x0002 155146266Ssos#define ATA_SUPPORT_REMOVABLE 0x0004 156146266Ssos#define ATA_SUPPORT_POWERMGT 0x0008 157146266Ssos#define ATA_SUPPORT_PACKET 0x0010 158146266Ssos#define ATA_SUPPORT_WRITECACHE 0x0020 159146266Ssos#define ATA_SUPPORT_LOOKAHEAD 0x0040 160146266Ssos#define ATA_SUPPORT_RELEASEIRQ 0x0080 161146266Ssos#define ATA_SUPPORT_SERVICEIRQ 0x0100 162146266Ssos#define ATA_SUPPORT_RESET 0x0200 163146266Ssos#define ATA_SUPPORT_PROTECTED 0x0400 164146266Ssos#define ATA_SUPPORT_WRITEBUFFER 0x1000 165146266Ssos#define ATA_SUPPORT_READBUFFER 0x2000 166146266Ssos#define ATA_SUPPORT_NOP 0x4000 16784584Ssos 168146266Ssos/*083/086*/ u_int16_t command2; 169146266Ssos#define ATA_SUPPORT_MICROCODE 0x0001 170146266Ssos#define ATA_SUPPORT_QUEUED 0x0002 171146266Ssos#define ATA_SUPPORT_CFA 0x0004 172146266Ssos#define ATA_SUPPORT_APM 0x0008 173146266Ssos#define ATA_SUPPORT_NOTIFY 0x0010 174146266Ssos#define ATA_SUPPORT_STANDBY 0x0020 175146266Ssos#define ATA_SUPPORT_SPINUP 0x0040 176146266Ssos#define ATA_SUPPORT_MAXSECURITY 0x0100 177146266Ssos#define ATA_SUPPORT_AUTOACOUSTIC 0x0200 178146266Ssos#define ATA_SUPPORT_ADDRESS48 0x0400 179146266Ssos#define ATA_SUPPORT_OVERLAY 0x0800 180146266Ssos#define ATA_SUPPORT_FLUSHCACHE 0x1000 181146266Ssos#define ATA_SUPPORT_FLUSHCACHE48 0x2000 18284584Ssos 183146266Ssos/*084/087*/ u_int16_t extension; 184197540Smav#define ATA_SUPPORT_SMARTLOG 0x0001 185197540Smav#define ATA_SUPPORT_SMARTTEST 0x0002 186172606Sscottl#define ATA_SUPPORT_MEDIASN 0x0004 187172606Sscottl#define ATA_SUPPORT_MEDIAPASS 0x0008 188172606Sscottl#define ATA_SUPPORT_STREAMING 0x0010 189172606Sscottl#define ATA_SUPPORT_GENLOG 0x0020 190172606Sscottl#define ATA_SUPPORT_WRITEDMAFUAEXT 0x0040 191172606Sscottl#define ATA_SUPPORT_WRITEDMAQFUAEXT 0x0080 192172606Sscottl#define ATA_SUPPORT_64BITWWN 0x0100 193197540Smav#define ATA_SUPPORT_UNLOAD 0x2000 194144330Ssos } __packed support, enabled; 19584584Ssos 196146266Ssos/*088*/ u_int16_t udmamodes; /* UltraDMA modes */ 197249115Ssmh/*089*/ u_int16_t erase_time; /* time req'd in 2min units */ 198249115Ssmh/*090*/ u_int16_t enhanced_erase_time; /* time req'd in 2min units */ 199146266Ssos/*091*/ u_int16_t apm_value; 200249115Ssmh/*092*/ u_int16_t master_passwd_revision; /* password revision code */ 201146266Ssos/*093*/ u_int16_t hwres; 202146266Ssos#define ATA_CABLE_ID 0x2000 20384584Ssos 204146266Ssos/*094*/ u_int16_t acoustic; 205146266Ssos#define ATA_ACOUSTIC_CURRENT(x) ((x) & 0x00ff) 206146266Ssos#define ATA_ACOUSTIC_VENDOR(x) (((x) & 0xff00) >> 8) 20784584Ssos 208146266Ssos/*095*/ u_int16_t stream_min_req_size; 209146266Ssos/*096*/ u_int16_t stream_transfer_time; 210146266Ssos/*097*/ u_int16_t stream_access_latency; 211146266Ssos/*098*/ u_int32_t stream_granularity; 212146266Ssos/*100*/ u_int16_t lba_size48_1; 213146266Ssos u_int16_t lba_size48_2; 214146266Ssos u_int16_t lba_size48_3; 215146266Ssos u_int16_t lba_size48_4; 216201139Smav u_int16_t reserved104; 217201139Smav/*105*/ u_int16_t max_dsm_blocks; 218197540Smav/*106*/ u_int16_t pss; 219197540Smav#define ATA_PSS_LSPPS 0x000F 220198865Smav#define ATA_PSS_LSSABOVE512 0x1000 221198865Smav#define ATA_PSS_MULTLS 0x2000 222262886Smav#define ATA_PSS_VALID_MASK 0xC000 223262886Smav#define ATA_PSS_VALID_VALUE 0x4000 224197540Smav/*107*/ u_int16_t isd; 225197540Smav/*108*/ u_int16_t wwn[4]; 226197540Smav u_int16_t reserved112[5]; 227197540Smav/*117*/ u_int16_t lss_1; 228197540Smav/*118*/ u_int16_t lss_2; 229197540Smav/*119*/ u_int16_t support2; 230197540Smav#define ATA_SUPPORT_WRITEREADVERIFY 0x0002 231197540Smav#define ATA_SUPPORT_WRITEUNCORREXT 0x0004 232197540Smav#define ATA_SUPPORT_RWLOGDMAEXT 0x0008 233197540Smav#define ATA_SUPPORT_MICROCODE3 0x0010 234197540Smav#define ATA_SUPPORT_FREEFALL 0x0020 235300207Sken#define ATA_SUPPORT_SENSE_REPORT 0x0040 236300207Sken#define ATA_SUPPORT_EPC 0x0080 237197540Smav/*120*/ u_int16_t enabled2; 238300207Sken#define ATA_ENABLED_WRITEREADVERIFY 0x0002 239300207Sken#define ATA_ENABLED_WRITEUNCORREXT 0x0004 240300207Sken#define ATA_ENABLED_FREEFALL 0x0020 241300207Sken#define ATA_ENABLED_SENSE_REPORT 0x0040 242300207Sken#define ATA_ENABLED_EPC 0x0080 243197540Smav u_int16_t reserved121[6]; 244146266Ssos/*127*/ u_int16_t removable_status; 245146266Ssos/*128*/ u_int16_t security_status; 246249115Ssmh#define ATA_SECURITY_LEVEL 0x0100 /* 0: high, 1: maximum */ 247249115Ssmh#define ATA_SECURITY_ENH_SUPP 0x0020 /* enhanced erase supported */ 248249115Ssmh#define ATA_SECURITY_COUNT_EXP 0x0010 /* count expired */ 249249115Ssmh#define ATA_SECURITY_FROZEN 0x0008 /* security config is frozen */ 250249115Ssmh#define ATA_SECURITY_LOCKED 0x0004 /* drive is locked */ 251249115Ssmh#define ATA_SECURITY_ENABLED 0x0002 /* ATA Security is enabled */ 252249115Ssmh#define ATA_SECURITY_SUPPORTED 0x0001 /* ATA Security is supported */ 253249115Ssmh 254146266Ssos u_int16_t reserved129[31]; 255146266Ssos/*160*/ u_int16_t cfa_powermode1; 256198587Smav u_int16_t reserved161; 257198587Smav/*162*/ u_int16_t cfa_kms_support; 258198587Smav/*163*/ u_int16_t cfa_trueide_modes; 259198587Smav/*164*/ u_int16_t cfa_memory_modes; 260201139Smav u_int16_t reserved165[4]; 261201139Smav/*169*/ u_int16_t support_dsm; 262201139Smav#define ATA_SUPPORT_DSM_TRIM 0x0001 263201139Smav u_int16_t reserved170[6]; 264197540Smav/*176*/ u_int8_t media_serial[60]; 265197540Smav/*206*/ u_int16_t sct; 266319089Srpokala u_int16_t reserved207[2]; 267198897Smav/*209*/ u_int16_t lsalign; 268197540Smav/*210*/ u_int16_t wrv_sectors_m3_1; 269197540Smav u_int16_t wrv_sectors_m3_2; 270197540Smav/*212*/ u_int16_t wrv_sectors_m2_1; 271197540Smav u_int16_t wrv_sectors_m2_2; 272197540Smav/*214*/ u_int16_t nv_cache_caps; 273197540Smav/*215*/ u_int16_t nv_cache_size_1; 274197540Smav u_int16_t nv_cache_size_2; 275197540Smav/*217*/ u_int16_t media_rotation_rate; 276256956Ssmh#define ATA_RATE_NOT_REPORTED 0x0000 277256956Ssmh#define ATA_RATE_NON_ROTATING 0x0001 278197540Smav u_int16_t reserved218; 279197540Smav/*219*/ u_int16_t nv_cache_opt; 280197540Smav/*220*/ u_int16_t wrv_mode; 281197540Smav u_int16_t reserved221; 282197540Smav/*222*/ u_int16_t transport_major; 283197540Smav/*223*/ u_int16_t transport_minor; 284197540Smav u_int16_t reserved224[31]; 285146266Ssos/*255*/ u_int16_t integrity; 286144330Ssos} __packed; 28774298Ssos 288249931Ssmh/* ATA Dataset Management */ 289249931Ssmh#define ATA_DSM_BLK_SIZE 512 290249931Ssmh#define ATA_DSM_BLK_RANGES 64 291249931Ssmh#define ATA_DSM_RANGE_SIZE 8 292249931Ssmh#define ATA_DSM_RANGE_MAX 65535 293249931Ssmh 294238393Sbrueffer/* 295238393Sbrueffer * ATA Device Register 296238393Sbrueffer * 297238393Sbrueffer * bit 7 Obsolete (was 1 in early ATA specs) 298238393Sbrueffer * bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS 299238393Sbrueffer * bit 5 Obsolete (was 1 in early ATA specs) 300238393Sbrueffer * bit 4 1 = Slave Drive, 0 = Master Drive 301238393Sbrueffer * bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number 302238393Sbrueffer*/ 303146266Ssos 304238393Sbrueffer#define ATA_DEV_MASTER 0x00 305238393Sbrueffer#define ATA_DEV_SLAVE 0x10 306238393Sbrueffer#define ATA_DEV_LBA 0x40 307238393Sbrueffer 308249895Ssmh/* ATA limits */ 309249895Ssmh#define ATA_MAX_28BIT_LBA 268435455UL 310238393Sbrueffer 311249895Ssmh/* ATA Status Register */ 312300207Sken#define ATA_STATUS_ERROR 0x01 313300207Sken#define ATA_STATUS_SENSE_AVAIL 0x02 314300207Sken#define ATA_STATUS_ALIGN_ERR 0x04 315300207Sken#define ATA_STATUS_DATA_REQ 0x08 316300207Sken#define ATA_STATUS_DEF_WRITE_ERR 0x10 317300207Sken#define ATA_STATUS_DEVICE_FAULT 0x20 318300207Sken#define ATA_STATUS_DEVICE_READY 0x40 319300207Sken#define ATA_STATUS_BUSY 0x80 320249895Ssmh 321249895Ssmh/* ATA Error Register */ 322249895Ssmh#define ATA_ERROR_ABORT 0x04 323249895Ssmh#define ATA_ERROR_ID_NOT_FOUND 0x10 324249895Ssmh 325249895Ssmh/* ATA HPA Features */ 326249895Ssmh#define ATA_HPA_FEAT_MAX_ADDR 0x00 327249895Ssmh#define ATA_HPA_FEAT_SET_PWD 0x01 328249895Ssmh#define ATA_HPA_FEAT_LOCK 0x02 329249895Ssmh#define ATA_HPA_FEAT_UNLOCK 0x03 330249895Ssmh#define ATA_HPA_FEAT_FREEZE 0x04 331249895Ssmh 332119404Ssos/* ATA transfer modes */ 333146266Ssos#define ATA_MODE_MASK 0x0f 334146266Ssos#define ATA_DMA_MASK 0xf0 335146266Ssos#define ATA_PIO 0x00 336146266Ssos#define ATA_PIO0 0x08 337146266Ssos#define ATA_PIO1 0x09 338146266Ssos#define ATA_PIO2 0x0a 339146266Ssos#define ATA_PIO3 0x0b 340146266Ssos#define ATA_PIO4 0x0c 341146266Ssos#define ATA_PIO_MAX 0x0f 342146266Ssos#define ATA_DMA 0x10 343146266Ssos#define ATA_WDMA0 0x20 344146266Ssos#define ATA_WDMA1 0x21 345146266Ssos#define ATA_WDMA2 0x22 346146266Ssos#define ATA_UDMA0 0x40 347146266Ssos#define ATA_UDMA1 0x41 348146266Ssos#define ATA_UDMA2 0x42 349146266Ssos#define ATA_UDMA3 0x43 350146266Ssos#define ATA_UDMA4 0x44 351146266Ssos#define ATA_UDMA5 0x45 352146266Ssos#define ATA_UDMA6 0x46 353146266Ssos#define ATA_SA150 0x47 354148991Ssos#define ATA_SA300 0x48 355286448Smav#define ATA_SA600 0x49 356146266Ssos#define ATA_DMA_MAX 0x4f 35774298Ssos 358146266Ssos 359119404Ssos/* ATA commands */ 360146266Ssos#define ATA_NOP 0x00 /* NOP */ 361146266Ssos#define ATA_NF_FLUSHQUEUE 0x00 /* flush queued cmd's */ 362146266Ssos#define ATA_NF_AUTOPOLL 0x01 /* start autopoll function */ 363201139Smav#define ATA_DATA_SET_MANAGEMENT 0x06 364201139Smav#define ATA_DSM_TRIM 0x01 365146266Ssos#define ATA_DEVICE_RESET 0x08 /* reset device */ 366146266Ssos#define ATA_READ 0x20 /* read */ 367146266Ssos#define ATA_READ48 0x24 /* read 48bit LBA */ 368146266Ssos#define ATA_READ_DMA48 0x25 /* read DMA 48bit LBA */ 369146266Ssos#define ATA_READ_DMA_QUEUED48 0x26 /* read DMA QUEUED 48bit LBA */ 370178067Ssos#define ATA_READ_NATIVE_MAX_ADDRESS48 0x27 /* read native max addr 48bit */ 371146266Ssos#define ATA_READ_MUL48 0x29 /* read multi 48bit LBA */ 372200008Smav#define ATA_READ_STREAM_DMA48 0x2a /* read DMA stream 48bit LBA */ 373264853Ssmh#define ATA_READ_LOG_EXT 0x2f /* read log ext - PIO Data-In */ 374200008Smav#define ATA_READ_STREAM48 0x2b /* read stream 48bit LBA */ 375146266Ssos#define ATA_WRITE 0x30 /* write */ 376146266Ssos#define ATA_WRITE48 0x34 /* write 48bit LBA */ 377146266Ssos#define ATA_WRITE_DMA48 0x35 /* write DMA 48bit LBA */ 378146266Ssos#define ATA_WRITE_DMA_QUEUED48 0x36 /* write DMA QUEUED 48bit LBA*/ 379152270Ssos#define ATA_SET_MAX_ADDRESS48 0x37 /* set max address 48bit */ 380146266Ssos#define ATA_WRITE_MUL48 0x39 /* write multi 48bit LBA */ 381200008Smav#define ATA_WRITE_STREAM_DMA48 0x3a 382200008Smav#define ATA_WRITE_STREAM48 0x3b 383200008Smav#define ATA_WRITE_DMA_FUA48 0x3d 384200008Smav#define ATA_WRITE_DMA_QUEUED_FUA48 0x3e 385200008Smav#define ATA_WRITE_LOG_EXT 0x3f 386200008Smav#define ATA_READ_VERIFY 0x40 387200008Smav#define ATA_READ_VERIFY48 0x42 388295276Srpokala#define ATA_WRITE_UNCORRECTABLE48 0x45 /* write uncorrectable 48bit LBA */ 389295276Srpokala#define ATA_WU_PSEUDO 0x55 /* pseudo-uncorrectable error */ 390295276Srpokala#define ATA_WU_FLAGGED 0xaa /* flagged-uncorrectable error */ 391264853Ssmh#define ATA_READ_LOG_DMA_EXT 0x47 /* read log DMA ext - PIO Data-In */ 392300207Sken#define ATA_ZAC_MANAGEMENT_IN 0x4a /* ZAC management in */ 393300207Sken#define ATA_ZM_REPORT_ZONES 0x00 /* report zones */ 394146266Ssos#define ATA_READ_FPDMA_QUEUED 0x60 /* read DMA NCQ */ 395146266Ssos#define ATA_WRITE_FPDMA_QUEUED 0x61 /* write DMA NCQ */ 396270832Simp#define ATA_NCQ_NON_DATA 0x63 /* NCQ non-data command */ 397300207Sken#define ATA_ABORT_NCQ_QUEUE 0x00 /* abort NCQ queue */ 398300207Sken#define ATA_DEADLINE_HANDLING 0x01 /* deadline handling */ 399300207Sken#define ATA_SET_FEATURES 0x05 /* set features */ 400300207Sken#define ATA_ZERO_EXT 0x06 /* zero ext */ 401300207Sken#define ATA_NCQ_ZAC_MGMT_OUT 0x07 /* NCQ ZAC mgmt out no data */ 402264853Ssmh#define ATA_SEND_FPDMA_QUEUED 0x64 /* send DMA NCQ */ 403273445Simp#define ATA_SFPDMA_DSM 0x00 /* Data set management */ 404298981Spfg#define ATA_SFPDMA_DSM_TRIM 0x01 /* Set trim bit in auxiliary */ 405273445Simp#define ATA_SFPDMA_HYBRID_EVICT 0x01 /* Hybrid Evict */ 406273445Simp#define ATA_SFPDMA_WLDMA 0x02 /* Write Log DMA EXT */ 407300207Sken#define ATA_SFPDMA_ZAC_MGMT_OUT 0x03 /* NCQ ZAC mgmt out w/data */ 408300207Sken#define ATA_RECV_FPDMA_QUEUED 0x65 /* receive DMA NCQ */ 409300207Sken#define ATA_RFPDMA_RL_DMA_EXT 0x00 /* Read Log DMA EXT */ 410300207Sken#define ATA_RFPDMA_ZAC_MGMT_IN 0x02 /* NCQ ZAC mgmt in w/data */ 411235897Smav#define ATA_SEP_ATTN 0x67 /* SEP request */ 412146266Ssos#define ATA_SEEK 0x70 /* seek */ 413300207Sken#define ATA_ZAC_MANAGEMENT_OUT 0x9f /* ZAC management out */ 414300207Sken#define ATA_ZM_CLOSE_ZONE 0x01 /* close zone */ 415300207Sken#define ATA_ZM_FINISH_ZONE 0x02 /* finish zone */ 416300207Sken#define ATA_ZM_OPEN_ZONE 0x03 /* open zone */ 417300207Sken#define ATA_ZM_RWP 0x04 /* reset write pointer */ 418146266Ssos#define ATA_PACKET_CMD 0xa0 /* packet command */ 419146266Ssos#define ATA_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/ 420146266Ssos#define ATA_SERVICE 0xa2 /* service command */ 421166287Sremko#define ATA_SMART_CMD 0xb0 /* SMART command */ 422146266Ssos#define ATA_CFA_ERASE 0xc0 /* CFA erase */ 423146266Ssos#define ATA_READ_MUL 0xc4 /* read multi */ 424146266Ssos#define ATA_WRITE_MUL 0xc5 /* write multi */ 425146266Ssos#define ATA_SET_MULTI 0xc6 /* set multi size */ 426146266Ssos#define ATA_READ_DMA_QUEUED 0xc7 /* read DMA QUEUED */ 427146266Ssos#define ATA_READ_DMA 0xc8 /* read DMA */ 428146266Ssos#define ATA_WRITE_DMA 0xca /* write DMA */ 429146266Ssos#define ATA_WRITE_DMA_QUEUED 0xcc /* write DMA QUEUED */ 430200008Smav#define ATA_WRITE_MUL_FUA48 0xce 431146266Ssos#define ATA_STANDBY_IMMEDIATE 0xe0 /* standby immediate */ 432146266Ssos#define ATA_IDLE_IMMEDIATE 0xe1 /* idle immediate */ 433146266Ssos#define ATA_STANDBY_CMD 0xe2 /* standby */ 434146266Ssos#define ATA_IDLE_CMD 0xe3 /* idle */ 435146266Ssos#define ATA_READ_BUFFER 0xe4 /* read buffer */ 436178067Ssos#define ATA_READ_PM 0xe4 /* read portmultiplier */ 437286837Sgrehan#define ATA_CHECK_POWER_MODE 0xe5 /* device power mode */ 438146266Ssos#define ATA_SLEEP 0xe6 /* sleep */ 439146266Ssos#define ATA_FLUSHCACHE 0xe7 /* flush cache to disk */ 440178067Ssos#define ATA_WRITE_PM 0xe8 /* write portmultiplier */ 441146266Ssos#define ATA_FLUSHCACHE48 0xea /* flush cache to disk */ 442146266Ssos#define ATA_ATA_IDENTIFY 0xec /* get ATA params */ 443146266Ssos#define ATA_SETFEATURES 0xef /* features command */ 444146266Ssos#define ATA_SF_ENAB_WCACHE 0x02 /* enable write cache */ 445146266Ssos#define ATA_SF_DIS_WCACHE 0x82 /* disable write cache */ 446300207Sken#define ATA_SF_SETXFER 0x03 /* set transfer mode */ 447300207Sken#define ATA_SF_APM 0x05 /* Enable APM feature set */ 448203421Smav#define ATA_SF_ENAB_PUIS 0x06 /* enable PUIS */ 449203421Smav#define ATA_SF_DIS_PUIS 0x86 /* disable PUIS */ 450203421Smav#define ATA_SF_PUIS_SPINUP 0x07 /* PUIS spin-up */ 451300207Sken#define ATA_SF_WRV 0x0b /* Enable Write-Read-Verify */ 452300207Sken#define ATA_SF_DLC 0x0c /* Enable device life control */ 453300207Sken#define ATA_SF_SATA 0x10 /* Enable use of SATA feature */ 454300207Sken#define ATA_SF_FFC 0x41 /* Free-fall Control */ 455300207Sken#define ATA_SF_MHIST 0x43 /* Set Max Host Sect. Times */ 456300207Sken#define ATA_SF_RATE 0x45 /* Set Rate Basis */ 457300207Sken#define ATA_SF_EPC 0x4A /* Extended Power Conditions */ 458146266Ssos#define ATA_SF_ENAB_RCACHE 0xaa /* enable readahead cache */ 459146266Ssos#define ATA_SF_DIS_RCACHE 0x55 /* disable readahead cache */ 460146266Ssos#define ATA_SF_ENAB_RELIRQ 0x5d /* enable release interrupt */ 461146266Ssos#define ATA_SF_DIS_RELIRQ 0xdd /* disable release interrupt */ 462146266Ssos#define ATA_SF_ENAB_SRVIRQ 0x5e /* enable service interrupt */ 463146266Ssos#define ATA_SF_DIS_SRVIRQ 0xde /* disable service interrupt */ 464300207Sken#define ATA_SF_LPSAERC 0x62 /* Long Phys Sect Align ErrRep*/ 465300207Sken#define ATA_SF_DSN 0x63 /* Device Stats Notification */ 466300207Sken#define ATA_CHECK_POWER_MODE 0xe5 /* Check Power Mode */ 467249115Ssmh#define ATA_SECURITY_SET_PASSWORD 0xf1 /* set drive password */ 468249115Ssmh#define ATA_SECURITY_UNLOCK 0xf2 /* unlock drive using passwd */ 469249115Ssmh#define ATA_SECURITY_ERASE_PREPARE 0xf3 /* prepare to erase drive */ 470249115Ssmh#define ATA_SECURITY_ERASE_UNIT 0xf4 /* erase all blocks on drive */ 471249115Ssmh#define ATA_SECURITY_FREEZE_LOCK 0xf5 /* freeze security config */ 472249115Ssmh#define ATA_SECURITY_DISABLE_PASSWORD 0xf6 /* disable drive password */ 473178067Ssos#define ATA_READ_NATIVE_MAX_ADDRESS 0xf8 /* read native max address */ 474146266Ssos#define ATA_SET_MAX_ADDRESS 0xf9 /* set max address */ 475119404Ssos 476146266Ssos 477119404Ssos/* ATAPI commands */ 478146266Ssos#define ATAPI_TEST_UNIT_READY 0x00 /* check if device is ready */ 479146266Ssos#define ATAPI_REZERO 0x01 /* rewind */ 480146266Ssos#define ATAPI_REQUEST_SENSE 0x03 /* get sense data */ 481146266Ssos#define ATAPI_FORMAT 0x04 /* format unit */ 482146266Ssos#define ATAPI_READ 0x08 /* read data */ 483146266Ssos#define ATAPI_WRITE 0x0a /* write data */ 484146266Ssos#define ATAPI_WEOF 0x10 /* write filemark */ 485146266Ssos#define ATAPI_WF_WRITE 0x01 486146266Ssos#define ATAPI_SPACE 0x11 /* space command */ 487146266Ssos#define ATAPI_SP_FM 0x01 488146266Ssos#define ATAPI_SP_EOD 0x03 489156317Ssos#define ATAPI_INQUIRY 0x12 /* get inquiry data */ 490146266Ssos#define ATAPI_MODE_SELECT 0x15 /* mode select */ 491146266Ssos#define ATAPI_ERASE 0x19 /* erase */ 492146266Ssos#define ATAPI_MODE_SENSE 0x1a /* mode sense */ 493146266Ssos#define ATAPI_START_STOP 0x1b /* start/stop unit */ 494146266Ssos#define ATAPI_SS_LOAD 0x01 495146266Ssos#define ATAPI_SS_RETENSION 0x02 496146266Ssos#define ATAPI_SS_EJECT 0x04 497146266Ssos#define ATAPI_PREVENT_ALLOW 0x1e /* media removal */ 498146266Ssos#define ATAPI_READ_FORMAT_CAPACITIES 0x23 /* get format capacities */ 499146266Ssos#define ATAPI_READ_CAPACITY 0x25 /* get volume capacity */ 500146266Ssos#define ATAPI_READ_BIG 0x28 /* read data */ 501146266Ssos#define ATAPI_WRITE_BIG 0x2a /* write data */ 502146266Ssos#define ATAPI_LOCATE 0x2b /* locate to position */ 503146266Ssos#define ATAPI_READ_POSITION 0x34 /* read position */ 504146266Ssos#define ATAPI_SYNCHRONIZE_CACHE 0x35 /* flush buf, close channel */ 505146266Ssos#define ATAPI_WRITE_BUFFER 0x3b /* write device buffer */ 506146266Ssos#define ATAPI_READ_BUFFER 0x3c /* read device buffer */ 507146266Ssos#define ATAPI_READ_SUBCHANNEL 0x42 /* get subchannel info */ 508146266Ssos#define ATAPI_READ_TOC 0x43 /* get table of contents */ 509146266Ssos#define ATAPI_PLAY_10 0x45 /* play by lba */ 510146266Ssos#define ATAPI_PLAY_MSF 0x47 /* play by MSF address */ 511146266Ssos#define ATAPI_PLAY_TRACK 0x48 /* play by track number */ 512146266Ssos#define ATAPI_PAUSE 0x4b /* pause audio operation */ 513146266Ssos#define ATAPI_READ_DISK_INFO 0x51 /* get disk info structure */ 514146266Ssos#define ATAPI_READ_TRACK_INFO 0x52 /* get track info structure */ 515146266Ssos#define ATAPI_RESERVE_TRACK 0x53 /* reserve track */ 516146266Ssos#define ATAPI_SEND_OPC_INFO 0x54 /* send OPC structurek */ 517146266Ssos#define ATAPI_MODE_SELECT_BIG 0x55 /* set device parameters */ 518146266Ssos#define ATAPI_REPAIR_TRACK 0x58 /* repair track */ 519146266Ssos#define ATAPI_READ_MASTER_CUE 0x59 /* read master CUE info */ 520146266Ssos#define ATAPI_MODE_SENSE_BIG 0x5a /* get device parameters */ 521146266Ssos#define ATAPI_CLOSE_TRACK 0x5b /* close track/session */ 522146266Ssos#define ATAPI_READ_BUFFER_CAPACITY 0x5c /* get buffer capicity */ 523146266Ssos#define ATAPI_SEND_CUE_SHEET 0x5d /* send CUE sheet */ 524156317Ssos#define ATAPI_SERVICE_ACTION_IN 0x96 /* get service data */ 525146266Ssos#define ATAPI_BLANK 0xa1 /* blank the media */ 526146266Ssos#define ATAPI_SEND_KEY 0xa3 /* send DVD key structure */ 527146266Ssos#define ATAPI_REPORT_KEY 0xa4 /* get DVD key structure */ 528146266Ssos#define ATAPI_PLAY_12 0xa5 /* play by lba */ 529146266Ssos#define ATAPI_LOAD_UNLOAD 0xa6 /* changer control command */ 530146266Ssos#define ATAPI_READ_STRUCTURE 0xad /* get DVD structure */ 531146266Ssos#define ATAPI_PLAY_CD 0xb4 /* universal play command */ 532146266Ssos#define ATAPI_SET_SPEED 0xbb /* set drive speed */ 533146266Ssos#define ATAPI_MECH_STATUS 0xbd /* get changer status */ 534146266Ssos#define ATAPI_READ_CD 0xbe /* read data */ 535146266Ssos#define ATAPI_POLL_DSC 0xff /* poll DSC status bit */ 536119404Ssos 53774298Ssos 538146266Ssosstruct ata_ioc_devices { 539146266Ssos int channel; 540146266Ssos char name[2][32]; 541146266Ssos struct ata_params params[2]; 542146266Ssos}; 543119404Ssos 544146266Ssos/* pr channel ATA ioctl calls */ 545146266Ssos#define IOCATAGMAXCHANNEL _IOR('a', 1, int) 546146266Ssos#define IOCATAREINIT _IOW('a', 2, int) 547146266Ssos#define IOCATAATTACH _IOW('a', 3, int) 548146266Ssos#define IOCATADETACH _IOW('a', 4, int) 549146266Ssos#define IOCATADEVICES _IOWR('a', 5, struct ata_ioc_devices) 550119404Ssos 551157329Ssos/* ATAPI request sense structure */ 552157329Ssosstruct atapi_sense { 553157329Ssos u_int8_t error; /* current or deferred errors */ 554157329Ssos#define ATA_SENSE_VALID 0x80 555157329Ssos 556157329Ssos u_int8_t segment; /* segment number */ 557157329Ssos u_int8_t key; /* sense key */ 558157329Ssos#define ATA_SENSE_KEY_MASK 0x0f /* sense key mask */ 559157329Ssos#define ATA_SENSE_NO_SENSE 0x00 /* no specific sense key info */ 560157329Ssos#define ATA_SENSE_RECOVERED_ERROR 0x01 /* command OK, data recovered */ 561157329Ssos#define ATA_SENSE_NOT_READY 0x02 /* no access to drive */ 562157329Ssos#define ATA_SENSE_MEDIUM_ERROR 0x03 /* non-recovered data error */ 563157329Ssos#define ATA_SENSE_HARDWARE_ERROR 0x04 /* non-recoverable HW failure */ 564157329Ssos#define ATA_SENSE_ILLEGAL_REQUEST 0x05 /* invalid command param(s) */ 565157329Ssos#define ATA_SENSE_UNIT_ATTENTION 0x06 /* media changed */ 566157329Ssos#define ATA_SENSE_DATA_PROTECT 0x07 /* write protect */ 567157329Ssos#define ATA_SENSE_BLANK_CHECK 0x08 /* blank check */ 568157329Ssos#define ATA_SENSE_VENDOR_SPECIFIC 0x09 /* vendor specific skey */ 569157329Ssos#define ATA_SENSE_COPY_ABORTED 0x0a /* copy aborted */ 570157329Ssos#define ATA_SENSE_ABORTED_COMMAND 0x0b /* command aborted, try again */ 571157329Ssos#define ATA_SENSE_EQUAL 0x0c /* equal */ 572157329Ssos#define ATA_SENSE_VOLUME_OVERFLOW 0x0d /* volume overflow */ 573157329Ssos#define ATA_SENSE_MISCOMPARE 0x0e /* data dont match the medium */ 574157329Ssos#define ATA_SENSE_RESERVED 0x0f 575157329Ssos#define ATA_SENSE_ILI 0x20; 576157329Ssos#define ATA_SENSE_EOM 0x40; 577157329Ssos#define ATA_SENSE_FILEMARK 0x80; 578157329Ssos 579157329Ssos u_int32_t cmd_info; /* cmd information */ 580157329Ssos u_int8_t sense_length; /* additional sense len (n-7) */ 581157329Ssos u_int32_t cmd_specific_info; /* additional cmd spec info */ 582157329Ssos u_int8_t asc; /* additional sense code */ 583157329Ssos u_int8_t ascq; /* additional sense code qual */ 584157329Ssos u_int8_t replaceable_unit_code; /* replaceable unit code */ 585157329Ssos u_int8_t specific; /* sense key specific */ 586157329Ssos#define ATA_SENSE_SPEC_VALID 0x80 587157329Ssos#define ATA_SENSE_SPEC_MASK 0x7f 588157329Ssos 589157329Ssos u_int8_t specific1; /* sense key specific */ 590157329Ssos u_int8_t specific2; /* sense key specific */ 591157329Ssos} __packed; 592157329Ssos 593300207Sken/* 594300207Sken * SET FEATURES subcommands 595300207Sken */ 596300207Sken 597300207Sken/* 598300207Sken * SET FEATURES command 599300207Sken * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 600300207Sken * These values go in the LBA 3:0. 601300207Sken */ 602300207Sken#define ATA_SF_EPC_RESTORE 0x00 /* Restore Power Condition Settings */ 603300207Sken#define ATA_SF_EPC_GOTO 0x01 /* Go To Power Condition */ 604300207Sken#define ATA_SF_EPC_SET_TIMER 0x02 /* Set Power Condition Timer */ 605300207Sken#define ATA_SF_EPC_SET_STATE 0x03 /* Set Power Condition State */ 606300207Sken#define ATA_SF_EPC_ENABLE 0x04 /* Enable the EPC feature set */ 607300207Sken#define ATA_SF_EPC_DISABLE 0x05 /* Disable the EPC feature set */ 608300207Sken#define ATA_SF_EPC_SET_SOURCE 0x06 /* Set EPC Power Source */ 609300207Sken 610300207Sken/* 611300207Sken * SET FEATURES command 612300207Sken * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 613300207Sken * Power Condition ID field 614300207Sken * These values go in the count register. 615300207Sken */ 616300207Sken#define ATA_EPC_STANDBY_Z 0x00 /* Substate of PM2:Standby */ 617300207Sken#define ATA_EPC_STANDBY_Y 0x01 /* Substate of PM2:Standby */ 618300207Sken#define ATA_EPC_IDLE_A 0x81 /* Substate of PM1:Idle */ 619300207Sken#define ATA_EPC_IDLE_B 0x82 /* Substate of PM1:Idle */ 620300207Sken#define ATA_EPC_IDLE_C 0x83 /* Substate of PM1:Idle */ 621300207Sken#define ATA_EPC_ALL 0xff /* All supported power conditions */ 622300207Sken 623300207Sken/* 624300207Sken * SET FEATURES command 625300207Sken * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 626300207Sken * Restore Power Conditions Settings subcommand 627300207Sken * These values go in the LBA register. 628300207Sken */ 629300207Sken#define ATA_SF_EPC_RST_DFLT 0x40 /* 1=Rst from Default, 0= from Saved */ 630300207Sken#define ATA_SF_EPC_RST_SAVE 0x10 /* 1=Save on completion */ 631300207Sken 632300207Sken/* 633300207Sken * SET FEATURES command 634300207Sken * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 635300207Sken * Got To Power Condition subcommand 636300207Sken * These values go in the LBA register. 637300207Sken */ 638300207Sken#define ATA_SF_EPC_GOTO_DELAY 0x02000000 /* Delayed entry bit */ 639300207Sken#define ATA_SF_EPC_GOTO_HOLD 0x01000000 /* Hold Power Cond bit */ 640300207Sken 641300207Sken/* 642300207Sken * SET FEATURES command 643300207Sken * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 644300207Sken * Set Power Condition Timer subcommand 645300207Sken * These values go in the LBA register. 646300207Sken */ 647300207Sken#define ATA_SF_EPC_TIMER_MASK 0x00ffff00 /* Timer field */ 648300207Sken#define ATA_SF_EPC_TIMER_SHIFT 8 649300207Sken#define ATA_SF_EPC_TIMER_SEC 0x00000080 /* Timer units, 1=sec, 0=.1s */ 650300207Sken#define ATA_SF_EPC_TIMER_EN 0x00000020 /* Enable/disable cond. */ 651300207Sken#define ATA_SF_EPC_TIMER_SAVE 0x00000010 /* Save settings on comp. */ 652300207Sken 653300207Sken/* 654300207Sken * SET FEATURES command 655300207Sken * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 656300207Sken * Set Power Condition State subcommand 657300207Sken * These values go in the LBA register. 658300207Sken */ 659300207Sken#define ATA_SF_EPC_SETCON_EN 0x00000020 /* Enable power cond. */ 660300207Sken#define ATA_SF_EPC_SETCON_SAVE 0x00000010 /* Save settings on comp */ 661300207Sken 662300207Sken/* 663300207Sken * SET FEATURES command 664300207Sken * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 665300207Sken * Set EPC Power Source subcommand 666300207Sken * These values go in the count register. 667300207Sken */ 668300207Sken#define ATA_SF_EPC_SRC_UNKNOWN 0x0000 /* Unknown source */ 669300207Sken#define ATA_SF_EPC_SRC_BAT 0x0001 /* battery source */ 670300207Sken#define ATA_SF_EPC_SRC_NOT_BAT 0x0002 /* not battery source */ 671300207Sken 672300207Sken#define ATA_LOG_DIRECTORY 0x00 /* Directory of all logs */ 673300207Sken#define ATA_POWER_COND_LOG 0x08 /* Power Conditions Log */ 674300207Sken#define ATA_PCL_IDLE 0x00 /* Idle Power Conditions Page */ 675300207Sken#define ATA_PCL_STANDBY 0x01 /* Standby Power Conditions Page */ 676300207Sken#define ATA_IDENTIFY_DATA_LOG 0x30 /* Identify Device Data Log */ 677300207Sken#define ATA_IDL_PAGE_LIST 0x00 /* List of supported pages */ 678300207Sken#define ATA_IDL_IDENTIFY_DATA 0x01 /* Copy of Identify Device data */ 679300207Sken#define ATA_IDL_CAPACITY 0x02 /* Capacity */ 680300207Sken#define ATA_IDL_SUP_CAP 0x03 /* Supported Capabilities */ 681300207Sken#define ATA_IDL_CUR_SETTINGS 0x04 /* Current Settings */ 682300207Sken#define ATA_IDL_ATA_STRINGS 0x05 /* ATA Strings */ 683300207Sken#define ATA_IDL_SECURITY 0x06 /* Security */ 684300207Sken#define ATA_IDL_PARALLEL_ATA 0x07 /* Parallel ATA */ 685300207Sken#define ATA_IDL_SERIAL_ATA 0x08 /* Seiral ATA */ 686300207Sken#define ATA_IDL_ZDI 0x09 /* Zoned Device Information */ 687300207Sken 688300207Skenstruct ata_gp_log_dir { 689300207Sken uint8_t header[2]; 690300207Sken#define ATA_GP_LOG_DIR_VERSION 0x0001 691300207Sken uint8_t num_pages[255*2]; /* Number of log pages at address */ 692300207Sken}; 693300207Sken 694300207Sken/* 695300207Sken * ATA Power Conditions log descriptor 696300207Sken */ 697300207Skenstruct ata_power_cond_log_desc { 698300207Sken uint8_t reserved1; 699300207Sken uint8_t flags; 700300207Sken#define ATA_PCL_COND_SUPPORTED 0x80 701300207Sken#define ATA_PCL_COND_SAVEABLE 0x40 702300207Sken#define ATA_PCL_COND_CHANGEABLE 0x20 703300207Sken#define ATA_PCL_DEFAULT_TIMER_EN 0x10 704300207Sken#define ATA_PCL_SAVED_TIMER_EN 0x08 705300207Sken#define ATA_PCL_CURRENT_TIMER_EN 0x04 706300207Sken#define ATA_PCL_HOLD_PC_NOT_SUP 0x02 707300207Sken uint8_t reserved2[2]; 708300207Sken uint8_t default_timer[4]; 709300207Sken uint8_t saved_timer[4]; 710300207Sken uint8_t current_timer[4]; 711300207Sken uint8_t nom_time_to_active[4]; 712300207Sken uint8_t min_timer[4]; 713300207Sken uint8_t max_timer[4]; 714300207Sken uint8_t num_transitions_to_pc[4]; 715300207Sken uint8_t hours_in_pc[4]; 716300207Sken uint8_t reserved3[28]; 717300207Sken}; 718300207Sken 719300207Sken/* 720300207Sken * ATA Power Conditions Log (0x08), Idle power conditions page (0x00) 721300207Sken */ 722300207Skenstruct ata_power_cond_log_idle { 723300207Sken struct ata_power_cond_log_desc idle_a_desc; 724300207Sken struct ata_power_cond_log_desc idle_b_desc; 725300207Sken struct ata_power_cond_log_desc idle_c_desc; 726300207Sken uint8_t reserved[320]; 727300207Sken}; 728300207Sken 729300207Sken/* 730300207Sken * ATA Power Conditions Log (0x08), Standby power conditions page (0x01) 731300207Sken */ 732300207Skenstruct ata_power_cond_log_standby { 733300207Sken uint8_t reserved[384]; 734300207Sken struct ata_power_cond_log_desc standby_y_desc; 735300207Sken struct ata_power_cond_log_desc standby_z_desc; 736300207Sken}; 737300207Sken 738300207Sken/* 739300207Sken * ATA IDENTIFY DEVICE data log (0x30) page 0x00 740300207Sken * List of Supported IDENTIFY DEVICE data pages. 741300207Sken */ 742300207Skenstruct ata_identify_log_pages { 743300207Sken uint8_t header[8]; 744300207Sken#define ATA_IDLOG_REVISION 0x0000000000000001 745300207Sken uint8_t entry_count; 746300207Sken uint8_t entries[503]; 747300207Sken}; 748300207Sken 749300207Sken/* 750300207Sken * ATA IDENTIFY DEVICE data log (0x30) 751300207Sken * Capacity (Page 0x02). 752300207Sken */ 753300207Skenstruct ata_identify_log_capacity { 754300207Sken uint8_t header[8]; 755300207Sken#define ATA_CAP_HEADER_VALID 0x8000000000000000 756300207Sken#define ATA_CAP_PAGE_NUM_MASK 0x0000000000ff0000 757300207Sken#define ATA_CAP_PAGE_NUM_SHIFT 16 758300207Sken#define ATA_CAP_REV_MASK 0x00000000000000ff 759300207Sken uint8_t capacity[8]; 760300207Sken#define ATA_CAP_CAPACITY_VALID 0x8000000000000000 761300207Sken#define ATA_CAP_ACCESSIBLE_CAP 0x0000ffffffffffff 762300207Sken uint8_t phys_logical_sect_size[8]; 763300207Sken#define ATA_CAP_PL_VALID 0x8000000000000000 764300207Sken#define ATA_CAP_LTOP_REL_SUP 0x4000000000000000 765300207Sken#define ATA_CAP_LOG_SECT_SUP 0x2000000000000000 766300207Sken#define ATA_CAP_ALIGN_ERR_MASK 0x0000000000300000 767300207Sken#define ATA_CAP_LTOP_MASK 0x00000000000f0000 768300207Sken#define ATA_CAP_LOG_SECT_OFF 0x000000000000ffff 769300207Sken uint8_t logical_sect_size[8]; 770300207Sken#define ATA_CAP_LOG_SECT_VALID 0x8000000000000000 771300207Sken#define ATA_CAP_LOG_SECT_SIZE 0x00000000ffffffff 772300207Sken uint8_t nominal_buffer_size[8]; 773300207Sken#define ATA_CAP_NOM_BUF_VALID 0x8000000000000000 774300207Sken#define ATA_CAP_NOM_BUF_SIZE 0x7fffffffffffffff 775300207Sken uint8_t reserved[472]; 776300207Sken}; 777300207Sken 778300207Sken/* 779300207Sken * ATA IDENTIFY DEVICE data log (0x30) 780300207Sken * Supported Capabilities (Page 0x03). 781300207Sken */ 782300207Sken 783300207Skenstruct ata_identify_log_sup_cap { 784300207Sken uint8_t header[8]; 785300207Sken#define ATA_SUP_CAP_HEADER_VALID 0x8000000000000000 786300207Sken#define ATA_SUP_CAP_PAGE_NUM_MASK 0x0000000000ff0000 787300207Sken#define ATA_SUP_CAP_PAGE_NUM_SHIFT 16 788300207Sken#define ATA_SUP_CAP_REV_MASK 0x00000000000000ff 789300207Sken uint8_t sup_cap[8]; 790300207Sken#define ATA_SUP_CAP_VALID 0x8000000000000000 791300207Sken#define ATA_SC_SET_SECT_CONFIG_SUP 0x0002000000000000 /* Set Sect Conf*/ 792300207Sken#define ATA_SC_ZERO_EXT_SUP 0x0001000000000000 /* Zero EXT */ 793300207Sken#define ATA_SC_SUCC_NCQ_SENSE_SUP 0x0000800000000000 /* Succ. NCQ Sns */ 794300207Sken#define ATA_SC_DLC_SUP 0x0000400000000000 /* DLC */ 795300207Sken#define ATA_SC_RQSN_DEV_FAULT_SUP 0x0000200000000000 /* Req Sns Dev Flt*/ 796300207Sken#define ATA_SC_DSN_SUP 0x0000100000000000 /* DSN */ 797300207Sken#define ATA_SC_LP_STANDBY_SUP 0x0000080000000000 /* LP Standby */ 798300207Sken#define ATA_SC_SET_EPC_PS_SUP 0x0000040000000000 /* Set EPC PS */ 799300207Sken#define ATA_SC_AMAX_ADDR_SUP 0x0000020000000000 /* AMAX Addr */ 800300207Sken#define ATA_SC_DRAT_SUP 0x0000008000000000 /* DRAT */ 801300207Sken#define ATA_SC_LPS_MISALGN_SUP 0x0000004000000000 /* LPS Misalign */ 802300207Sken#define ATA_SC_RB_DMA_SUP 0x0000001000000000 /* Read Buf DMA */ 803300207Sken#define ATA_SC_WB_DMA_SUP 0x0000000800000000 /* Write Buf DMA */ 804300207Sken#define ATA_SC_DNLD_MC_DMA_SUP 0x0000000200000000 /* DL MCode DMA */ 805300207Sken#define ATA_SC_28BIT_SUP 0x0000000100000000 /* 28-bit */ 806300207Sken#define ATA_SC_RZAT_SUP 0x0000000080000000 /* RZAT */ 807300207Sken#define ATA_SC_NOP_SUP 0x0000000020000000 /* NOP */ 808300207Sken#define ATA_SC_READ_BUFFER_SUP 0x0000000010000000 /* Read Buffer */ 809300207Sken#define ATA_SC_WRITE_BUFFER_SUP 0x0000000008000000 /* Write Buffer */ 810300207Sken#define ATA_SC_READ_LOOK_AHEAD_SUP 0x0000000002000000 /* Read Look-Ahead*/ 811300207Sken#define ATA_SC_VOLATILE_WC_SUP 0x0000000001000000 /* Volatile WC */ 812300207Sken#define ATA_SC_SMART_SUP 0x0000000000800000 /* SMART */ 813300207Sken#define ATA_SC_FLUSH_CACHE_EXT_SUP 0x0000000000400000 /* Flush Cache Ext */ 814300207Sken#define ATA_SC_48BIT_SUP 0x0000000000100000 /* 48-Bit */ 815300207Sken#define ATA_SC_SPINUP_SUP 0x0000000000040000 /* Spin-Up */ 816300207Sken#define ATA_SC_PUIS_SUP 0x0000000000020000 /* PUIS */ 817300207Sken#define ATA_SC_APM_SUP 0x0000000000010000 /* APM */ 818300207Sken#define ATA_SC_DL_MICROCODE_SUP 0x0000000000004000 /* DL Microcode */ 819300207Sken#define ATA_SC_UNLOAD_SUP 0x0000000000002000 /* Unload */ 820300207Sken#define ATA_SC_WRITE_FUA_EXT_SUP 0x0000000000001000 /* Write FUA EXT */ 821300207Sken#define ATA_SC_GPL_SUP 0x0000000000000800 /* GPL */ 822300207Sken#define ATA_SC_STREAMING_SUP 0x0000000000000400 /* Streaming */ 823300207Sken#define ATA_SC_SMART_SELFTEST_SUP 0x0000000000000100 /* SMART self-test */ 824300207Sken#define ATA_SC_SMART_ERR_LOG_SUP 0x0000000000000080 /* SMART Err Log */ 825300207Sken#define ATA_SC_EPC_SUP 0x0000000000000040 /* EPC */ 826300207Sken#define ATA_SC_SENSE_SUP 0x0000000000000020 /* Sense data */ 827300207Sken#define ATA_SC_FREEFALL_SUP 0x0000000000000010 /* Free-Fall */ 828300207Sken#define ATA_SC_DM_MODE3_SUP 0x0000000000000008 /* DM Mode 3 */ 829300207Sken#define ATA_SC_GPL_DMA_SUP 0x0000000000000004 /* GPL DMA */ 830300207Sken#define ATA_SC_WRITE_UNCOR_SUP 0x0000000000000002 /* Write uncorr. */ 831300207Sken#define ATA_SC_WRV_SUP 0x0000000000000001 /* WRV */ 832300207Sken uint8_t download_code_cap[8]; 833300207Sken#define ATA_DL_CODE_VALID 0x8000000000000000 834300207Sken#define ATA_DLC_DM_OFFSETS_DEFER_SUP 0x0000000400000000 835300207Sken#define ATA_DLC_DM_IMMED_SUP 0x0000000200000000 836300207Sken#define ATA_DLC_DM_OFF_IMMED_SUP 0x0000000100000000 837300207Sken#define ATA_DLC_DM_MAX_XFER_SIZE_MASK 0x00000000ffff0000 838300207Sken#define ATA_DLC_DM_MAX_XFER_SIZE_SHIFT 16 839300207Sken#define ATA_DLC_DM_MIN_XFER_SIZE_MASK 0x000000000000ffff 840300207Sken uint8_t nom_media_rotation_rate[8]; 841300207Sken#define ATA_NOM_MEDIA_ROTATION_VALID 0x8000000000000000 842300207Sken#define ATA_ROTATION_MASK 0x000000000000ffff 843300207Sken uint8_t form_factor[8]; 844300207Sken#define ATA_FORM_FACTOR_VALID 0x8000000000000000 845300207Sken#define ATA_FF_MASK 0x000000000000000f 846300207Sken#define ATA_FF_NOT_REPORTED 0x0000000000000000 /* Not reported */ 847300207Sken#define ATA_FF_525_IN 0x0000000000000001 /* 5.25 inch */ 848300207Sken#define ATA_FF_35_IN 0x0000000000000002 /* 3.5 inch */ 849300207Sken#define ATA_FF_25_IN 0x0000000000000003 /* 2.5 inch */ 850300207Sken#define ATA_FF_18_IN 0x0000000000000004 /* 1.8 inch */ 851300207Sken#define ATA_FF_LT_18_IN 0x0000000000000005 /* < 1.8 inch */ 852300207Sken#define ATA_FF_MSATA 0x0000000000000006 /* mSATA */ 853300207Sken#define ATA_FF_M2 0x0000000000000007 /* M.2 */ 854300207Sken#define ATA_FF_MICROSSD 0x0000000000000008 /* MicroSSD */ 855300207Sken#define ATA_FF_CFAST 0x0000000000000009 /* CFast */ 856300207Sken uint8_t wrv_sec_cnt_mode3[8]; 857300207Sken#define ATA_WRV_MODE3_VALID 0x8000000000000000 858300207Sken#define ATA_WRV_MODE3_COUNT 0x00000000ffffffff 859300207Sken uint8_t wrv_sec_cnt_mode2[8]; 860300207Sken#define ATA_WRV_MODE2_VALID 0x8000000000000000 861300207Sken#define ATA_WRV_MODE2_COUNT 0x00000000ffffffff 862300207Sken uint8_t wwn[16]; 863300207Sken /* XXX KDM need to figure out how to handle 128-bit fields */ 864300207Sken uint8_t dsm[8]; 865300207Sken#define ATA_DSM_VALID 0x8000000000000000 866300207Sken#define ATA_LB_MARKUP_SUP 0x000000000000ff00 867300207Sken#define ATA_TRIM_SUP 0x0000000000000001 868300207Sken uint8_t util_per_unit_time[16]; 869300207Sken /* XXX KDM need to figure out how to handle 128-bit fields */ 870300207Sken uint8_t util_usage_rate_sup[8]; 871300207Sken#define ATA_UTIL_USAGE_RATE_VALID 0x8000000000000000 872300207Sken#define ATA_SETTING_RATE_SUP 0x0000000000800000 873300207Sken#define ATA_SINCE_POWERON_SUP 0x0000000000000100 874300207Sken#define ATA_POH_RATE_SUP 0x0000000000000010 875300207Sken#define ATA_DATE_TIME_RATE_SUP 0x0000000000000001 876300207Sken uint8_t zoned_cap[8]; 877300207Sken#define ATA_ZONED_VALID 0x8000000000000000 878300207Sken#define ATA_ZONED_MASK 0x0000000000000003 879300207Sken uint8_t sup_zac_cap[8]; 880300207Sken#define ATA_SUP_ZAC_CAP_VALID 0x8000000000000000 881300207Sken#define ATA_ND_RWP_SUP 0x0000000000000010 /* Reset Write Ptr*/ 882300207Sken#define ATA_ND_FINISH_ZONE_SUP 0x0000000000000008 /* Finish Zone */ 883300207Sken#define ATA_ND_CLOSE_ZONE_SUP 0x0000000000000004 /* Close Zone */ 884300207Sken#define ATA_ND_OPEN_ZONE_SUP 0x0000000000000002 /* Open Zone */ 885300207Sken#define ATA_REPORT_ZONES_SUP 0x0000000000000001 /* Report Zones */ 886300207Sken uint8_t reserved[392]; 887300207Sken}; 888300207Sken 889300207Sken/* 890300207Sken * ATA Identify Device Data Log Zoned Device Information Page (0x09). 891300207Sken * Current as of ZAC r04a, August 25, 2015. 892300207Sken */ 893300207Skenstruct ata_zoned_info_log { 894300207Sken uint8_t header[8]; 895300207Sken#define ATA_ZDI_HEADER_VALID 0x8000000000000000 896300207Sken#define ATA_ZDI_PAGE_NUM_MASK 0x0000000000ff0000 897300207Sken#define ATA_ZDI_PAGE_NUM_SHIFT 16 898300207Sken#define ATA_ZDI_REV_MASK 0x00000000000000ff 899300207Sken uint8_t zoned_cap[8]; 900300207Sken#define ATA_ZDI_CAP_VALID 0x8000000000000000 901300207Sken#define ATA_ZDI_CAP_URSWRZ 0x0000000000000001 902300207Sken uint8_t zoned_settings[8]; 903300207Sken#define ATA_ZDI_SETTINGS_VALID 0x8000000000000000 904300207Sken uint8_t optimal_seq_zones[8]; 905300207Sken#define ATA_ZDI_OPT_SEQ_VALID 0x8000000000000000 906300207Sken#define ATA_ZDI_OPT_SEQ_MASK 0x00000000ffffffff 907300207Sken uint8_t optimal_nonseq_zones[8]; 908300207Sken#define ATA_ZDI_OPT_NS_VALID 0x8000000000000000 909300207Sken#define ATA_ZDI_OPT_NS_MASK 0x00000000ffffffff 910300207Sken uint8_t max_seq_req_zones[8]; 911300207Sken#define ATA_ZDI_MAX_SEQ_VALID 0x8000000000000000 912300207Sken#define ATA_ZDI_MAX_SEQ_MASK 0x00000000ffffffff 913300207Sken uint8_t version_info[8]; 914300207Sken#define ATA_ZDI_VER_VALID 0x8000000000000000 915300207Sken#define ATA_ZDI_VER_ZAC_SUP 0x0100000000000000 916300207Sken#define ATA_ZDI_VER_ZAC_MASK 0x00000000000000ff 917300207Sken uint8_t reserved[456]; 918300207Sken}; 919300207Sken 920146266Ssosstruct ata_ioc_request { 921146266Ssos union { 922119404Ssos struct { 923146266Ssos u_int8_t command; 924146266Ssos u_int8_t feature; 925146266Ssos u_int64_t lba; 926146266Ssos u_int16_t count; 927146266Ssos } ata; 928119404Ssos struct { 929146266Ssos char ccb[16]; 930157329Ssos struct atapi_sense sense; 931146266Ssos } atapi; 932146266Ssos } u; 933146266Ssos caddr_t data; 934146266Ssos int count; 935146266Ssos int flags; 936146266Ssos#define ATA_CMD_CONTROL 0x01 937146266Ssos#define ATA_CMD_READ 0x02 938146266Ssos#define ATA_CMD_WRITE 0x04 939146266Ssos#define ATA_CMD_ATAPI 0x08 940119404Ssos 941146266Ssos int timeout; 942146266Ssos int error; 943146266Ssos}; 944119404Ssos 945249115Ssmhstruct ata_security_password { 946249115Ssmh u_int16_t ctrl; 947249115Ssmh#define ATA_SECURITY_PASSWORD_USER 0x0000 948249115Ssmh#define ATA_SECURITY_PASSWORD_MASTER 0x0001 949249115Ssmh#define ATA_SECURITY_ERASE_NORMAL 0x0000 950249115Ssmh#define ATA_SECURITY_ERASE_ENHANCED 0x0002 951249115Ssmh#define ATA_SECURITY_LEVEL_HIGH 0x0000 952249115Ssmh#define ATA_SECURITY_LEVEL_MAXIMUM 0x0100 953249115Ssmh 954249115Ssmh u_int8_t password[32]; 955249115Ssmh u_int16_t revision; 956249115Ssmh u_int16_t reserved[238]; 957249115Ssmh}; 958249115Ssmh 959146266Ssos/* pr device ATA ioctl calls */ 960146266Ssos#define IOCATAREQUEST _IOWR('a', 100, struct ata_ioc_request) 961146266Ssos#define IOCATAGPARM _IOR('a', 101, struct ata_params) 962146266Ssos#define IOCATAGMODE _IOR('a', 102, int) 963146266Ssos#define IOCATASMODE _IOW('a', 103, int) 96493662Ssos 965177298Sphk#define IOCATAGSPINDOWN _IOR('a', 104, int) 966177298Sphk#define IOCATASSPINDOWN _IOW('a', 105, int) 967119404Ssos 968177298Sphk 969146266Ssosstruct ata_ioc_raid_config { 970146266Ssos int lun; 971146266Ssos int type; 972146266Ssos#define AR_JBOD 0x0001 973146266Ssos#define AR_SPAN 0x0002 974146266Ssos#define AR_RAID0 0x0004 975146266Ssos#define AR_RAID1 0x0008 976146266Ssos#define AR_RAID01 0x0010 977146266Ssos#define AR_RAID3 0x0020 978146266Ssos#define AR_RAID4 0x0040 979146266Ssos#define AR_RAID5 0x0080 98093662Ssos 981146266Ssos int interleave; 982146266Ssos int status; 983146266Ssos#define AR_READY 1 984146266Ssos#define AR_DEGRADED 2 985146266Ssos#define AR_REBUILDING 4 986119404Ssos 987146266Ssos int progress; 988146266Ssos int total_disks; 989146266Ssos int disks[16]; 99074298Ssos}; 99174298Ssos 992171819Sjhbstruct ata_ioc_raid_status { 993171819Sjhb int lun; 994171819Sjhb int type; 995171819Sjhb int interleave; 996171819Sjhb int status; 997171819Sjhb int progress; 998171819Sjhb int total_disks; 999171819Sjhb struct { 1000171819Sjhb int state; 1001171819Sjhb#define AR_DISK_ONLINE 0x01 1002171819Sjhb#define AR_DISK_PRESENT 0x02 1003171819Sjhb#define AR_DISK_SPARE 0x04 1004171819Sjhb int lun; 1005171819Sjhb } disks[16]; 1006171819Sjhb}; 1007171819Sjhb 1008146266Ssos/* ATA RAID ioctl calls */ 1009148737Ssos#define IOCATARAIDCREATE _IOWR('a', 200, struct ata_ioc_raid_config) 1010146266Ssos#define IOCATARAIDDELETE _IOW('a', 201, int) 1011171819Sjhb#define IOCATARAIDSTATUS _IOWR('a', 202, struct ata_ioc_raid_status) 1012146266Ssos#define IOCATARAIDADDSPARE _IOW('a', 203, struct ata_ioc_raid_config) 1013146266Ssos#define IOCATARAIDREBUILD _IOW('a', 204, int) 101474298Ssos 101574298Ssos#endif /* _SYS_ATA_H_ */ 1016