mp_locore.S revision 91783
189051Sjake/*-
289051Sjake * Copyright (c) 2002 Jake Burkholder.
389051Sjake * All rights reserved.
489051Sjake *
589051Sjake * Redistribution and use in source and binary forms, with or without
689051Sjake * modification, are permitted provided that the following conditions
789051Sjake * are met:
889051Sjake * 1. Redistributions of source code must retain the above copyright
989051Sjake *    notice, this list of conditions and the following disclaimer.
1089051Sjake * 2. Redistributions in binary form must reproduce the above copyright
1189051Sjake *    notice, this list of conditions and the following disclaimer in the
1289051Sjake *    documentation and/or other materials provided with the distribution.
1389051Sjake *
1489051Sjake * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1589051Sjake * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1689051Sjake * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1789051Sjake * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1889051Sjake * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1989051Sjake * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2089051Sjake * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2189051Sjake * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2289051Sjake * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2389051Sjake * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2489051Sjake * SUCH DAMAGE.
2589051Sjake *
2689051Sjake * $FreeBSD: head/sys/sparc64/sparc64/mp_locore.S 91783 2002-03-07 06:01:40Z jake $
2789051Sjake */
2889051Sjake
2989051Sjake#include <machine/asi.h>
3089051Sjake#include <machine/asmacros.h>
3189051Sjake#include <machine/ktr.h>
3289051Sjake#include <machine/pstate.h>
3391617Sjake#include <machine/upa.h>
3489051Sjake
3589051Sjake#include "assym.s"
3689051Sjake
3789051Sjake	.register	%g2, #ignore
3889051Sjake	.register	%g3, #ignore
3989051Sjake
4091617Sjake	.text
4191617Sjake	.align	16
4291617Sjake1:	rd	%pc, %l0
4391617Sjake	ldx	[%l0 + (4f-1b)], %l1
4491617Sjake	add	%l0, (6f-1b), %l2
4591617Sjake	clr	%l3
4691617Sjake2:	cmp	%l3, %l1
4791617Sjake	be	%xcc, 3f
4891617Sjake	 nop
4991617Sjake	ldx	[%l2 + TTE_VPN], %l4
5091617Sjake	ldx	[%l2 + TTE_DATA], %l5
5191617Sjake	sllx	%l4, PAGE_SHIFT, %l4
5291617Sjake	wr	%g0, ASI_DMMU, %asi
5391617Sjake	stxa	%l4, [%g0 + AA_DMMU_TAR] %asi
5491617Sjake	stxa	%l5, [%g0] ASI_DTLB_DATA_IN_REG
5591617Sjake	wr	%g0, ASI_IMMU, %asi
5691617Sjake	stxa	%l4, [%g0 + AA_IMMU_TAR] %asi
5791617Sjake	stxa	%l5, [%g0] ASI_ITLB_DATA_IN_REG
5891617Sjake	membar	#Sync
5991617Sjake	flush	%l4
6091617Sjake	add	%l2, 1 << TTE_SHIFT, %l2
6191617Sjake	add	%l3, 1, %l3
6291617Sjake	ba	%xcc, 2b
6391617Sjake	 nop
6491617Sjake3:	ldx	[%l0 + (5f-1b)], %l1
6591617Sjake	jmpl	%l1, %g0
6691617Sjake	 nop
6791617Sjake	.align	16
6891617Sjake4:	.xword	0x0
6991617Sjake5:	.xword	0x0
7091617Sjake6:
7191617Sjake
7291617SjakeDATA(mp_tramp_code)
7391617Sjake	.xword	1b
7491617SjakeDATA(mp_tramp_code_len)
7591617Sjake	.xword	6b-1b
7691617SjakeDATA(mp_tramp_tlb_slots)
7791617Sjake	.xword	4b-1b
7891617SjakeDATA(mp_tramp_func)
7991617Sjake	.xword	5b-1b
8091617Sjake
8189051Sjake/*
8291617Sjake * void mp_startup(void)
8389051Sjake */
8491617SjakeENTRY(mp_startup)
8591617Sjake	wrpr	%g0, PSTATE_NORMAL, %pstate
8691617Sjake	wrpr	%g0, 0, %cleanwin
8791617Sjake	wrpr	%g0, 0, %pil
8891617Sjake	wr	%g0, 0, %fprs
8989051Sjake
9091617Sjake	SET(cpu_start_args, %l1, %l0)
9191617Sjake
9291617Sjake	mov	CPU_CLKSYNC, %l1
9389051Sjake	membar	#StoreLoad
9491617Sjake	stw	%l1, [%l0 + CSA_STATE]
9589051Sjake
9691617Sjake1:	ldx	[%l0 + CSA_TICK], %l1
9791617Sjake	brz	%l1, 1b
9891617Sjake	 nop
9991617Sjake	wrpr	%l1, 0, %tick
10091617Sjake
10191617Sjake	UPA_GET_MID(%o0)
10291617Sjake
10389051Sjake#if KTR_COMPILE & KTR_SMP
10491617Sjake	CATR(KTR_SMP, "mp_start: cpu %d entered kernel"
10589051Sjake	    , %g1, %g2, %g3, 7, 8, 9)
10691617Sjake	stx	%o0, [%g1 + KTR_PARM1]
10789051Sjake9:
10889051Sjake#endif
10989051Sjake
11091617Sjake	rdpr	%ver, %l1
11191617Sjake	stx	%l1, [%l0 + CSA_VER]
11289051Sjake
11389051Sjake	/*
11491617Sjake	 * Inform the boot processor we have inited.
11589051Sjake	 */
11691617Sjake	mov	CPU_INIT, %l1
11791617Sjake	membar	#LoadStore
11891617Sjake	stw	%l1, [%l0 + CSA_STATE]
11991617Sjake
12091617Sjake	/*
12191617Sjake	 * Wait till its our turn to bootstrap.
12291617Sjake	 */
12391783Sjake2:	lduw	[%l0 + CSA_MID], %l1
12491617Sjake	cmp	%l1, %o0
12591783Sjake	bne	%xcc, 2b
12689051Sjake	 nop
12789051Sjake
12889051Sjake#if KTR_COMPILE & KTR_SMP
12989051Sjake	CATR(KTR_SMP, "_mp_start: cpu %d got start signal"
13089051Sjake	    , %g1, %g2, %g3, 7, 8, 9)
13191617Sjake	stx	%o0, [%g1 + KTR_PARM1]
13289051Sjake9:
13389051Sjake#endif
13489051Sjake
13591783Sjake	add	%l0, CSA_TTES, %l1
13691783Sjake	clr	%l2
13791783Sjake
13889051Sjake	/*
13991783Sjake	 * Map the per-cpu pages.
14089051Sjake	 */
14191783Sjake3:	sllx	%l2, TTE_SHIFT, %l3
14291783Sjake	add	%l1, %l3, %l3
14389051Sjake
14491783Sjake	ldx	[%l3 + TTE_VPN], %l4
14591783Sjake	ldx	[%l3 + TTE_DATA], %l5
14691783Sjake
14789051Sjake	wr	%g0, ASI_DMMU, %asi
14891783Sjake	sllx	%l4, PAGE_SHIFT, %l4
14991783Sjake	stxa	%l4, [%g0 + AA_DMMU_TAR] %asi
15091783Sjake	stxa	%l5, [%g0] ASI_DTLB_DATA_IN_REG
15189051Sjake	membar	#Sync
15289051Sjake
15391783Sjake	add	%l2, 1, %l2
15491783Sjake	cmp	%l2, PCPU_PAGES
15591783Sjake	bne	%xcc, 3b
15691783Sjake	 nop
15791783Sjake
15889051Sjake	/*
15989051Sjake	 * Get onto our per-cpu panic stack, which precedes the struct pcpu
16089051Sjake	 * in the per-cpu page.
16189051Sjake	 */
16291783Sjake	ldx	[%l0 + CSA_PCPU], %l1
16391617Sjake	set	PCPU_PAGES * PAGE_SIZE - PC_SIZEOF, %l2
16491617Sjake	add	%l1, %l2, %l1
16591617Sjake	sub	%l1, SPOFF + CCFSZ, %sp
16689051Sjake
16789051Sjake	/*
16889051Sjake	 * Enable interrupts.
16989051Sjake	 */
17089051Sjake	wrpr	%g0, PSTATE_KERNEL, %pstate
17189051Sjake
17289051Sjake#if KTR_COMPILE & KTR_SMP
17389051Sjake	CATR(KTR_SMP,
17489051Sjake	    "_mp_start: bootstrap cpuid=%d mid=%d pcpu=%#lx data=%#lx sp=%#lx"
17589051Sjake	    , %g1, %g2, %g3, 7, 8, 9)
17691783Sjake	lduw	[%l1 + PC_CPUID], %g2
17789051Sjake	stx	%g2, [%g1 + KTR_PARM1]
17891783Sjake	lduw	[%l1 + PC_MID], %g2
17989051Sjake	stx	%g2, [%g1 + KTR_PARM2]
18091783Sjake	stx	%l1, [%g1 + KTR_PARM3]
18189051Sjake	stx	%sp, [%g1 + KTR_PARM5]
18289051Sjake9:
18389051Sjake#endif
18489051Sjake
18589051Sjake	/*
18689051Sjake	 * And away we go.  This doesn't return.
18789051Sjake	 */
18889051Sjake	call	cpu_mp_bootstrap
18991617Sjake	 mov	%l1, %o0
19089051Sjake	sir
19189051Sjake	! NOTREACHED
19291617SjakeEND(mp_startup)
193