mp_locore.S revision 166105
189051Sjake/*-
289051Sjake * Copyright (c) 2002 Jake Burkholder.
389051Sjake * All rights reserved.
489051Sjake *
589051Sjake * Redistribution and use in source and binary forms, with or without
689051Sjake * modification, are permitted provided that the following conditions
789051Sjake * are met:
889051Sjake * 1. Redistributions of source code must retain the above copyright
989051Sjake *    notice, this list of conditions and the following disclaimer.
1089051Sjake * 2. Redistributions in binary form must reproduce the above copyright
1189051Sjake *    notice, this list of conditions and the following disclaimer in the
1289051Sjake *    documentation and/or other materials provided with the distribution.
1389051Sjake *
1489051Sjake * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1589051Sjake * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1689051Sjake * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1789051Sjake * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1889051Sjake * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1989051Sjake * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2089051Sjake * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2189051Sjake * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2289051Sjake * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2389051Sjake * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2489051Sjake * SUCH DAMAGE.
2589051Sjake */
2689051Sjake
27114188Sjake#include <machine/asm.h>
28114188Sjake__FBSDID("$FreeBSD: head/sys/sparc64/sparc64/mp_locore.S 166105 2007-01-19 11:15:34Z marius $");
29114188Sjake
3089051Sjake#include <machine/asi.h>
3189051Sjake#include <machine/asmacros.h>
3289051Sjake#include <machine/ktr.h>
3389051Sjake#include <machine/pstate.h>
34166105Smarius#include <machine/smp.h>
3591617Sjake#include <machine/upa.h>
3689051Sjake
3789051Sjake#include "assym.s"
3889051Sjake
3989051Sjake	.register	%g2, #ignore
4089051Sjake	.register	%g3, #ignore
4189051Sjake
4291617Sjake	.text
43100899Sjake	_ALIGN_TEXT
4491617Sjake1:	rd	%pc, %l0
4591617Sjake	ldx	[%l0 + (4f-1b)], %l1
4691617Sjake	add	%l0, (6f-1b), %l2
4791617Sjake	clr	%l3
4891617Sjake2:	cmp	%l3, %l1
4991617Sjake	be	%xcc, 3f
5091617Sjake	 nop
5191617Sjake	ldx	[%l2 + TTE_VPN], %l4
5291617Sjake	ldx	[%l2 + TTE_DATA], %l5
53102040Sjake	srlx	%l4, TV_SIZE_BITS, %l4
54102040Sjake	sllx	%l4, PAGE_SHIFT_4M, %l4
5591617Sjake	wr	%g0, ASI_DMMU, %asi
5691617Sjake	stxa	%l4, [%g0 + AA_DMMU_TAR] %asi
5791617Sjake	stxa	%l5, [%g0] ASI_DTLB_DATA_IN_REG
5891617Sjake	wr	%g0, ASI_IMMU, %asi
5991617Sjake	stxa	%l4, [%g0 + AA_IMMU_TAR] %asi
6091617Sjake	stxa	%l5, [%g0] ASI_ITLB_DATA_IN_REG
6191617Sjake	membar	#Sync
6291617Sjake	flush	%l4
6391617Sjake	add	%l2, 1 << TTE_SHIFT, %l2
6491617Sjake	add	%l3, 1, %l3
6591617Sjake	ba	%xcc, 2b
6691617Sjake	 nop
6791617Sjake3:	ldx	[%l0 + (5f-1b)], %l1
6891617Sjake	jmpl	%l1, %g0
6991617Sjake	 nop
70100899Sjake	_ALIGN_DATA
7191617Sjake4:	.xword	0x0
7291617Sjake5:	.xword	0x0
7391617Sjake6:
7491617Sjake
7591617SjakeDATA(mp_tramp_code)
7691617Sjake	.xword	1b
7791617SjakeDATA(mp_tramp_code_len)
7891617Sjake	.xword	6b-1b
7991617SjakeDATA(mp_tramp_tlb_slots)
8091617Sjake	.xword	4b-1b
8191617SjakeDATA(mp_tramp_func)
8291617Sjake	.xword	5b-1b
8391617Sjake
8489051Sjake/*
8591617Sjake * void mp_startup(void)
8689051Sjake */
8791617SjakeENTRY(mp_startup)
8891617Sjake	wrpr	%g0, PSTATE_NORMAL, %pstate
8991617Sjake	wrpr	%g0, 0, %cleanwin
9091617Sjake	wrpr	%g0, 0, %pil
9191617Sjake	wr	%g0, 0, %fprs
9289051Sjake
9391617Sjake	SET(cpu_start_args, %l1, %l0)
9491617Sjake
9591617Sjake	mov	CPU_CLKSYNC, %l1
9689051Sjake	membar	#StoreLoad
9791617Sjake	stw	%l1, [%l0 + CSA_STATE]
9889051Sjake
9991617Sjake1:	ldx	[%l0 + CSA_TICK], %l1
10091617Sjake	brz	%l1, 1b
10191617Sjake	 nop
10291617Sjake	wrpr	%l1, 0, %tick
10391617Sjake
10491617Sjake	UPA_GET_MID(%o0)
10591617Sjake
10689051Sjake#if KTR_COMPILE & KTR_SMP
10791617Sjake	CATR(KTR_SMP, "mp_start: cpu %d entered kernel"
10889051Sjake	    , %g1, %g2, %g3, 7, 8, 9)
10991617Sjake	stx	%o0, [%g1 + KTR_PARM1]
11089051Sjake9:
11189051Sjake#endif
11289051Sjake
11391617Sjake	rdpr	%ver, %l1
11491617Sjake	stx	%l1, [%l0 + CSA_VER]
11589051Sjake
11689051Sjake	/*
11791617Sjake	 * Inform the boot processor we have inited.
11889051Sjake	 */
11991617Sjake	mov	CPU_INIT, %l1
12091617Sjake	membar	#LoadStore
12191617Sjake	stw	%l1, [%l0 + CSA_STATE]
12291617Sjake
12391617Sjake	/*
12491617Sjake	 * Wait till its our turn to bootstrap.
12591617Sjake	 */
12691783Sjake2:	lduw	[%l0 + CSA_MID], %l1
12791617Sjake	cmp	%l1, %o0
12891783Sjake	bne	%xcc, 2b
12989051Sjake	 nop
13089051Sjake
13189051Sjake#if KTR_COMPILE & KTR_SMP
13289051Sjake	CATR(KTR_SMP, "_mp_start: cpu %d got start signal"
13389051Sjake	    , %g1, %g2, %g3, 7, 8, 9)
13491617Sjake	stx	%o0, [%g1 + KTR_PARM1]
13589051Sjake9:
13689051Sjake#endif
13789051Sjake
13891783Sjake	add	%l0, CSA_TTES, %l1
13991783Sjake	clr	%l2
14091783Sjake
14189051Sjake	/*
14291783Sjake	 * Map the per-cpu pages.
14389051Sjake	 */
14491783Sjake3:	sllx	%l2, TTE_SHIFT, %l3
14591783Sjake	add	%l1, %l3, %l3
14689051Sjake
14791783Sjake	ldx	[%l3 + TTE_VPN], %l4
14891783Sjake	ldx	[%l3 + TTE_DATA], %l5
14991783Sjake
15089051Sjake	wr	%g0, ASI_DMMU, %asi
151102040Sjake	srlx	%l4, TV_SIZE_BITS, %l4
152102040Sjake	sllx	%l4, PAGE_SHIFT_8K, %l4
15391783Sjake	stxa	%l4, [%g0 + AA_DMMU_TAR] %asi
15491783Sjake	stxa	%l5, [%g0] ASI_DTLB_DATA_IN_REG
15589051Sjake	membar	#Sync
15689051Sjake
15791783Sjake	add	%l2, 1, %l2
15891783Sjake	cmp	%l2, PCPU_PAGES
15991783Sjake	bne	%xcc, 3b
16091783Sjake	 nop
16191783Sjake
16289051Sjake	/*
16389051Sjake	 * Get onto our per-cpu panic stack, which precedes the struct pcpu
16489051Sjake	 * in the per-cpu page.
16589051Sjake	 */
16691783Sjake	ldx	[%l0 + CSA_PCPU], %l1
16791617Sjake	set	PCPU_PAGES * PAGE_SIZE - PC_SIZEOF, %l2
16891617Sjake	add	%l1, %l2, %l1
16991617Sjake	sub	%l1, SPOFF + CCFSZ, %sp
17089051Sjake
17189051Sjake	/*
17289051Sjake	 * Enable interrupts.
17389051Sjake	 */
17489051Sjake	wrpr	%g0, PSTATE_KERNEL, %pstate
17589051Sjake
17689051Sjake#if KTR_COMPILE & KTR_SMP
17789051Sjake	CATR(KTR_SMP,
17889051Sjake	    "_mp_start: bootstrap cpuid=%d mid=%d pcpu=%#lx data=%#lx sp=%#lx"
17989051Sjake	    , %g1, %g2, %g3, 7, 8, 9)
18091783Sjake	lduw	[%l1 + PC_CPUID], %g2
18189051Sjake	stx	%g2, [%g1 + KTR_PARM1]
18291783Sjake	lduw	[%l1 + PC_MID], %g2
18389051Sjake	stx	%g2, [%g1 + KTR_PARM2]
18491783Sjake	stx	%l1, [%g1 + KTR_PARM3]
18589051Sjake	stx	%sp, [%g1 + KTR_PARM5]
18689051Sjake9:
18789051Sjake#endif
18889051Sjake
18989051Sjake	/*
19089051Sjake	 * And away we go.  This doesn't return.
19189051Sjake	 */
19289051Sjake	call	cpu_mp_bootstrap
19391617Sjake	 mov	%l1, %o0
19489051Sjake	sir
19589051Sjake	! NOTREACHED
19691617SjakeEND(mp_startup)
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