mp_locore.S revision 114188 
1/*-
2 * Copyright (c) 2002 Jake Burkholder.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <machine/asm.h>
28__FBSDID("$FreeBSD: head/sys/sparc64/sparc64/mp_locore.S 114188 2003-04-29 00:37:41Z jake $");
29
30#include <machine/asi.h>
31#include <machine/asmacros.h>
32#include <machine/ktr.h>
33#include <machine/pstate.h>
34#include <machine/upa.h>
35
36#include "assym.s"
37
38	.register	%g2, #ignore
39	.register	%g3, #ignore
40
41	.text
42	_ALIGN_TEXT
431:	rd	%pc, %l0
44	ldx	[%l0 + (4f-1b)], %l1
45	add	%l0, (6f-1b), %l2
46	clr	%l3
472:	cmp	%l3, %l1
48	be	%xcc, 3f
49	 nop
50	ldx	[%l2 + TTE_VPN], %l4
51	ldx	[%l2 + TTE_DATA], %l5
52	srlx	%l4, TV_SIZE_BITS, %l4
53	sllx	%l4, PAGE_SHIFT_4M, %l4
54	wr	%g0, ASI_DMMU, %asi
55	stxa	%l4, [%g0 + AA_DMMU_TAR] %asi
56	stxa	%l5, [%g0] ASI_DTLB_DATA_IN_REG
57	wr	%g0, ASI_IMMU, %asi
58	stxa	%l4, [%g0 + AA_IMMU_TAR] %asi
59	stxa	%l5, [%g0] ASI_ITLB_DATA_IN_REG
60	membar	#Sync
61	flush	%l4
62	add	%l2, 1 << TTE_SHIFT, %l2
63	add	%l3, 1, %l3
64	ba	%xcc, 2b
65	 nop
663:	ldx	[%l0 + (5f-1b)], %l1
67	jmpl	%l1, %g0
68	 nop
69	_ALIGN_DATA
704:	.xword	0x0
715:	.xword	0x0
726:
73
74DATA(mp_tramp_code)
75	.xword	1b
76DATA(mp_tramp_code_len)
77	.xword	6b-1b
78DATA(mp_tramp_tlb_slots)
79	.xword	4b-1b
80DATA(mp_tramp_func)
81	.xword	5b-1b
82
83/*
84 * void mp_startup(void)
85 */
86ENTRY(mp_startup)
87	wrpr	%g0, PSTATE_NORMAL, %pstate
88	wrpr	%g0, 0, %cleanwin
89	wrpr	%g0, 0, %pil
90	wr	%g0, 0, %fprs
91
92	SET(cpu_start_args, %l1, %l0)
93
94	mov	CPU_CLKSYNC, %l1
95	membar	#StoreLoad
96	stw	%l1, [%l0 + CSA_STATE]
97
981:	ldx	[%l0 + CSA_TICK], %l1
99	brz	%l1, 1b
100	 nop
101	wrpr	%l1, 0, %tick
102
103	UPA_GET_MID(%o0)
104
105#if KTR_COMPILE & KTR_SMP
106	CATR(KTR_SMP, "mp_start: cpu %d entered kernel"
107	    , %g1, %g2, %g3, 7, 8, 9)
108	stx	%o0, [%g1 + KTR_PARM1]
1099:
110#endif
111
112	rdpr	%ver, %l1
113	stx	%l1, [%l0 + CSA_VER]
114
115	/*
116	 * Inform the boot processor we have inited.
117	 */
118	mov	CPU_INIT, %l1
119	membar	#LoadStore
120	stw	%l1, [%l0 + CSA_STATE]
121
122	/*
123	 * Wait till its our turn to bootstrap.
124	 */
1252:	lduw	[%l0 + CSA_MID], %l1
126	cmp	%l1, %o0
127	bne	%xcc, 2b
128	 nop
129
130#if KTR_COMPILE & KTR_SMP
131	CATR(KTR_SMP, "_mp_start: cpu %d got start signal"
132	    , %g1, %g2, %g3, 7, 8, 9)
133	stx	%o0, [%g1 + KTR_PARM1]
1349:
135#endif
136
137	add	%l0, CSA_TTES, %l1
138	clr	%l2
139
140	/*
141	 * Map the per-cpu pages.
142	 */
1433:	sllx	%l2, TTE_SHIFT, %l3
144	add	%l1, %l3, %l3
145
146	ldx	[%l3 + TTE_VPN], %l4
147	ldx	[%l3 + TTE_DATA], %l5
148
149	wr	%g0, ASI_DMMU, %asi
150	srlx	%l4, TV_SIZE_BITS, %l4
151	sllx	%l4, PAGE_SHIFT_8K, %l4
152	stxa	%l4, [%g0 + AA_DMMU_TAR] %asi
153	stxa	%l5, [%g0] ASI_DTLB_DATA_IN_REG
154	membar	#Sync
155
156	add	%l2, 1, %l2
157	cmp	%l2, PCPU_PAGES
158	bne	%xcc, 3b
159	 nop
160
161	/*
162	 * Get onto our per-cpu panic stack, which precedes the struct pcpu
163	 * in the per-cpu page.
164	 */
165	ldx	[%l0 + CSA_PCPU], %l1
166	set	PCPU_PAGES * PAGE_SIZE - PC_SIZEOF, %l2
167	add	%l1, %l2, %l1
168	sub	%l1, SPOFF + CCFSZ, %sp
169
170	/*
171	 * Enable interrupts.
172	 */
173	wrpr	%g0, PSTATE_KERNEL, %pstate
174
175#if KTR_COMPILE & KTR_SMP
176	CATR(KTR_SMP,
177	    "_mp_start: bootstrap cpuid=%d mid=%d pcpu=%#lx data=%#lx sp=%#lx"
178	    , %g1, %g2, %g3, 7, 8, 9)
179	lduw	[%l1 + PC_CPUID], %g2
180	stx	%g2, [%g1 + KTR_PARM1]
181	lduw	[%l1 + PC_MID], %g2
182	stx	%g2, [%g1 + KTR_PARM2]
183	stx	%l1, [%g1 + KTR_PARM3]
184	stx	%sp, [%g1 + KTR_PARM5]
1859:
186#endif
187
188	/*
189	 * And away we go.  This doesn't return.
190	 */
191	call	cpu_mp_bootstrap
192	 mov	%l1, %o0
193	sir
194	! NOTREACHED
195END(mp_startup)
196