interrupt.S revision 108379
1/*- 2 * Copyright (c) 2002 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/sparc64/sparc64/interrupt.S 108379 2002-12-29 00:23:48Z jake $ 27 */ 28 29#include <machine/asi.h> 30#include <machine/asmacros.h> 31#include <machine/ktr.h> 32#include <machine/pstate.h> 33 34#include "assym.s" 35 36/* 37 * Handle a vectored interrupt. 38 * 39 * This is either a data bearing mondo vector interrupt, or a cross trap 40 * request from another cpu. In either case the hardware supplies an 41 * interrupt packet, in the form of 3 data words which are read from internal 42 * registers. A data bearing mondo vector packet consists of an interrupt 43 * number in the first data word, and zero in 2nd and 3rd. We use the 44 * interrupt number to find the function, argument and priority from the 45 * intr_vector table, allocate and fill in an intr_request from the per-cpu 46 * free list, link it onto the per-cpu active list and finally post a softint 47 * at the desired priority. Cross trap requests come in 2 forms, direct 48 * and queued. Direct requests are distinguished by the first data word 49 * being zero. The 2nd data word carries a function to call and the 3rd 50 * an argument to pass. The function is jumped to directly. It executes 51 * in nucleus context on interrupt globals and with all interrupts disabled, 52 * therefore it must be fast, and the things that it can do are limited. 53 * Queued cross trap requests are handled much like mondo vectors, except 54 * that the function, argument and priority are contained in the interrupt 55 * packet itself. They are distinguished by the upper 4 bits of the data 56 * word being non-zero, which specifies the priority of the softint to 57 * deliver. 58 * 59 * Register usage: 60 * %g1 - pointer to intr_request 61 * %g2 - pointer to intr_vector, temp once required data is loaded 62 * %g3 - interrupt number for mondo vectors, unused otherwise 63 * %g4 - function, from the interrupt packet for cross traps, or 64 * loaded from the interrupt registers for mondo vecors 65 * %g5 - argument, as above for %g4 66 * %g6 - softint priority 67 */ 68ENTRY(intr_vector) 69 /* 70 * Load the interrupt packet from the hardware. 71 */ 72 wr %g0, ASI_SDB_INTR_R, %asi 73 ldxa [%g0 + AA_SDB_INTR_D0] %asi, %g3 74 ldxa [%g0 + AA_SDB_INTR_D1] %asi, %g4 75 ldxa [%g0 + AA_SDB_INTR_D2] %asi, %g5 76 stxa %g0, [%g0] ASI_INTR_RECEIVE 77 membar #Sync 78 79 /* 80 * If the first data word is zero this is a direct cross trap request. 81 * The 2nd word points to code to execute and the 3rd is an argument 82 * to pass. Jump to it. 83 */ 84 brnz,a,pt %g3, 1f 85 nop 86 jmpl %g4, %g0 87 nop 88 /* NOTREACHED */ 89 90 /* 91 * If the high 4 bits of the 1st data word are non-zero, this is a 92 * queued cross trap request to be delivered as a softint. The high 93 * 4 bits of the 1st data word specify a priority, and the 2nd and 94 * 3rd a function and argument. 95 */ 961: srlx %g3, 60, %g6 97 brnz,a,pn %g6, 2f 98 clr %g3 99 100 /* 101 * Find the function, argument and desired priority from the 102 * intr_vector table. 103 */ 104 SET(intr_vectors, %g4, %g2) 105 sllx %g3, IV_SHIFT, %g4 106 add %g2, %g4, %g2 107 108 ldx [%g2 + IV_FUNC], %g4 109 ldx [%g2 + IV_ARG], %g5 110 lduw [%g2 + IV_PRI], %g6 111 112 /* 113 * Get a intr_request from the free list. There should always be one 114 * unless we are getting an interrupt storm from stray interrupts, in 115 * which case the we will deference a NULL pointer and panic. 116 */ 1172: ldx [PCPU(IRFREE)], %g1 118 ldx [%g1 + IR_NEXT], %g2 119 stx %g2, [PCPU(IRFREE)] 120 121 /* 122 * Store the vector number, function, argument and priority. 123 */ 124 stw %g3, [%g1 + IR_VEC] 125 stx %g4, [%g1 + IR_FUNC] 126 stx %g5, [%g1 + IR_ARG] 127 stw %g6, [%g1 + IR_PRI] 128 129 /* 130 * Link it onto the end of the active list. 131 */ 132 stx %g0, [%g1 + IR_NEXT] 133 ldx [PCPU(IRTAIL)], %g4 134 stx %g1, [%g4] 135 add %g1, IR_NEXT, %g1 136 stx %g1, [PCPU(IRTAIL)] 137 138 /* 139 * Trigger a softint at the level indicated by the priority. 140 */ 141 mov 1, %g1 142 sllx %g1, %g6, %g1 143 wr %g1, 0, %set_softint 144 145 /* 146 * Done, retry the instruction. 147 */ 148 retry 149END(intr_vector) 150 151ENTRY(intr_fast) 152 save %sp, -CCFSZ, %sp 153 1541: ldx [PCPU(IRHEAD)], %l0 155 brnz,a,pt %l0, 2f 156 nop 157 158 ret 159 restore 160 1612: wrpr %g0, PSTATE_NORMAL, %pstate 162 163 ldx [%l0 + IR_NEXT], %l1 164 brnz,pt %l1, 3f 165 stx %l1, [PCPU(IRHEAD)] 166 PCPU_ADDR(IRHEAD, %l1) 167 stx %l1, [PCPU(IRTAIL)] 168 1693: ldx [%l0 + IR_FUNC], %o0 170 ldx [%l0 + IR_ARG], %o1 171 ldx [%l0 + IR_VEC], %o2 172 173 ldx [PCPU(IRFREE)], %l1 174 stx %l1, [%l0 + IR_NEXT] 175 stx %l0, [PCPU(IRFREE)] 176 177 wrpr %g0, PSTATE_KERNEL, %pstate 178 179 call %o0 180 mov %o1, %o0 181 ba,a %xcc, 1b 182 nop 183END(intr_fast) 184