bus_machdep.c revision 134934
1/*- 2 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 7 * NASA Ames Research Center. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37/* 38 * Copyright (c) 1992, 1993 39 * The Regents of the University of California. All rights reserved. 40 * 41 * This software was developed by the Computer Systems Engineering group 42 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 43 * contributed to Berkeley. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 4. Neither the name of the University nor the names of its contributors 54 * may be used to endorse or promote products derived from this software 55 * without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 61 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 62 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 63 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 66 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 67 * SUCH DAMAGE. 68 */ 69/* 70 * Copyright (c) 1997, 1998 Justin T. Gibbs. 71 * All rights reserved. 72 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions, and the following disclaimer, 79 * without modification, immediately at the beginning of the file. 80 * 2. The name of the author may not be used to endorse or promote products 81 * derived from this software without specific prior written permission. 82 * 83 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 84 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 85 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 86 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 87 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 88 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 89 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 90 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 91 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 92 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 93 * SUCH DAMAGE. 94 * 95 * from: @(#)machdep.c 8.6 (Berkeley) 1/14/94 96 * from: NetBSD: machdep.c,v 1.111 2001/09/15 07:13:40 eeh Exp 97 * and 98 * from: FreeBSD: src/sys/i386/i386/busdma_machdep.c,v 1.24 2001/08/15 99 * 100 * $FreeBSD: head/sys/sparc64/sparc64/bus_machdep.c 134934 2004-09-08 04:54:19Z scottl $ 101 */ 102 103#include <sys/param.h> 104#include <sys/bus.h> 105#include <sys/lock.h> 106#include <sys/malloc.h> 107#include <sys/mbuf.h> 108#include <sys/mutex.h> 109#include <sys/proc.h> 110#include <sys/smp.h> 111#include <sys/systm.h> 112#include <sys/uio.h> 113 114#include <vm/vm.h> 115#include <vm/vm_extern.h> 116#include <vm/vm_kern.h> 117#include <vm/vm_page.h> 118#include <vm/vm_param.h> 119#include <vm/vm_map.h> 120 121#include <machine/asi.h> 122#include <machine/atomic.h> 123#include <machine/bus.h> 124#include <machine/bus_private.h> 125#include <machine/cache.h> 126#include <machine/smp.h> 127#include <machine/tlb.h> 128 129static void nexus_bus_barrier(bus_space_tag_t, bus_space_handle_t, 130 bus_size_t, bus_size_t, int); 131 132/* ASI's for bus access. */ 133int bus_type_asi[] = { 134 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* UPA */ 135 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* SBUS */ 136 ASI_PHYS_BYPASS_EC_WITH_EBIT_L, /* PCI configuration space */ 137 ASI_PHYS_BYPASS_EC_WITH_EBIT_L, /* PCI memory space */ 138 ASI_PHYS_BYPASS_EC_WITH_EBIT_L, /* PCI I/O space */ 139 0 140}; 141 142int bus_stream_asi[] = { 143 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* UPA */ 144 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* SBUS */ 145 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* PCI configuration space */ 146 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* PCI memory space */ 147 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* PCI I/O space */ 148 0 149}; 150 151/* 152 * Convenience function for manipulating driver locks from busdma (during 153 * busdma_swi, for example). Drivers that don't provide their own locks 154 * should specify &Giant to dmat->lockfuncarg. Drivers that use their own 155 * non-mutex locking scheme don't have to use this at all. 156 */ 157void 158busdma_lock_mutex(void *arg, bus_dma_lock_op_t op) 159{ 160 struct mtx *dmtx; 161 162 dmtx = (struct mtx *)arg; 163 switch (op) { 164 case BUS_DMA_LOCK: 165 mtx_lock(dmtx); 166 break; 167 case BUS_DMA_UNLOCK: 168 mtx_unlock(dmtx); 169 break; 170 default: 171 panic("Unknown operation 0x%x for busdma_lock_mutex!", op); 172 } 173} 174 175/* 176 * dflt_lock should never get called. It gets put into the dma tag when 177 * lockfunc == NULL, which is only valid if the maps that are associated 178 * with the tag are meant to never be defered. 179 * XXX Should have a way to identify which driver is responsible here. 180 */ 181static void 182dflt_lock(void *arg, bus_dma_lock_op_t op) 183{ 184#ifdef INVARIANTS 185 panic("driver error: busdma dflt_lock called"); 186#else 187 printf("DRIVER_ERROR: busdma dflt_lock called\n"); 188#endif 189} 190 191/* 192 * Since there is no way for a device to obtain a dma tag from its parent 193 * we use this kluge to handle different the different supported bus systems. 194 * The sparc64_root_dma_tag is used as parent for tags that have none, so that 195 * the correct methods will be used. 196 */ 197bus_dma_tag_t sparc64_root_dma_tag; 198 199/* 200 * Allocate a device specific dma_tag. 201 */ 202int 203bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 204 bus_size_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr, 205 bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize, 206 int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 207 void *lockfuncarg, bus_dma_tag_t *dmat) 208{ 209 bus_dma_tag_t impptag; 210 bus_dma_tag_t newtag; 211 212 /* Return a NULL tag on failure */ 213 *dmat = NULL; 214 215 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT); 216 if (newtag == NULL) 217 return (ENOMEM); 218 219 impptag = parent != NULL ? parent : sparc64_root_dma_tag; 220 /* 221 * The method table pointer and the cookie need to be taken over from 222 * the parent or the root tag. 223 */ 224 newtag->dt_cookie = impptag->dt_cookie; 225 newtag->dt_mt = impptag->dt_mt; 226 227 newtag->dt_parent = parent; 228 newtag->dt_alignment = alignment; 229 newtag->dt_boundary = boundary; 230 newtag->dt_lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1); 231 newtag->dt_highaddr = trunc_page((vm_offset_t)highaddr) + 232 (PAGE_SIZE - 1); 233 newtag->dt_filter = filter; 234 newtag->dt_filterarg = filterarg; 235 newtag->dt_maxsize = maxsize; 236 newtag->dt_nsegments = nsegments; 237 newtag->dt_maxsegsz = maxsegsz; 238 newtag->dt_flags = flags; 239 newtag->dt_ref_count = 1; /* Count ourselves */ 240 newtag->dt_map_count = 0; 241 242 if (lockfunc != NULL) { 243 newtag->dt_lockfunc = lockfunc; 244 newtag->dt_lockfuncarg = lockfuncarg; 245 } else { 246 newtag->dt_lockfunc = dflt_lock; 247 newtag->dt_lockfuncarg = NULL; 248 } 249 250 newtag->dt_segments = NULL; 251 252 /* Take into account any restrictions imposed by our parent tag */ 253 if (parent != NULL) { 254 newtag->dt_lowaddr = ulmin(parent->dt_lowaddr, 255 newtag->dt_lowaddr); 256 newtag->dt_highaddr = ulmax(parent->dt_highaddr, 257 newtag->dt_highaddr); 258 if (newtag->dt_boundary == 0) 259 newtag->dt_boundary = parent->dt_boundary; 260 else if (parent->dt_boundary != 0) 261 newtag->dt_boundary = ulmin(parent->dt_boundary, 262 newtag->dt_boundary); 263 atomic_add_int(&parent->dt_ref_count, 1); 264 } 265 266 *dmat = newtag; 267 return (0); 268} 269 270int 271bus_dma_tag_destroy(bus_dma_tag_t dmat) 272{ 273 bus_dma_tag_t parent; 274 275 if (dmat != NULL) { 276 if (dmat->dt_map_count != 0) 277 return (EBUSY); 278 while (dmat != NULL) { 279 parent = dmat->dt_parent; 280 atomic_subtract_int(&dmat->dt_ref_count, 1); 281 if (dmat->dt_ref_count == 0) { 282 if (dmat->dt_segments != NULL) 283 free(dmat->dt_segments, M_DEVBUF); 284 free(dmat, M_DEVBUF); 285 /* 286 * Last reference count, so 287 * release our reference 288 * count on our parent. 289 */ 290 dmat = parent; 291 } else 292 dmat = NULL; 293 } 294 } 295 return (0); 296} 297 298/* Allocate/free a tag, and do the necessary management work. */ 299int 300sparc64_dma_alloc_map(bus_dma_tag_t dmat, bus_dmamap_t *mapp) 301{ 302 303 if (dmat->dt_segments == NULL) { 304 dmat->dt_segments = (bus_dma_segment_t *)malloc( 305 sizeof(bus_dma_segment_t) * dmat->dt_nsegments, M_DEVBUF, 306 M_NOWAIT); 307 if (dmat->dt_segments == NULL) 308 return (ENOMEM); 309 } 310 *mapp = malloc(sizeof(**mapp), M_DEVBUF, M_NOWAIT | M_ZERO); 311 if (*mapp == NULL) 312 return (ENOMEM); 313 314 SLIST_INIT(&(*mapp)->dm_reslist); 315 dmat->dt_map_count++; 316 return (0); 317} 318 319void 320sparc64_dma_free_map(bus_dma_tag_t dmat, bus_dmamap_t map) 321{ 322 323 free(map, M_DEVBUF); 324 dmat->dt_map_count--; 325} 326 327static int 328nexus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) 329{ 330 331 return (sparc64_dma_alloc_map(dmat, mapp)); 332} 333 334static int 335nexus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) 336{ 337 338 sparc64_dma_free_map(dmat, map); 339 return (0); 340} 341 342/* 343 * Utility function to load a linear buffer. lastaddrp holds state 344 * between invocations (for multiple-buffer loads). segp contains 345 * the starting segment on entrace, and the ending segment on exit. 346 * first indicates if this is the first invocation of this function. 347 */ 348static int 349_nexus_dmamap_load_buffer(bus_dma_tag_t dmat, void *buf, bus_size_t buflen, 350 struct thread *td, int flags, bus_addr_t *lastaddrp, int *segp, int first) 351{ 352 bus_dma_segment_t *segs; 353 bus_size_t sgsize; 354 bus_addr_t curaddr, lastaddr, baddr, bmask; 355 vm_offset_t vaddr = (vm_offset_t)buf; 356 int seg; 357 pmap_t pmap; 358 359 segs = dmat->dt_segments; 360 361 if (td != NULL) 362 pmap = vmspace_pmap(td->td_proc->p_vmspace); 363 else 364 pmap = NULL; 365 366 lastaddr = *lastaddrp; 367 bmask = ~(dmat->dt_boundary - 1); 368 369 for (seg = *segp; buflen > 0 ; ) { 370 /* 371 * Get the physical address for this segment. 372 */ 373 if (pmap) 374 curaddr = pmap_extract(pmap, vaddr); 375 else 376 curaddr = pmap_kextract(vaddr); 377 378 /* 379 * Compute the segment size, and adjust counts. 380 */ 381 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); 382 if (buflen < sgsize) 383 sgsize = buflen; 384 385 /* 386 * Make sure we don't cross any boundaries. 387 */ 388 if (dmat->dt_boundary > 0) { 389 baddr = (curaddr + dmat->dt_boundary) & bmask; 390 if (sgsize > (baddr - curaddr)) 391 sgsize = (baddr - curaddr); 392 } 393 394 /* 395 * Insert chunk into a segment, coalescing with 396 * previous segment if possible. 397 */ 398 if (first) { 399 segs[seg].ds_addr = curaddr; 400 segs[seg].ds_len = sgsize; 401 first = 0; 402 } else { 403 if (curaddr == lastaddr && 404 (segs[seg].ds_len + sgsize) <= dmat->dt_maxsegsz && 405 (dmat->dt_boundary == 0 || 406 (segs[seg].ds_addr & bmask) == (curaddr & bmask))) 407 segs[seg].ds_len += sgsize; 408 else { 409 if (++seg >= dmat->dt_nsegments) 410 break; 411 segs[seg].ds_addr = curaddr; 412 segs[seg].ds_len = sgsize; 413 } 414 } 415 416 lastaddr = curaddr + sgsize; 417 vaddr += sgsize; 418 buflen -= sgsize; 419 } 420 421 *segp = seg; 422 *lastaddrp = lastaddr; 423 424 /* 425 * Did we fit? 426 */ 427 return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */ 428} 429 430/* 431 * Common function for loading a DMA map with a linear buffer. May 432 * be called by bus-specific DMA map load functions. 433 * 434 * Most SPARCs have IOMMUs in the bus controllers. In those cases 435 * they only need one segment and will use virtual addresses for DVMA. 436 * Those bus controllers should intercept these vectors and should 437 * *NEVER* call nexus_dmamap_load() which is used only by devices that 438 * bypass DVMA. 439 */ 440static int 441nexus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, 442 bus_size_t buflen, bus_dmamap_callback_t *callback, void *callback_arg, 443 int flags) 444{ 445 bus_addr_t lastaddr; 446 int error, nsegs; 447 448 error = _nexus_dmamap_load_buffer(dmat, buf, buflen, NULL, flags, 449 &lastaddr, &nsegs, 1); 450 451 if (error == 0) { 452 (*callback)(callback_arg, dmat->dt_segments, nsegs + 1, 0); 453 map->dm_flags |= DMF_LOADED; 454 } else 455 (*callback)(callback_arg, NULL, 0, error); 456 457 return (0); 458} 459 460/* 461 * Like nexus_dmamap_load(), but for mbufs. 462 */ 463static int 464nexus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0, 465 bus_dmamap_callback2_t *callback, void *callback_arg, int flags) 466{ 467 int nsegs, error; 468 469 M_ASSERTPKTHDR(m0); 470 471 nsegs = 0; 472 error = 0; 473 if (m0->m_pkthdr.len <= dmat->dt_maxsize) { 474 int first = 1; 475 bus_addr_t lastaddr = 0; 476 struct mbuf *m; 477 478 for (m = m0; m != NULL && error == 0; m = m->m_next) { 479 if (m->m_len > 0) { 480 error = _nexus_dmamap_load_buffer(dmat, 481 m->m_data, m->m_len,NULL, flags, &lastaddr, 482 &nsegs, first); 483 first = 0; 484 } 485 } 486 } else { 487 error = EINVAL; 488 } 489 490 if (error) { 491 /* force "no valid mappings" in callback */ 492 (*callback)(callback_arg, dmat->dt_segments, 0, 0, error); 493 } else { 494 map->dm_flags |= DMF_LOADED; 495 (*callback)(callback_arg, dmat->dt_segments, nsegs + 1, 496 m0->m_pkthdr.len, error); 497 } 498 return (error); 499} 500 501/* 502 * Like nexus_dmamap_load(), but for uios. 503 */ 504static int 505nexus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio, 506 bus_dmamap_callback2_t *callback, void *callback_arg, int flags) 507{ 508 bus_addr_t lastaddr; 509 int nsegs, error, first, i; 510 bus_size_t resid; 511 struct iovec *iov; 512 struct thread *td = NULL; 513 514 resid = uio->uio_resid; 515 iov = uio->uio_iov; 516 517 if (uio->uio_segflg == UIO_USERSPACE) { 518 td = uio->uio_td; 519 KASSERT(td != NULL, 520 ("nexus_dmamap_load_uio: USERSPACE but no proc")); 521 } 522 523 nsegs = 0; 524 error = 0; 525 first = 1; 526 for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) { 527 /* 528 * Now at the first iovec to load. Load each iovec 529 * until we have exhausted the residual count. 530 */ 531 bus_size_t minlen = 532 resid < iov[i].iov_len ? resid : iov[i].iov_len; 533 caddr_t addr = (caddr_t) iov[i].iov_base; 534 535 if (minlen > 0) { 536 error = _nexus_dmamap_load_buffer(dmat, addr, minlen, 537 td, flags, &lastaddr, &nsegs, first); 538 first = 0; 539 540 resid -= minlen; 541 } 542 } 543 544 if (error) { 545 /* force "no valid mappings" in callback */ 546 (*callback)(callback_arg, dmat->dt_segments, 0, 0, error); 547 } else { 548 map->dm_flags |= DMF_LOADED; 549 (*callback)(callback_arg, dmat->dt_segments, nsegs + 1, 550 uio->uio_resid, error); 551 } 552 return (error); 553} 554 555/* 556 * Common function for unloading a DMA map. May be called by 557 * bus-specific DMA map unload functions. 558 */ 559static void 560nexus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) 561{ 562 563 map->dm_flags &= ~DMF_LOADED; 564} 565 566/* 567 * Common function for DMA map synchronization. May be called 568 * by bus-specific DMA map synchronization functions. 569 */ 570static void 571nexus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) 572{ 573 574 /* 575 * We sync out our caches, but the bus must do the same. 576 * 577 * Actually a #Sync is expensive. We should optimize. 578 */ 579 if ((op & BUS_DMASYNC_PREREAD) || (op & BUS_DMASYNC_PREWRITE)) { 580 /* 581 * Don't really need to do anything, but flush any pending 582 * writes anyway. 583 */ 584 membar(Sync); 585 } 586#if 0 587 /* Should not be needed. */ 588 if (op & BUS_DMASYNC_POSTREAD) { 589 ecache_flush((vm_offset_t)map->buf, 590 (vm_offset_t)map->buf + map->buflen - 1); 591 } 592#endif 593 if (op & BUS_DMASYNC_POSTWRITE) { 594 /* Nothing to do. Handled by the bus controller. */ 595 } 596} 597 598/* 599 * Common function for DMA-safe memory allocation. May be called 600 * by bus-specific DMA memory allocation functions. 601 */ 602static int 603nexus_dmamem_alloc(bus_dma_tag_t dmat, void **vaddr, int flags, 604 bus_dmamap_t *mapp) 605{ 606 int mflags; 607 608 if (flags & BUS_DMA_NOWAIT) 609 mflags = M_NOWAIT; 610 else 611 mflags = M_WAITOK; 612 if (flags & BUS_DMA_ZERO) 613 mflags |= M_ZERO; 614 615 if ((dmat->dt_maxsize <= PAGE_SIZE)) { 616 *vaddr = malloc(dmat->dt_maxsize, M_DEVBUF, mflags); 617 } else { 618 /* 619 * XXX: Use contigmalloc until it is merged into this facility 620 * and handles multi-seg allocations. Nobody is doing multi-seg 621 * allocations yet though. 622 */ 623 *vaddr = contigmalloc(dmat->dt_maxsize, M_DEVBUF, mflags, 624 0ul, dmat->dt_lowaddr, 625 dmat->dt_alignment ? dmat->dt_alignment : 1UL, 626 dmat->dt_boundary); 627 } 628 if (*vaddr == NULL) 629 return (ENOMEM); 630 return (0); 631} 632 633/* 634 * Common function for freeing DMA-safe memory. May be called by 635 * bus-specific DMA memory free functions. 636 */ 637static void 638nexus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) 639{ 640 641 if ((dmat->dt_maxsize <= PAGE_SIZE)) 642 free(vaddr, M_DEVBUF); 643 else { 644 contigfree(vaddr, dmat->dt_maxsize, M_DEVBUF); 645 } 646} 647 648struct bus_dma_methods nexus_dma_methods = { 649 nexus_dmamap_create, 650 nexus_dmamap_destroy, 651 nexus_dmamap_load, 652 nexus_dmamap_load_mbuf, 653 nexus_dmamap_load_uio, 654 nexus_dmamap_unload, 655 nexus_dmamap_sync, 656 nexus_dmamem_alloc, 657 nexus_dmamem_free, 658}; 659 660struct bus_dma_tag nexus_dmatag = { 661 NULL, 662 NULL, 663 8, 664 0, 665 0, 666 0x3ffffffff, 667 NULL, /* XXX */ 668 NULL, 669 0x3ffffffff, /* XXX */ 670 0xff, /* XXX */ 671 0xffffffff, /* XXX */ 672 0, 673 0, 674 0, 675 NULL, 676 NULL, 677 NULL, 678 &nexus_dma_methods, 679}; 680 681/* 682 * Helpers to map/unmap bus memory 683 */ 684int 685sparc64_bus_mem_map(bus_space_tag_t tag, bus_space_handle_t handle, 686 bus_size_t size, int flags, vm_offset_t vaddr, void **hp) 687{ 688 vm_offset_t addr; 689 vm_offset_t sva; 690 vm_offset_t va; 691 vm_paddr_t pa; 692 vm_size_t vsz; 693 u_long pm_flags; 694 695 addr = (vm_offset_t)handle; 696 size = round_page(size); 697 if (size == 0) { 698 printf("sparc64_bus_map: zero size\n"); 699 return (EINVAL); 700 } 701 switch (tag->bst_type) { 702 case PCI_CONFIG_BUS_SPACE: 703 case PCI_IO_BUS_SPACE: 704 case PCI_MEMORY_BUS_SPACE: 705 pm_flags = TD_IE; 706 break; 707 default: 708 pm_flags = 0; 709 break; 710 } 711 712 if (!(flags & BUS_SPACE_MAP_CACHEABLE)) 713 pm_flags |= TD_E; 714 715 if (vaddr != 0L) 716 sva = trunc_page(vaddr); 717 else { 718 if ((sva = kmem_alloc_nofault(kernel_map, size)) == 0) 719 panic("sparc64_bus_map: cannot allocate virtual " 720 "memory"); 721 } 722 723 /* Preserve page offset. */ 724 *hp = (void *)(sva | ((u_long)addr & PAGE_MASK)); 725 726 pa = trunc_page(addr); 727 if ((flags & BUS_SPACE_MAP_READONLY) == 0) 728 pm_flags |= TD_W; 729 730 va = sva; 731 vsz = size; 732 do { 733 pmap_kenter_flags(va, pa, pm_flags); 734 va += PAGE_SIZE; 735 pa += PAGE_SIZE; 736 } while ((vsz -= PAGE_SIZE) > 0); 737 tlb_range_demap(kernel_pmap, sva, sva + size - 1); 738 return (0); 739} 740 741int 742sparc64_bus_mem_unmap(void *bh, bus_size_t size) 743{ 744 vm_offset_t sva; 745 vm_offset_t va; 746 vm_offset_t endva; 747 748 sva = trunc_page((vm_offset_t)bh); 749 endva = sva + round_page(size); 750 for (va = sva; va < endva; va += PAGE_SIZE) 751 pmap_kremove_flags(va); 752 tlb_range_demap(kernel_pmap, sva, sva + size - 1); 753 kmem_free(kernel_map, sva, size); 754 return (0); 755} 756 757/* 758 * Fake up a bus tag, for use by console drivers in early boot when the regular 759 * means to allocate resources are not yet available. 760 * Addr is the physical address of the desired start of the handle. 761 */ 762bus_space_handle_t 763sparc64_fake_bustag(int space, bus_addr_t addr, struct bus_space_tag *ptag) 764{ 765 766 ptag->bst_cookie = NULL; 767 ptag->bst_parent = NULL; 768 ptag->bst_type = space; 769 ptag->bst_bus_barrier = nexus_bus_barrier; 770 return (addr); 771} 772 773/* 774 * Base bus space handlers. 775 */ 776 777static void 778nexus_bus_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset, 779 bus_size_t size, int flags) 780{ 781 782 /* 783 * We have lots of alternatives depending on whether we're 784 * synchronizing loads with loads, loads with stores, stores 785 * with loads, or stores with stores. The only ones that seem 786 * generic are #Sync and #MemIssue. I'll use #Sync for safety. 787 */ 788 switch(flags) { 789 case BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE: 790 case BUS_SPACE_BARRIER_READ: 791 case BUS_SPACE_BARRIER_WRITE: 792 membar(Sync); 793 break; 794 default: 795 panic("sparc64_bus_barrier: unknown flags"); 796 } 797 return; 798} 799 800struct bus_space_tag nexus_bustag = { 801 NULL, /* cookie */ 802 NULL, /* parent bus tag */ 803 UPA_BUS_SPACE, /* type */ 804 nexus_bus_barrier, /* bus_space_barrier */ 805}; 806