bus_machdep.c revision 115323
1/*- 2 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 7 * NASA Ames Research Center. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37/* 38 * Copyright (c) 1992, 1993 39 * The Regents of the University of California. All rights reserved. 40 * 41 * This software was developed by the Computer Systems Engineering group 42 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 43 * contributed to Berkeley. 44 * 45 * All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by the University of 48 * California, Lawrence Berkeley Laboratory. 49 * 50 * Redistribution and use in source and binary forms, with or without 51 * modification, are permitted provided that the following conditions 52 * are met: 53 * 1. Redistributions of source code must retain the above copyright 54 * notice, this list of conditions and the following disclaimer. 55 * 2. Redistributions in binary form must reproduce the above copyright 56 * notice, this list of conditions and the following disclaimer in the 57 * documentation and/or other materials provided with the distribution. 58 * 3. All advertising materials mentioning features or use of this software 59 * must display the following acknowledgement: 60 * This product includes software developed by the University of 61 * California, Berkeley and its contributors. 62 * 4. Neither the name of the University nor the names of its contributors 63 * may be used to endorse or promote products derived from this software 64 * without specific prior written permission. 65 * 66 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 67 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 69 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 72 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 73 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 74 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 75 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 76 * SUCH DAMAGE. 77 */ 78/* 79 * Copyright (c) 1997, 1998 Justin T. Gibbs. 80 * All rights reserved. 81 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 82 * 83 * Redistribution and use in source and binary forms, with or without 84 * modification, are permitted provided that the following conditions 85 * are met: 86 * 1. Redistributions of source code must retain the above copyright 87 * notice, this list of conditions, and the following disclaimer, 88 * without modification, immediately at the beginning of the file. 89 * 2. The name of the author may not be used to endorse or promote products 90 * derived from this software without specific prior written permission. 91 * 92 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 93 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 94 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 95 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 96 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 97 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 98 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 99 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 100 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 101 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 102 * SUCH DAMAGE. 103 * 104 * from: @(#)machdep.c 8.6 (Berkeley) 1/14/94 105 * from: NetBSD: machdep.c,v 1.111 2001/09/15 07:13:40 eeh Exp 106 * and 107 * from: FreeBSD: src/sys/i386/i386/busdma_machdep.c,v 1.24 2001/08/15 108 * 109 * $FreeBSD: head/sys/sparc64/sparc64/bus_machdep.c 115323 2003-05-26 16:59:00Z scottl $ 110 */ 111 112#include <sys/param.h> 113#include <sys/bus.h> 114#include <sys/lock.h> 115#include <sys/malloc.h> 116#include <sys/mbuf.h> 117#include <sys/mutex.h> 118#include <sys/proc.h> 119#include <sys/smp.h> 120#include <sys/systm.h> 121#include <sys/uio.h> 122 123#include <vm/vm.h> 124#include <vm/vm_extern.h> 125#include <vm/vm_kern.h> 126#include <vm/vm_page.h> 127#include <vm/vm_param.h> 128#include <vm/vm_map.h> 129 130#include <machine/asi.h> 131#include <machine/atomic.h> 132#include <machine/bus.h> 133#include <machine/bus_private.h> 134#include <machine/cache.h> 135#include <machine/smp.h> 136#include <machine/tlb.h> 137 138/* ASI's for bus access. */ 139int bus_type_asi[] = { 140 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* UPA */ 141 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* SBUS */ 142 ASI_PHYS_BYPASS_EC_WITH_EBIT_L, /* PCI configuration space */ 143 ASI_PHYS_BYPASS_EC_WITH_EBIT_L, /* PCI memory space */ 144 ASI_PHYS_BYPASS_EC_WITH_EBIT_L, /* PCI I/O space */ 145 0 146}; 147 148int bus_stream_asi[] = { 149 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* UPA */ 150 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* SBUS */ 151 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* PCI configuration space */ 152 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* PCI memory space */ 153 ASI_PHYS_BYPASS_EC_WITH_EBIT, /* PCI I/O space */ 154 0 155}; 156 157/* 158 * busdma support code. 159 * Note: there is no support for bounce buffers yet. 160 */ 161 162static int nexus_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int, 163 bus_dmamap_t *); 164static int nexus_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 165static int nexus_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 166 void *, bus_size_t, bus_dmamap_callback_t *, void *, int); 167static int nexus_dmamap_load_mbuf(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 168 struct mbuf *, bus_dmamap_callback2_t *, void *, int); 169static int nexus_dmamap_load_uio(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 170 struct uio *, bus_dmamap_callback2_t *, void *, int); 171static void nexus_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 172static void nexus_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, int); 173static int nexus_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int, 174 bus_dmamap_t *); 175static void nexus_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *, 176 bus_dmamap_t); 177 178/* 179 * Since there is now way for a device to obtain a dma tag from its parent 180 * we use this kluge to handle different the different supported bus systems. 181 * The sparc64_root_dma_tag is used as parent for tags that have none, so that 182 * the correct methods will be used. 183 */ 184bus_dma_tag_t sparc64_root_dma_tag; 185 186/* 187 * Allocate a device specific dma_tag. 188 */ 189int 190bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 191 bus_size_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr, 192 bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize, 193 int nsegments, bus_size_t maxsegsz, int flags, bus_dma_tag_t *dmat) 194{ 195 196 bus_dma_tag_t newtag; 197 198 /* Return a NULL tag on failure */ 199 *dmat = NULL; 200 201 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT); 202 if (newtag == NULL) 203 return (ENOMEM); 204 205 newtag->dt_parent = parent != NULL ? parent : sparc64_root_dma_tag; 206 newtag->dt_alignment = alignment; 207 newtag->dt_boundary = boundary; 208 newtag->dt_lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1); 209 newtag->dt_highaddr = trunc_page((vm_offset_t)highaddr) + 210 (PAGE_SIZE - 1); 211 newtag->dt_filter = filter; 212 newtag->dt_filterarg = filterarg; 213 newtag->dt_maxsize = maxsize; 214 newtag->dt_nsegments = nsegments; 215 newtag->dt_maxsegsz = maxsegsz; 216 newtag->dt_flags = flags; 217 newtag->dt_ref_count = 1; /* Count ourselves */ 218 newtag->dt_map_count = 0; 219 220 newtag->dt_dmamap_create = NULL; 221 newtag->dt_dmamap_destroy = NULL; 222 newtag->dt_dmamap_load = NULL; 223 newtag->dt_dmamap_load_mbuf = NULL; 224 newtag->dt_dmamap_load_uio = NULL; 225 newtag->dt_dmamap_unload = NULL; 226 newtag->dt_dmamap_sync = NULL; 227 newtag->dt_dmamem_alloc = NULL; 228 newtag->dt_dmamem_free = NULL; 229 230 /* Take into account any restrictions imposed by our parent tag */ 231 if (parent != NULL) { 232 newtag->dt_lowaddr = ulmin(parent->dt_lowaddr, 233 newtag->dt_lowaddr); 234 newtag->dt_highaddr = ulmax(parent->dt_highaddr, 235 newtag->dt_highaddr); 236 /* 237 * XXX Not really correct??? Probably need to honor boundary 238 * all the way up the inheritence chain. 239 */ 240 newtag->dt_boundary = ulmin(parent->dt_boundary, 241 newtag->dt_boundary); 242 } 243 atomic_add_int(&newtag->dt_parent->dt_ref_count, 1); 244 245 *dmat = newtag; 246 return (0); 247} 248 249int 250bus_dma_tag_destroy(bus_dma_tag_t dmat) 251{ 252 bus_dma_tag_t parent; 253 254 if (dmat != NULL) { 255 if (dmat->dt_map_count != 0) 256 return (EBUSY); 257 while (dmat != NULL) { 258 parent = dmat->dt_parent; 259 atomic_subtract_int(&dmat->dt_ref_count, 1); 260 if (dmat->dt_ref_count == 0) { 261 free(dmat, M_DEVBUF); 262 /* 263 * Last reference count, so 264 * release our reference 265 * count on our parent. 266 */ 267 dmat = parent; 268 } else 269 dmat = NULL; 270 } 271 } 272 return (0); 273} 274 275/* 276 * Common function for DMA map creation. May be called by bus-specific 277 * DMA map creation functions. 278 */ 279static int 280nexus_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags, 281 bus_dmamap_t *mapp) 282{ 283 284 *mapp = malloc(sizeof(**mapp), M_DEVBUF, M_NOWAIT | M_ZERO); 285 if (*mapp != NULL) { 286 ddmat->dt_map_count++; 287 sparc64_dmamap_init(*mapp); 288 return (0); 289 } else 290 return (ENOMEM); 291} 292 293/* 294 * Common function for DMA map destruction. May be called by bus-specific 295 * DMA map destruction functions. 296 */ 297static int 298nexus_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 299{ 300 301 free(map, M_DEVBUF); 302 ddmat->dt_map_count--; 303 return (0); 304} 305 306/* 307 * Utility function to load a linear buffer. lastaddrp holds state 308 * between invocations (for multiple-buffer loads). segp contains 309 * the starting segment on entrace, and the ending segment on exit. 310 * first indicates if this is the first invocation of this function. 311 */ 312static int 313_nexus_dmamap_load_buffer(bus_dma_tag_t ddmat, bus_dma_segment_t segs[], 314 void *buf, bus_size_t buflen, struct thread *td, int flags, 315 bus_addr_t *lastaddrp, int *segp, int first) 316{ 317 bus_size_t sgsize; 318 bus_addr_t curaddr, lastaddr, baddr, bmask; 319 vm_offset_t vaddr = (vm_offset_t)buf; 320 int seg; 321 pmap_t pmap; 322 323 if (td != NULL) 324 pmap = vmspace_pmap(td->td_proc->p_vmspace); 325 else 326 pmap = NULL; 327 328 lastaddr = *lastaddrp; 329 bmask = ~(ddmat->dt_boundary - 1); 330 331 for (seg = *segp; buflen > 0 ; ) { 332 /* 333 * Get the physical address for this segment. 334 */ 335 if (pmap) 336 curaddr = pmap_extract(pmap, vaddr); 337 else 338 curaddr = pmap_kextract(vaddr); 339 340 /* 341 * Compute the segment size, and adjust counts. 342 */ 343 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); 344 if (buflen < sgsize) 345 sgsize = buflen; 346 347 /* 348 * Make sure we don't cross any boundaries. 349 */ 350 if (ddmat->dt_boundary > 0) { 351 baddr = (curaddr + ddmat->dt_boundary) & bmask; 352 if (sgsize > (baddr - curaddr)) 353 sgsize = (baddr - curaddr); 354 } 355 356 /* 357 * Insert chunk into a segment, coalescing with 358 * previous segment if possible. 359 */ 360 if (first) { 361 segs[seg].ds_addr = curaddr; 362 segs[seg].ds_len = sgsize; 363 first = 0; 364 } else { 365 if (curaddr == lastaddr && 366 (segs[seg].ds_len + sgsize) <= ddmat->dt_maxsegsz && 367 (ddmat->dt_boundary == 0 || 368 (segs[seg].ds_addr & bmask) == (curaddr & bmask))) 369 segs[seg].ds_len += sgsize; 370 else { 371 if (++seg >= ddmat->dt_nsegments) 372 break; 373 segs[seg].ds_addr = curaddr; 374 segs[seg].ds_len = sgsize; 375 } 376 } 377 378 lastaddr = curaddr + sgsize; 379 vaddr += sgsize; 380 buflen -= sgsize; 381 } 382 383 *segp = seg; 384 *lastaddrp = lastaddr; 385 386 /* 387 * Did we fit? 388 */ 389 return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */ 390} 391 392/* 393 * Common function for loading a DMA map with a linear buffer. May 394 * be called by bus-specific DMA map load functions. 395 * 396 * Most SPARCs have IOMMUs in the bus controllers. In those cases 397 * they only need one segment and will use virtual addresses for DVMA. 398 * Those bus controllers should intercept these vectors and should 399 * *NEVER* call nexus_dmamap_load() which is used only by devices that 400 * bypass DVMA. 401 */ 402static int 403nexus_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 404 void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback, 405 void *callback_arg, int flags) 406{ 407#ifdef __GNUC__ 408 bus_dma_segment_t dm_segments[ddmat->dt_nsegments]; 409#else 410 bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS]; 411#endif 412 bus_addr_t lastaddr; 413 int error, nsegs; 414 415 error = _nexus_dmamap_load_buffer(ddmat, dm_segments, buf, buflen, 416 NULL, flags, &lastaddr, &nsegs, 1); 417 418 if (error == 0) { 419 (*callback)(callback_arg, dm_segments, nsegs + 1, 0); 420 map->dm_loaded = 1; 421 } else 422 (*callback)(callback_arg, NULL, 0, error); 423 424 return (0); 425} 426 427/* 428 * Like nexus_dmamap_load(), but for mbufs. 429 */ 430static int 431nexus_dmamap_load_mbuf(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 432 bus_dmamap_t map, struct mbuf *m0, bus_dmamap_callback2_t *callback, 433 void *callback_arg, int flags) 434{ 435#ifdef __GNUC__ 436 bus_dma_segment_t dm_segments[ddmat->dt_nsegments]; 437#else 438 bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS]; 439#endif 440 int nsegs, error; 441 442 M_ASSERTPKTHDR(m0); 443 444 nsegs = 0; 445 error = 0; 446 if (m0->m_pkthdr.len <= ddmat->dt_maxsize) { 447 int first = 1; 448 bus_addr_t lastaddr = 0; 449 struct mbuf *m; 450 451 for (m = m0; m != NULL && error == 0; m = m->m_next) { 452 if (m->m_len > 0) { 453 error = _nexus_dmamap_load_buffer(ddmat, 454 dm_segments, m->m_data, m->m_len, NULL, 455 flags, &lastaddr, &nsegs, first); 456 first = 0; 457 } 458 } 459 } else { 460 error = EINVAL; 461 } 462 463 if (error) { 464 /* force "no valid mappings" in callback */ 465 (*callback)(callback_arg, dm_segments, 0, 0, error); 466 } else { 467 map->dm_loaded = 1; 468 (*callback)(callback_arg, dm_segments, nsegs + 1, 469 m0->m_pkthdr.len, error); 470 } 471 return (error); 472} 473 474/* 475 * Like nexus_dmamap_load(), but for uios. 476 */ 477static int 478nexus_dmamap_load_uio(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 479 bus_dmamap_t map, struct uio *uio, bus_dmamap_callback2_t *callback, 480 void *callback_arg, int flags) 481{ 482 bus_addr_t lastaddr; 483#ifdef __GNUC__ 484 bus_dma_segment_t dm_segments[ddmat->dt_nsegments]; 485#else 486 bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS]; 487#endif 488 int nsegs, error, first, i; 489 bus_size_t resid; 490 struct iovec *iov; 491 struct thread *td = NULL; 492 493 resid = uio->uio_resid; 494 iov = uio->uio_iov; 495 496 if (uio->uio_segflg == UIO_USERSPACE) { 497 td = uio->uio_td; 498 KASSERT(td != NULL, 499 ("nexus_dmamap_load_uio: USERSPACE but no proc")); 500 } 501 502 nsegs = 0; 503 error = 0; 504 first = 1; 505 for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) { 506 /* 507 * Now at the first iovec to load. Load each iovec 508 * until we have exhausted the residual count. 509 */ 510 bus_size_t minlen = 511 resid < iov[i].iov_len ? resid : iov[i].iov_len; 512 caddr_t addr = (caddr_t) iov[i].iov_base; 513 514 if (minlen > 0) { 515 error = _nexus_dmamap_load_buffer(ddmat, dm_segments, 516 addr, minlen, td, flags, &lastaddr, &nsegs, first); 517 first = 0; 518 519 resid -= minlen; 520 } 521 } 522 523 if (error) { 524 /* force "no valid mappings" in callback */ 525 (*callback)(callback_arg, dm_segments, 0, 0, error); 526 } else { 527 map->dm_loaded = 1; 528 (*callback)(callback_arg, dm_segments, nsegs + 1, 529 uio->uio_resid, error); 530 } 531 return (error); 532} 533 534/* 535 * Common function for unloading a DMA map. May be called by 536 * bus-specific DMA map unload functions. 537 */ 538static void 539nexus_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 540{ 541 542 map->dm_loaded = 0; 543} 544 545/* 546 * Common function for DMA map synchronization. May be called 547 * by bus-specific DMA map synchronization functions. 548 */ 549static void 550nexus_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 551 int op) 552{ 553 554 /* 555 * We sync out our caches, but the bus must do the same. 556 * 557 * Actually a #Sync is expensive. We should optimize. 558 */ 559 if ((op & BUS_DMASYNC_PREREAD) || (op & BUS_DMASYNC_PREWRITE)) { 560 /* 561 * Don't really need to do anything, but flush any pending 562 * writes anyway. 563 */ 564 membar(Sync); 565 } 566#if 0 567 /* Should not be needed. */ 568 if (op & BUS_DMASYNC_POSTREAD) { 569 ecache_flush((vm_offset_t)map->buf, 570 (vm_offset_t)map->buf + map->buflen - 1); 571 } 572#endif 573 if (op & BUS_DMASYNC_POSTWRITE) { 574 /* Nothing to do. Handled by the bus controller. */ 575 } 576} 577 578/* 579 * Helper functions for buses that use their private dmamem_alloc/dmamem_free 580 * versions. 581 * These differ from the dmamap_alloc() functions in that they create a tag 582 * that is specifically for use with dmamem_alloc'ed memory. 583 * These are primitive now, but I expect that some fields of the map will need 584 * to be filled soon. 585 */ 586int 587sparc64_dmamem_alloc_map(bus_dma_tag_t dmat, bus_dmamap_t *mapp) 588{ 589 590 *mapp = malloc(sizeof(**mapp), M_DEVBUF, M_NOWAIT | M_ZERO); 591 if (*mapp == NULL) 592 return (ENOMEM); 593 594 dmat->dt_map_count++; 595 sparc64_dmamap_init(*mapp); 596 return (0); 597} 598 599void 600sparc64_dmamem_free_map(bus_dma_tag_t dmat, bus_dmamap_t map) 601{ 602 603 free(map, M_DEVBUF); 604 dmat->dt_map_count--; 605} 606 607/* 608 * Common function for DMA-safe memory allocation. May be called 609 * by bus-specific DMA memory allocation functions. 610 */ 611static int 612nexus_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 613 int flags, bus_dmamap_t *mapp) 614{ 615 616 if ((ddmat->dt_maxsize <= PAGE_SIZE)) { 617 *vaddr = malloc(ddmat->dt_maxsize, M_DEVBUF, 618 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK); 619 } else { 620 /* 621 * XXX: Use contigmalloc until it is merged into this facility 622 * and handles multi-seg allocations. Nobody is doing multi-seg 623 * allocations yet though. 624 */ 625 mtx_lock(&Giant); 626 *vaddr = contigmalloc(ddmat->dt_maxsize, M_DEVBUF, 627 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK, 628 0ul, ddmat->dt_lowaddr, 629 ddmat->dt_alignment ? ddmat->dt_alignment : 1UL, 630 ddmat->dt_boundary); 631 mtx_unlock(&Giant); 632 } 633 if (*vaddr == NULL) { 634 free(*mapp, M_DEVBUF); 635 return (ENOMEM); 636 } 637 return (0); 638} 639 640/* 641 * Common function for freeing DMA-safe memory. May be called by 642 * bus-specific DMA memory free functions. 643 */ 644static void 645nexus_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 646 bus_dmamap_t map) 647{ 648 649 sparc64_dmamem_free_map(ddmat, map); 650 if ((ddmat->dt_maxsize <= PAGE_SIZE)) 651 free(vaddr, M_DEVBUF); 652 else { 653 mtx_lock(&Giant); 654 contigfree(vaddr, ddmat->dt_maxsize, M_DEVBUF); 655 mtx_unlock(&Giant); 656 } 657} 658 659struct bus_dma_tag nexus_dmatag = { 660 NULL, 661 NULL, 662 8, 663 0, 664 0, 665 0x3ffffffff, 666 NULL, /* XXX */ 667 NULL, 668 0x3ffffffff, /* XXX */ 669 0xff, /* XXX */ 670 0xffffffff, /* XXX */ 671 0, 672 0, 673 0, 674 nexus_dmamap_create, 675 nexus_dmamap_destroy, 676 nexus_dmamap_load, 677 nexus_dmamap_load_mbuf, 678 nexus_dmamap_load_uio, 679 nexus_dmamap_unload, 680 nexus_dmamap_sync, 681 682 nexus_dmamem_alloc, 683 nexus_dmamem_free, 684}; 685 686/* 687 * Helpers to map/unmap bus memory 688 */ 689int 690sparc64_bus_mem_map(bus_space_tag_t tag, bus_space_handle_t handle, 691 bus_size_t size, int flags, vm_offset_t vaddr, void **hp) 692{ 693 vm_offset_t addr; 694 vm_offset_t sva; 695 vm_offset_t va; 696 vm_paddr_t pa; 697 vm_size_t vsz; 698 u_long pm_flags; 699 700 addr = (vm_offset_t)handle; 701 size = round_page(size); 702 if (size == 0) { 703 printf("sparc64_bus_map: zero size\n"); 704 return (EINVAL); 705 } 706 switch (tag->bst_type) { 707 case PCI_CONFIG_BUS_SPACE: 708 case PCI_IO_BUS_SPACE: 709 case PCI_MEMORY_BUS_SPACE: 710 pm_flags = TD_IE; 711 break; 712 default: 713 pm_flags = 0; 714 break; 715 } 716 717 if (!(flags & BUS_SPACE_MAP_CACHEABLE)) 718 pm_flags |= TD_E; 719 720 if (vaddr != NULL) 721 sva = trunc_page(vaddr); 722 else { 723 if ((sva = kmem_alloc_nofault(kernel_map, size)) == NULL) 724 panic("sparc64_bus_map: cannot allocate virtual " 725 "memory"); 726 } 727 728 /* Preserve page offset. */ 729 *hp = (void *)(sva | ((u_long)addr & PAGE_MASK)); 730 731 pa = trunc_page(addr); 732 if ((flags & BUS_SPACE_MAP_READONLY) == 0) 733 pm_flags |= TD_W; 734 735 va = sva; 736 vsz = size; 737 do { 738 pmap_kenter_flags(va, pa, pm_flags); 739 va += PAGE_SIZE; 740 pa += PAGE_SIZE; 741 } while ((vsz -= PAGE_SIZE) > 0); 742 tlb_range_demap(kernel_pmap, sva, sva + size - 1); 743 return (0); 744} 745 746int 747sparc64_bus_mem_unmap(void *bh, bus_size_t size) 748{ 749 vm_offset_t sva; 750 vm_offset_t va; 751 vm_offset_t endva; 752 753 sva = trunc_page((vm_offset_t)bh); 754 endva = sva + round_page(size); 755 for (va = sva; va < endva; va += PAGE_SIZE) 756 pmap_kremove_flags(va); 757 tlb_range_demap(kernel_pmap, sva, sva + size - 1); 758 kmem_free(kernel_map, sva, size); 759 return (0); 760} 761 762/* 763 * Fake up a bus tag, for use by console drivers in early boot when the regular 764 * means to allocate resources are not yet available. 765 * Note that these tags are not eligible for bus_space_barrier operations. 766 * Addr is the physical address of the desired start of the handle. 767 */ 768bus_space_handle_t 769sparc64_fake_bustag(int space, bus_addr_t addr, struct bus_space_tag *ptag) 770{ 771 772 ptag->bst_cookie = NULL; 773 ptag->bst_parent = NULL; 774 ptag->bst_type = space; 775 ptag->bst_bus_barrier = NULL; 776 return (addr); 777} 778 779/* 780 * Base bus space handlers. 781 */ 782static void nexus_bus_barrier(bus_space_tag_t, bus_space_handle_t, 783 bus_size_t, bus_size_t, int); 784 785static void 786nexus_bus_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset, 787 bus_size_t size, int flags) 788{ 789 790 /* 791 * We have lots of alternatives depending on whether we're 792 * synchronizing loads with loads, loads with stores, stores 793 * with loads, or stores with stores. The only ones that seem 794 * generic are #Sync and #MemIssue. I'll use #Sync for safety. 795 */ 796 switch(flags) { 797 case BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE: 798 case BUS_SPACE_BARRIER_READ: 799 case BUS_SPACE_BARRIER_WRITE: 800 membar(Sync); 801 break; 802 default: 803 panic("sparc64_bus_barrier: unknown flags"); 804 } 805 return; 806} 807 808struct bus_space_tag nexus_bustag = { 809 NULL, /* cookie */ 810 NULL, /* parent bus tag */ 811 UPA_BUS_SPACE, /* type */ 812 nexus_bus_barrier, /* bus_space_barrier */ 813}; 814