bus_machdep.c revision 112196
1/*-
2 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
7 * NASA Ames Research Center.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by the NetBSD
20 *	Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 *    contributors may be used to endorse or promote products derived
23 *    from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37/*
38 * Copyright (c) 1992, 1993
39 *	The Regents of the University of California.  All rights reserved.
40 *
41 * This software was developed by the Computer Systems Engineering group
42 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
43 * contributed to Berkeley.
44 *
45 * All advertising materials mentioning features or use of this software
46 * must display the following acknowledgement:
47 *	This product includes software developed by the University of
48 *	California, Lawrence Berkeley Laboratory.
49 *
50 * Redistribution and use in source and binary forms, with or without
51 * modification, are permitted provided that the following conditions
52 * are met:
53 * 1. Redistributions of source code must retain the above copyright
54 *    notice, this list of conditions and the following disclaimer.
55 * 2. Redistributions in binary form must reproduce the above copyright
56 *    notice, this list of conditions and the following disclaimer in the
57 *    documentation and/or other materials provided with the distribution.
58 * 3. All advertising materials mentioning features or use of this software
59 *    must display the following acknowledgement:
60 *	This product includes software developed by the University of
61 *	California, Berkeley and its contributors.
62 * 4. Neither the name of the University nor the names of its contributors
63 *    may be used to endorse or promote products derived from this software
64 *    without specific prior written permission.
65 *
66 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
67 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
69 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
72 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
73 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
74 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
75 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
76 * SUCH DAMAGE.
77 */
78/*
79 * Copyright (c) 1997, 1998 Justin T. Gibbs.
80 * All rights reserved.
81 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>.  All rights reserved.
82 *
83 * Redistribution and use in source and binary forms, with or without
84 * modification, are permitted provided that the following conditions
85 * are met:
86 * 1. Redistributions of source code must retain the above copyright
87 *    notice, this list of conditions, and the following disclaimer,
88 *    without modification, immediately at the beginning of the file.
89 * 2. The name of the author may not be used to endorse or promote products
90 *    derived from this software without specific prior written permission.
91 *
92 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
93 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
94 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
95 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
96 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
97 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
98 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
99 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
100 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
101 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
102 * SUCH DAMAGE.
103 *
104 *	from: @(#)machdep.c	8.6 (Berkeley) 1/14/94
105 *	from: NetBSD: machdep.c,v 1.111 2001/09/15 07:13:40 eeh Exp
106 *	and
107 * 	from: FreeBSD: src/sys/i386/i386/busdma_machdep.c,v 1.24 2001/08/15
108 *
109 * $FreeBSD: head/sys/sparc64/sparc64/bus_machdep.c 112196 2003-03-13 17:18:48Z mux $
110 */
111
112#include <sys/param.h>
113#include <sys/bus.h>
114#include <sys/malloc.h>
115#include <sys/mbuf.h>
116#include <sys/proc.h>
117#include <sys/smp.h>
118#include <sys/systm.h>
119#include <sys/uio.h>
120
121#include <vm/vm.h>
122#include <vm/vm_extern.h>
123#include <vm/vm_kern.h>
124#include <vm/vm_page.h>
125#include <vm/vm_param.h>
126#include <vm/vm_map.h>
127
128#include <machine/asi.h>
129#include <machine/bus.h>
130#include <machine/bus_private.h>
131#include <machine/cache.h>
132#include <machine/smp.h>
133#include <machine/tlb.h>
134
135/* ASI's for bus access. */
136int bus_type_asi[] = {
137	ASI_PHYS_BYPASS_EC_WITH_EBIT,		/* UPA */
138	ASI_PHYS_BYPASS_EC_WITH_EBIT,		/* SBUS */
139	ASI_PHYS_BYPASS_EC_WITH_EBIT_L,		/* PCI configuration space */
140	ASI_PHYS_BYPASS_EC_WITH_EBIT_L,		/* PCI memory space */
141	ASI_PHYS_BYPASS_EC_WITH_EBIT_L,		/* PCI I/O space */
142	0
143};
144
145int bus_stream_asi[] = {
146	ASI_PHYS_BYPASS_EC_WITH_EBIT,		/* UPA */
147	ASI_PHYS_BYPASS_EC_WITH_EBIT,		/* SBUS */
148	ASI_PHYS_BYPASS_EC_WITH_EBIT,		/* PCI configuration space */
149	ASI_PHYS_BYPASS_EC_WITH_EBIT,		/* PCI memory space */
150	ASI_PHYS_BYPASS_EC_WITH_EBIT,		/* PCI I/O space */
151	0
152};
153
154/*
155 * busdma support code.
156 * Note: there is no support for bounce buffers yet.
157 */
158
159static int nexus_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int,
160    bus_dmamap_t *);
161static int nexus_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
162static int nexus_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
163    void *, bus_size_t, bus_dmamap_callback_t *, void *, int);
164static int nexus_dmamap_load_mbuf(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
165    struct mbuf *, bus_dmamap_callback2_t *, void *, int);
166static int nexus_dmamap_load_uio(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
167    struct uio *, bus_dmamap_callback2_t *, void *, int);
168static void nexus_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
169static void nexus_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
170    bus_dmasync_op_t);
171static int nexus_dmamem_alloc_size(bus_dma_tag_t, bus_dma_tag_t, void **, int,
172    bus_dmamap_t *, u_long size);
173static int nexus_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int,
174    bus_dmamap_t *);
175static void nexus_dmamem_free_size(bus_dma_tag_t, bus_dma_tag_t, void *,
176    bus_dmamap_t, u_long size);
177static void nexus_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *,
178    bus_dmamap_t);
179
180/*
181 * Since there is now way for a device to obtain a dma tag from its parent
182 * we use this kluge to handle different the different supported bus systems.
183 * The sparc64_root_dma_tag is used as parent for tags that have none, so that
184 * the correct methods will be used.
185 */
186bus_dma_tag_t sparc64_root_dma_tag;
187
188/*
189 * Allocate a device specific dma_tag.
190 */
191int
192bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
193    bus_size_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
194    bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
195    int nsegments, bus_size_t maxsegsz, int flags, bus_dma_tag_t *dmat)
196{
197
198	bus_dma_tag_t newtag;
199
200	/* Return a NULL tag on failure */
201	*dmat = NULL;
202
203	newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
204	if (newtag == NULL)
205		return (ENOMEM);
206
207	newtag->dt_parent = parent != NULL ? parent : sparc64_root_dma_tag;
208	newtag->dt_alignment = alignment;
209	newtag->dt_boundary = boundary;
210	newtag->dt_lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
211	newtag->dt_highaddr = trunc_page((vm_offset_t)highaddr) +
212	    (PAGE_SIZE - 1);
213	newtag->dt_filter = filter;
214	newtag->dt_filterarg = filterarg;
215	newtag->dt_maxsize = maxsize;
216	newtag->dt_nsegments = nsegments;
217	newtag->dt_maxsegsz = maxsegsz;
218	newtag->dt_flags = flags;
219	newtag->dt_ref_count = 1; /* Count ourselves */
220	newtag->dt_map_count = 0;
221
222	newtag->dt_dmamap_create = NULL;
223	newtag->dt_dmamap_destroy = NULL;
224	newtag->dt_dmamap_load = NULL;
225	newtag->dt_dmamap_load_mbuf = NULL;
226	newtag->dt_dmamap_load_uio = NULL;
227	newtag->dt_dmamap_unload = NULL;
228	newtag->dt_dmamap_sync = NULL;
229	newtag->dt_dmamem_alloc_size = NULL;
230	newtag->dt_dmamem_alloc = NULL;
231	newtag->dt_dmamem_free_size = NULL;
232	newtag->dt_dmamem_free = NULL;
233
234	/* Take into account any restrictions imposed by our parent tag */
235	if (parent != NULL) {
236		newtag->dt_lowaddr = ulmin(parent->dt_lowaddr,
237		    newtag->dt_lowaddr);
238		newtag->dt_highaddr = ulmax(parent->dt_highaddr,
239		    newtag->dt_highaddr);
240		/*
241		 * XXX Not really correct??? Probably need to honor boundary
242		 *     all the way up the inheritence chain.
243		 */
244		newtag->dt_boundary = ulmin(parent->dt_boundary,
245		    newtag->dt_boundary);
246	}
247	newtag->dt_parent->dt_ref_count++;
248
249	*dmat = newtag;
250	return (0);
251}
252
253int
254bus_dma_tag_destroy(bus_dma_tag_t dmat)
255{
256	bus_dma_tag_t parent;
257
258	if (dmat != NULL) {
259		if (dmat->dt_map_count != 0)
260			return (EBUSY);
261		while (dmat != NULL) {
262			parent = dmat->dt_parent;
263			dmat->dt_ref_count--;
264			if (dmat->dt_ref_count == 0) {
265				free(dmat, M_DEVBUF);
266				/*
267				 * Last reference count, so
268				 * release our reference
269				 * count on our parent.
270				 */
271				dmat = parent;
272			} else
273				dmat = NULL;
274		}
275	}
276	return (0);
277}
278
279/*
280 * Common function for DMA map creation.  May be called by bus-specific
281 * DMA map creation functions.
282 */
283static int
284nexus_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags,
285    bus_dmamap_t *mapp)
286{
287
288	*mapp = malloc(sizeof(**mapp), M_DEVBUF, M_NOWAIT | M_ZERO);
289	if (*mapp != NULL) {
290		ddmat->dt_map_count++;
291		sparc64_dmamap_init(*mapp);
292		return (0);
293	} else
294		return (ENOMEM);
295}
296
297/*
298 * Common function for DMA map destruction.  May be called by bus-specific
299 * DMA map destruction functions.
300 */
301static int
302nexus_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map)
303{
304
305	free(map, M_DEVBUF);
306	ddmat->dt_map_count--;
307	return (0);
308}
309
310/*
311 * Utility function to load a linear buffer.  lastaddrp holds state
312 * between invocations (for multiple-buffer loads).  segp contains
313 * the starting segment on entrace, and the ending segment on exit.
314 * first indicates if this is the first invocation of this function.
315 */
316static int
317_nexus_dmamap_load_buffer(bus_dma_tag_t ddmat, bus_dma_segment_t segs[],
318    void *buf, bus_size_t buflen, struct thread *td, int flags,
319    vm_offset_t *lastaddrp, int *segp, int first)
320{
321	bus_size_t sgsize;
322	bus_addr_t curaddr, lastaddr, baddr, bmask;
323	vm_offset_t vaddr = (vm_offset_t)buf;
324	int seg;
325	pmap_t pmap;
326
327	if (td != NULL)
328		pmap = vmspace_pmap(td->td_proc->p_vmspace);
329	else
330		pmap = NULL;
331
332	lastaddr = *lastaddrp;
333	bmask  = ~(ddmat->dt_boundary - 1);
334
335	for (seg = *segp; buflen > 0 ; ) {
336		/*
337		 * Get the physical address for this segment.
338		 */
339		if (pmap)
340			curaddr = pmap_extract(pmap, vaddr);
341		else
342			curaddr = pmap_kextract(vaddr);
343
344		/*
345		 * Compute the segment size, and adjust counts.
346		 */
347		sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
348		if (buflen < sgsize)
349			sgsize = buflen;
350
351		/*
352		 * Make sure we don't cross any boundaries.
353		 */
354		if (ddmat->dt_boundary > 0) {
355			baddr = (curaddr + ddmat->dt_boundary) & bmask;
356			if (sgsize > (baddr - curaddr))
357				sgsize = (baddr - curaddr);
358		}
359
360		/*
361		 * Insert chunk into a segment, coalescing with
362		 * previous segment if possible.
363		 */
364		if (first) {
365			segs[seg].ds_addr = curaddr;
366			segs[seg].ds_len = sgsize;
367			first = 0;
368		} else {
369			if (curaddr == lastaddr &&
370			    (segs[seg].ds_len + sgsize) <= ddmat->dt_maxsegsz &&
371			    (ddmat->dt_boundary == 0 ||
372			     (segs[seg].ds_addr & bmask) == (curaddr & bmask)))
373				segs[seg].ds_len += sgsize;
374			else {
375				if (++seg >= ddmat->dt_nsegments)
376					break;
377				segs[seg].ds_addr = curaddr;
378				segs[seg].ds_len = sgsize;
379			}
380		}
381
382		lastaddr = curaddr + sgsize;
383		vaddr += sgsize;
384		buflen -= sgsize;
385	}
386
387	*segp = seg;
388	*lastaddrp = lastaddr;
389
390	/*
391	 * Did we fit?
392	 */
393	return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */
394}
395
396/*
397 * Common function for loading a DMA map with a linear buffer.  May
398 * be called by bus-specific DMA map load functions.
399 *
400 * Most SPARCs have IOMMUs in the bus controllers.  In those cases
401 * they only need one segment and will use virtual addresses for DVMA.
402 * Those bus controllers should intercept these vectors and should
403 * *NEVER* call nexus_dmamap_load() which is used only by devices that
404 * bypass DVMA.
405 */
406static int
407nexus_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map,
408    void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback,
409    void *callback_arg, int flags)
410{
411#ifdef __GNUC__
412	bus_dma_segment_t dm_segments[ddmat->dt_nsegments];
413#else
414	bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
415#endif
416	vm_offset_t lastaddr;
417	int error, nsegs;
418
419	error = _nexus_dmamap_load_buffer(ddmat, dm_segments, buf, buflen,
420	    NULL, flags, &lastaddr, &nsegs, 1);
421
422	if (error == 0) {
423		(*callback)(callback_arg, dm_segments, nsegs + 1, 0);
424		map->dm_loaded = 1;
425	} else
426		(*callback)(callback_arg, NULL, 0, error);
427
428	return (0);
429}
430
431/*
432 * Like nexus_dmamap_load(), but for mbufs.
433 */
434static int
435nexus_dmamap_load_mbuf(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat,
436    bus_dmamap_t map, struct mbuf *m0, bus_dmamap_callback2_t *callback,
437    void *callback_arg, int flags)
438{
439#ifdef __GNUC__
440	bus_dma_segment_t dm_segments[ddmat->dt_nsegments];
441#else
442	bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
443#endif
444	int nsegs, error;
445
446	KASSERT(m0->m_flags & M_PKTHDR,
447		("nexus_dmamap_load_mbuf: no packet header"));
448
449	nsegs = 0;
450	error = 0;
451	if (m0->m_pkthdr.len <= ddmat->dt_maxsize) {
452		int first = 1;
453		vm_offset_t lastaddr = 0;
454		struct mbuf *m;
455
456		for (m = m0; m != NULL && error == 0; m = m->m_next) {
457			if (m->m_len > 0) {
458				error = _nexus_dmamap_load_buffer(ddmat,
459				    dm_segments, m->m_data, m->m_len, NULL,
460				    flags, &lastaddr, &nsegs, first);
461				first = 0;
462			}
463		}
464	} else {
465		error = EINVAL;
466	}
467
468	if (error) {
469		/* force "no valid mappings" in callback */
470		(*callback)(callback_arg, dm_segments, 0, 0, error);
471	} else {
472		map->dm_loaded = 1;
473		(*callback)(callback_arg, dm_segments, nsegs + 1,
474		    m0->m_pkthdr.len, error);
475	}
476	return (error);
477}
478
479/*
480 * Like nexus_dmamap_load(), but for uios.
481 */
482static int
483nexus_dmamap_load_uio(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat,
484    bus_dmamap_t map, struct uio *uio, bus_dmamap_callback2_t *callback,
485    void *callback_arg, int flags)
486{
487	vm_offset_t lastaddr;
488#ifdef __GNUC__
489	bus_dma_segment_t dm_segments[ddmat->dt_nsegments];
490#else
491	bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
492#endif
493	int nsegs, error, first, i;
494	bus_size_t resid;
495	struct iovec *iov;
496	struct thread *td = NULL;
497
498	resid = uio->uio_resid;
499	iov = uio->uio_iov;
500
501	if (uio->uio_segflg == UIO_USERSPACE) {
502		td = uio->uio_td;
503		KASSERT(td != NULL,
504			("nexus_dmamap_load_uio: USERSPACE but no proc"));
505	}
506
507	nsegs = 0;
508	error = 0;
509	first = 1;
510	for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) {
511		/*
512		 * Now at the first iovec to load.  Load each iovec
513		 * until we have exhausted the residual count.
514		 */
515		bus_size_t minlen =
516			resid < iov[i].iov_len ? resid : iov[i].iov_len;
517		caddr_t addr = (caddr_t) iov[i].iov_base;
518
519		if (minlen > 0) {
520			error = _nexus_dmamap_load_buffer(ddmat, dm_segments,
521			    addr, minlen, td, flags, &lastaddr, &nsegs, first);
522			first = 0;
523
524			resid -= minlen;
525		}
526	}
527
528	if (error) {
529		/* force "no valid mappings" in callback */
530		(*callback)(callback_arg, dm_segments, 0, 0, error);
531	} else {
532		map->dm_loaded = 1;
533		(*callback)(callback_arg, dm_segments, nsegs + 1,
534		    uio->uio_resid, error);
535	}
536	return (error);
537}
538
539/*
540 * Common function for unloading a DMA map.  May be called by
541 * bus-specific DMA map unload functions.
542 */
543static void
544nexus_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map)
545{
546
547	map->dm_loaded = 0;
548}
549
550/*
551 * Common function for DMA map synchronization.  May be called
552 * by bus-specific DMA map synchronization functions.
553 */
554static void
555nexus_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map,
556    bus_dmasync_op_t op)
557{
558
559	/*
560	 * We sync out our caches, but the bus must do the same.
561	 *
562	 * Actually a #Sync is expensive.  We should optimize.
563	 */
564	if ((op == BUS_DMASYNC_PREREAD) || (op == BUS_DMASYNC_PREWRITE)) {
565		/*
566		 * Don't really need to do anything, but flush any pending
567		 * writes anyway.
568		 */
569		membar(Sync);
570	}
571#if 0
572	/* Should not be needed. */
573	if (op == BUS_DMASYNC_POSTREAD) {
574		ecache_flush((vm_offset_t)map->buf,
575		    (vm_offset_t)map->buf + map->buflen - 1);
576	}
577#endif
578	if (op == BUS_DMASYNC_POSTWRITE) {
579		/* Nothing to do.  Handled by the bus controller. */
580	}
581}
582
583/*
584 * Helper functions for buses that use their private dmamem_alloc/dmamem_free
585 * versions.
586 * These differ from the dmamap_alloc() functions in that they create a tag
587 * that is specifically for use with dmamem_alloc'ed memory.
588 * These are primitive now, but I expect that some fields of the map will need
589 * to be filled soon.
590 */
591int
592sparc64_dmamem_alloc_map(bus_dma_tag_t dmat, bus_dmamap_t *mapp)
593{
594
595	*mapp = malloc(sizeof(**mapp), M_DEVBUF, M_NOWAIT | M_ZERO);
596	if (*mapp == NULL)
597		return (ENOMEM);
598
599	dmat->dt_map_count++;
600	sparc64_dmamap_init(*mapp);
601	return (0);
602}
603
604void
605sparc64_dmamem_free_map(bus_dma_tag_t dmat, bus_dmamap_t map)
606{
607
608	free(map, M_DEVBUF);
609	dmat->dt_map_count--;
610}
611
612/*
613 * Common function for DMA-safe memory allocation.  May be called
614 * by bus-specific DMA memory allocation functions.
615 */
616static int
617nexus_dmamem_alloc_size(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr,
618    int flags, bus_dmamap_t *mapp, bus_size_t size)
619{
620
621	if (size > ddmat->dt_maxsize)
622		return (ENOMEM);
623
624	if ((size <= PAGE_SIZE)) {
625		*vaddr = malloc(size, M_DEVBUF,
626		    (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK);
627	} else {
628		/*
629		 * XXX: Use contigmalloc until it is merged into this facility
630		 * and handles multi-seg allocations.  Nobody is doing multi-seg
631		 * allocations yet though.
632		 */
633		mtx_lock(&Giant);
634		*vaddr = contigmalloc(size, M_DEVBUF,
635		    (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK,
636		    0ul, ddmat->dt_lowaddr,
637		    ddmat->dt_alignment ? ddmat->dt_alignment : 1UL,
638		    ddmat->dt_boundary);
639		mtx_unlock(&Giant);
640	}
641	if (*vaddr == NULL) {
642		free(*mapp, M_DEVBUF);
643		return (ENOMEM);
644	}
645	return (0);
646}
647
648static int
649nexus_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr,
650    int flags, bus_dmamap_t *mapp)
651{
652	return (sparc64_dmamem_alloc_size(pdmat, ddmat, vaddr, flags, mapp,
653		ddmat->dt_maxsize));
654}
655
656/*
657 * Common function for freeing DMA-safe memory.  May be called by
658 * bus-specific DMA memory free functions.
659 */
660static void
661nexus_dmamem_free_size(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr,
662    bus_dmamap_t map, bus_size_t size)
663{
664
665	sparc64_dmamem_free_map(ddmat, map);
666	if ((size <= PAGE_SIZE))
667		free(vaddr, M_DEVBUF);
668	else {
669		mtx_lock(&Giant);
670		contigfree(vaddr, size, M_DEVBUF);
671		mtx_unlock(&Giant);
672	}
673}
674
675static void
676nexus_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr,
677    bus_dmamap_t map)
678{
679	sparc64_dmamem_free_size(pdmat, ddmat, vaddr, map, ddmat->dt_maxsize);
680}
681
682struct bus_dma_tag nexus_dmatag = {
683	NULL,
684	NULL,
685	8,
686	0,
687	0,
688	0x3ffffffff,
689	NULL,		/* XXX */
690	NULL,
691	0x3ffffffff,	/* XXX */
692	0xff,		/* XXX */
693	0xffffffff,	/* XXX */
694	0,
695	0,
696	0,
697	nexus_dmamap_create,
698	nexus_dmamap_destroy,
699	nexus_dmamap_load,
700	nexus_dmamap_load_mbuf,
701	nexus_dmamap_load_uio,
702	nexus_dmamap_unload,
703	nexus_dmamap_sync,
704
705	nexus_dmamem_alloc_size,
706	nexus_dmamem_alloc,
707	nexus_dmamem_free_size,
708	nexus_dmamem_free,
709};
710
711/*
712 * Helpers to map/unmap bus memory
713 */
714int
715sparc64_bus_mem_map(bus_space_tag_t tag, bus_space_handle_t handle,
716    bus_size_t size, int flags, vm_offset_t vaddr, void **hp)
717{
718	vm_offset_t addr;
719	vm_offset_t sva;
720	vm_offset_t va;
721	vm_offset_t pa;
722	vm_size_t vsz;
723	u_long pm_flags;
724
725	addr = (vm_offset_t)handle;
726	size = round_page(size);
727	if (size == 0) {
728		printf("sparc64_bus_map: zero size\n");
729		return (EINVAL);
730	}
731	switch (tag->bst_type) {
732	case PCI_CONFIG_BUS_SPACE:
733	case PCI_IO_BUS_SPACE:
734	case PCI_MEMORY_BUS_SPACE:
735		pm_flags = TD_IE;
736		break;
737	default:
738		pm_flags = 0;
739		break;
740	}
741
742	if (!(flags & BUS_SPACE_MAP_CACHEABLE))
743		pm_flags |= TD_E;
744
745	if (vaddr != NULL)
746		sva = trunc_page(vaddr);
747	else {
748		if ((sva = kmem_alloc_nofault(kernel_map, size)) == NULL)
749			panic("sparc64_bus_map: cannot allocate virtual "
750			    "memory");
751	}
752
753	/* Preserve page offset. */
754	*hp = (void *)(sva | ((u_long)addr & PAGE_MASK));
755
756	pa = trunc_page(addr);
757	if ((flags & BUS_SPACE_MAP_READONLY) == 0)
758		pm_flags |= TD_W;
759
760	va = sva;
761	vsz = size;
762	do {
763		pmap_kenter_flags(va, pa, pm_flags);
764		va += PAGE_SIZE;
765		pa += PAGE_SIZE;
766	} while ((vsz -= PAGE_SIZE) > 0);
767	tlb_range_demap(kernel_pmap, sva, sva + size - 1);
768	return (0);
769}
770
771int
772sparc64_bus_mem_unmap(void *bh, bus_size_t size)
773{
774	vm_offset_t sva;
775	vm_offset_t va;
776	vm_offset_t endva;
777
778	sva = trunc_page((vm_offset_t)bh);
779	endva = sva + round_page(size);
780	for (va = sva; va < endva; va += PAGE_SIZE)
781		pmap_kremove_flags(va);
782	tlb_range_demap(kernel_pmap, sva, sva + size - 1);
783	kmem_free(kernel_map, sva, size);
784	return (0);
785}
786
787/*
788 * Fake up a bus tag, for use by console drivers in early boot when the regular
789 * means to allocate resources are not yet available.
790 * Note that these tags are not eligible for bus_space_barrier operations.
791 * Addr is the physical address of the desired start of the handle.
792 */
793bus_space_handle_t
794sparc64_fake_bustag(int space, bus_addr_t addr, struct bus_space_tag *ptag)
795{
796
797	ptag->bst_cookie = NULL;
798	ptag->bst_parent = NULL;
799	ptag->bst_type = space;
800	ptag->bst_bus_barrier = NULL;
801	return (addr);
802}
803
804/*
805 * Base bus space handlers.
806 */
807static void nexus_bus_barrier(bus_space_tag_t, bus_space_handle_t,
808    bus_size_t, bus_size_t, int);
809
810static void
811nexus_bus_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,
812    bus_size_t size, int flags)
813{
814
815	/*
816	 * We have lots of alternatives depending on whether we're
817	 * synchronizing loads with loads, loads with stores, stores
818	 * with loads, or stores with stores.  The only ones that seem
819	 * generic are #Sync and #MemIssue.  I'll use #Sync for safety.
820	 */
821	switch(flags) {
822	case BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE:
823	case BUS_SPACE_BARRIER_READ:
824	case BUS_SPACE_BARRIER_WRITE:
825		membar(Sync);
826		break;
827	default:
828		panic("sparc64_bus_barrier: unknown flags");
829	}
830	return;
831}
832
833struct bus_space_tag nexus_bustag = {
834	NULL,				/* cookie */
835	NULL,				/* parent bus tag */
836	UPA_BUS_SPACE,			/* type */
837	nexus_bus_barrier,		/* bus_space_barrier */
838};
839