psycho.c revision 139825
1/*- 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 30 * 31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 139825 2005-01-07 02:29:27Z imp $ 32 */ 33 34/* 35 * Support for `psycho' and `psycho+' UPA to PCI bridge and 36 * UltraSPARC IIi and IIe `sabre' PCI controllers. 37 */ 38 39#include "opt_ofw_pci.h" 40#include "opt_psycho.h" 41 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/bus.h> 45#include <sys/kdb.h> 46#include <sys/kernel.h> 47#include <sys/module.h> 48#include <sys/malloc.h> 49#include <sys/pcpu.h> 50 51#include <dev/ofw/ofw_bus.h> 52#include <dev/ofw/ofw_pci.h> 53#include <dev/ofw/openfirm.h> 54 55#include <machine/bus.h> 56#include <machine/bus_private.h> 57#include <machine/iommureg.h> 58#include <machine/bus_common.h> 59#include <machine/frame.h> 60#include <machine/intr_machdep.h> 61#include <machine/nexusvar.h> 62#include <machine/ofw_bus.h> 63#include <machine/ofw_upa.h> 64#include <machine/resource.h> 65 66#include <sys/rman.h> 67 68#include <machine/iommuvar.h> 69 70#include <dev/pci/pcivar.h> 71#include <dev/pci/pcireg.h> 72 73#include <sparc64/pci/ofw_pci.h> 74#include <sparc64/pci/psychoreg.h> 75#include <sparc64/pci/psychovar.h> 76 77#include "pcib_if.h" 78 79static void psycho_set_intr(struct psycho_softc *, int, device_t, bus_addr_t, 80 int, driver_intr_t); 81static int psycho_find_intrmap(struct psycho_softc *, int, bus_addr_t *, 82 bus_addr_t *, u_long *); 83static void psycho_intr_stub(void *); 84static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int); 85 86/* Interrupt handlers */ 87static void psycho_ue(void *); 88static void psycho_ce(void *); 89static void psycho_bus_a(void *); 90static void psycho_bus_b(void *); 91static void psycho_powerfail(void *); 92#ifdef PSYCHO_MAP_WAKEUP 93static void psycho_wakeup(void *); 94#endif 95 96/* IOMMU support */ 97static void psycho_iommu_init(struct psycho_softc *, int); 98 99/* 100 * Methods. 101 */ 102static device_probe_t psycho_probe; 103static device_attach_t psycho_attach; 104static bus_read_ivar_t psycho_read_ivar; 105static bus_setup_intr_t psycho_setup_intr; 106static bus_teardown_intr_t psycho_teardown_intr; 107static bus_alloc_resource_t psycho_alloc_resource; 108static bus_activate_resource_t psycho_activate_resource; 109static bus_deactivate_resource_t psycho_deactivate_resource; 110static bus_release_resource_t psycho_release_resource; 111static pcib_maxslots_t psycho_maxslots; 112static pcib_read_config_t psycho_read_config; 113static pcib_write_config_t psycho_write_config; 114static pcib_route_interrupt_t psycho_route_interrupt; 115static ofw_pci_intr_pending_t psycho_intr_pending; 116static ofw_pci_get_bus_handle_t psycho_get_bus_handle; 117static ofw_bus_get_node_t psycho_get_node; 118static ofw_pci_adjust_busrange_t psycho_adjust_busrange; 119 120static device_method_t psycho_methods[] = { 121 /* Device interface */ 122 DEVMETHOD(device_probe, psycho_probe), 123 DEVMETHOD(device_attach, psycho_attach), 124 125 /* Bus interface */ 126 DEVMETHOD(bus_print_child, bus_generic_print_child), 127 DEVMETHOD(bus_read_ivar, psycho_read_ivar), 128 DEVMETHOD(bus_setup_intr, psycho_setup_intr), 129 DEVMETHOD(bus_teardown_intr, psycho_teardown_intr), 130 DEVMETHOD(bus_alloc_resource, psycho_alloc_resource), 131 DEVMETHOD(bus_activate_resource, psycho_activate_resource), 132 DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource), 133 DEVMETHOD(bus_release_resource, psycho_release_resource), 134 135 /* pcib interface */ 136 DEVMETHOD(pcib_maxslots, psycho_maxslots), 137 DEVMETHOD(pcib_read_config, psycho_read_config), 138 DEVMETHOD(pcib_write_config, psycho_write_config), 139 DEVMETHOD(pcib_route_interrupt, psycho_route_interrupt), 140 141 /* ofw_bus interface */ 142 DEVMETHOD(ofw_bus_get_node, psycho_get_node), 143 144 /* ofw_pci interface */ 145 DEVMETHOD(ofw_pci_intr_pending, psycho_intr_pending), 146 DEVMETHOD(ofw_pci_get_bus_handle, psycho_get_bus_handle), 147 DEVMETHOD(ofw_pci_adjust_busrange, psycho_adjust_busrange), 148 149 { 0, 0 } 150}; 151 152static driver_t psycho_driver = { 153 "pcib", 154 psycho_methods, 155 sizeof(struct psycho_softc), 156}; 157 158static devclass_t psycho_devclass; 159 160DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0); 161 162SLIST_HEAD(, psycho_softc) psycho_softcs = 163 SLIST_HEAD_INITIALIZER(psycho_softcs); 164 165struct psycho_clr { 166 struct psycho_softc *pci_sc; 167 bus_addr_t pci_clr; /* clear register */ 168 driver_intr_t *pci_handler; /* handler to call */ 169 void *pci_arg; /* argument for the handler */ 170 void *pci_cookie; /* interrupt cookie of parent bus */ 171}; 172 173struct psycho_strayclr { 174 struct psycho_softc *psc_sc; 175 bus_addr_t psc_clr; /* clear register */ 176}; 177 178#define PSYCHO_READ8(sc, off) \ 179 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 180#define PSYCHO_WRITE8(sc, off, v) \ 181 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 182#define PCICTL_READ8(sc, off) \ 183 PSYCHO_READ8((sc), (sc)->sc_pcictl + (off)) 184#define PCICTL_WRITE8(sc, off, v) \ 185 PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v)) 186 187/* 188 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 189 * single PCI bus and does not have a streaming buffer. It often has an APB 190 * (advanced PCI bridge) connected to it, which was designed specifically for 191 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 192 * appears as two "simba"'s underneath the sabre. 193 * 194 * "psycho" and "psycho+" are dual UPA to PCI bridges. They sit on the UPA bus 195 * and manage two PCI buses. "psycho" has two 64-bit 33MHz buses, while 196 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 197 * will usually find a "psycho+" since I don't think the original "psycho" 198 * ever shipped, and if it did it would be in the U30. 199 * 200 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 201 * both part of the same IC, they only have a single register space. As such, 202 * they need to be configured together, even though the autoconfiguration will 203 * attach them separately. 204 * 205 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 206 * as pci1 and pci2, although they have been implemented with other PCI bus 207 * numbers on some machines. 208 * 209 * On UltraII machines, there can be any number of "psycho+" ICs, each 210 * providing two PCI buses. 211 */ 212#ifdef DEBUGGER_ON_POWERFAIL 213#define PSYCHO_PWRFAIL_INT_FLAGS INTR_FAST 214#else 215#define PSYCHO_PWRFAIL_INT_FLAGS 0 216#endif 217 218#define OFW_PCI_TYPE "pci" 219 220struct psycho_desc { 221 char *pd_string; 222 int pd_mode; 223 char *pd_name; 224}; 225 226static struct psycho_desc psycho_compats[] = { 227 { "pci108e,8000", PSYCHO_MODE_PSYCHO, "Psycho compatible" }, 228 { "pci108e,a000", PSYCHO_MODE_SABRE, "Sabre (US-IIi) compatible" }, 229 { "pci108e,a001", PSYCHO_MODE_SABRE, "Sabre (US-IIe) compatible" }, 230 { NULL, 0, NULL } 231}; 232 233static struct psycho_desc psycho_models[] = { 234 { "SUNW,psycho", PSYCHO_MODE_PSYCHO, "Psycho" }, 235 { "SUNW,sabre", PSYCHO_MODE_SABRE, "Sabre" }, 236 { NULL, 0, NULL } 237}; 238 239static struct psycho_desc * 240psycho_find_desc(struct psycho_desc *table, char *string) 241{ 242 struct psycho_desc *desc; 243 244 for (desc = table; desc->pd_string != NULL; desc++) { 245 if (strcmp(desc->pd_string, string) == 0) 246 return (desc); 247 } 248 return (NULL); 249} 250 251static struct psycho_desc * 252psycho_get_desc(phandle_t node, char *model) 253{ 254 struct psycho_desc *rv; 255 char compat[32]; 256 257 rv = NULL; 258 if (model != NULL) 259 rv = psycho_find_desc(psycho_models, model); 260 if (rv == NULL && 261 OF_getprop(node, "compatible", compat, sizeof(compat)) != -1) 262 rv = psycho_find_desc(psycho_compats, compat); 263 return (rv); 264} 265 266static int 267psycho_probe(device_t dev) 268{ 269 phandle_t node; 270 char *dtype; 271 272 node = nexus_get_node(dev); 273 dtype = nexus_get_device_type(dev); 274 if (nexus_get_reg(dev) != NULL && dtype != NULL && 275 strcmp(dtype, OFW_PCI_TYPE) == 0 && 276 psycho_get_desc(node, nexus_get_model(dev)) != NULL) { 277 device_set_desc(dev, "U2P UPA-PCI bridge"); 278 return (0); 279 } 280 281 return (ENXIO); 282} 283 284static int 285psycho_attach(device_t dev) 286{ 287 struct psycho_softc *sc; 288 struct psycho_softc *osc = NULL; 289 struct psycho_softc *asc; 290 struct upa_regs *reg; 291 struct psycho_desc *desc; 292 phandle_t node; 293 u_int64_t csr; 294 u_long mlen; 295 int psycho_br[2]; 296 int n, i, nreg, rid; 297#ifdef PSYCHO_DEBUG 298 bus_addr_t map, clr; 299 u_int64_t mr; 300#endif 301 302 node = nexus_get_node(dev); 303 sc = device_get_softc(dev); 304 desc = psycho_get_desc(node, nexus_get_model(dev)); 305 306 sc->sc_node = node; 307 sc->sc_dev = dev; 308 sc->sc_dmatag = nexus_get_dmatag(dev); 309 sc->sc_mode = desc->pd_mode; 310 311 /* 312 * The psycho gets three register banks: 313 * (0) per-PBM configuration and status registers 314 * (1) per-PBM PCI configuration space, containing only the 315 * PBM 256-byte PCI header 316 * (2) the shared psycho configuration registers 317 */ 318 reg = nexus_get_reg(dev); 319 nreg = nexus_get_nreg(dev); 320 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 321 if (nreg <= 2) 322 panic("psycho_attach: %d not enough registers", nreg); 323 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[2]); 324 mlen = UPA_REG_SIZE(®[2]); 325 sc->sc_pcictl = UPA_REG_PHYS(®[0]) - sc->sc_basepaddr; 326 switch (sc->sc_pcictl) { 327 case PSR_PCICTL0: 328 sc->sc_half = 0; 329 break; 330 case PSR_PCICTL1: 331 sc->sc_half = 1; 332 break; 333 default: 334 panic("psycho_attach: bogus pci control register " 335 "location"); 336 } 337 } else { 338 if (nreg <= 0) 339 panic("psycho_attach: %d not enough registers", nreg); 340 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[0]); 341 mlen = UPA_REG_SIZE(reg); 342 sc->sc_pcictl = PSR_PCICTL0; 343 sc->sc_half = 0; 344 } 345 346 /* 347 * Match other psycho's that are already configured against 348 * the base physical address. This will be the same for a 349 * pair of devices that share register space. 350 */ 351 SLIST_FOREACH(asc, &psycho_softcs, sc_link) { 352 if (asc->sc_basepaddr == sc->sc_basepaddr) { 353 /* Found partner */ 354 osc = asc; 355 break; 356 } 357 } 358 359 if (osc == NULL) { 360 rid = 0; 361 sc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 362 sc->sc_basepaddr, sc->sc_basepaddr + mlen - 1, mlen, 363 RF_ACTIVE); 364 if (sc->sc_mem_res == NULL || 365 rman_get_start(sc->sc_mem_res) != sc->sc_basepaddr) 366 panic("psycho_attach: can't allocate device memory"); 367 sc->sc_bustag = rman_get_bustag(sc->sc_mem_res); 368 sc->sc_bushandle = rman_get_bushandle(sc->sc_mem_res); 369 } else { 370 /* 371 * There's another psycho using the same register space. Copy the 372 * relevant stuff. 373 */ 374 sc->sc_mem_res = NULL; 375 sc->sc_bustag = osc->sc_bustag; 376 sc->sc_bushandle = osc->sc_bushandle; 377 } 378 csr = PSYCHO_READ8(sc, PSR_CS); 379 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 380 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 381 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 382 383 device_printf(dev, "%s, impl %d, version %d, ign %#x, bus %c\n", 384 desc->pd_name, (int)PSYCHO_GCSR_IMPL(csr), 385 (int)PSYCHO_GCSR_VERS(csr), sc->sc_ign, 'A' + sc->sc_half); 386 387 /* Setup the PCI control register. */ 388 csr = PCICTL_READ8(sc, PCR_CS); 389 csr |= PCICTL_MRLM | PCICTL_ARB_PARK | PCICTL_ERRINTEN | PCICTL_4ENABLE; 390 csr &= ~(PCICTL_SERR | PCICTL_CPU_PRIO | PCICTL_ARB_PRIO | 391 PCICTL_RTRYWAIT); 392 PCICTL_WRITE8(sc, PCR_CS, csr); 393 394 if (sc->sc_mode == PSYCHO_MODE_SABRE) { 395 /* Use the PROM preset for now. */ 396 csr = PCICTL_READ8(sc, PCR_TAS); 397 if (csr == 0) 398 panic("psycho_attach: sabre TAS not initialized."); 399 sc->sc_dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT; 400 } else 401 sc->sc_dvmabase = -1; 402 403 /* Initialize memory and i/o rmans */ 404 sc->sc_io_rman.rm_type = RMAN_ARRAY; 405 sc->sc_io_rman.rm_descr = "Psycho PCI I/O Ports"; 406 if (rman_init(&sc->sc_io_rman) != 0 || 407 rman_manage_region(&sc->sc_io_rman, 0, PSYCHO_IO_SIZE) != 0) 408 panic("psycho_probe: failed to set up i/o rman"); 409 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 410 sc->sc_mem_rman.rm_descr = "Psycho PCI Memory"; 411 if (rman_init(&sc->sc_mem_rman) != 0 || 412 rman_manage_region(&sc->sc_mem_rman, 0, PSYCHO_MEM_SIZE) != 0) 413 panic("psycho_probe: failed to set up memory rman"); 414 415 sc->sc_nrange = OF_getprop_alloc(sc->sc_node, "ranges", 416 sizeof(*sc->sc_range), (void **)&sc->sc_range); 417 if (sc->sc_nrange == -1) 418 panic("could not get psycho ranges"); 419 /* 420 * Find the addresses of the various bus spaces. 421 * There should not be multiple ones of one kind. 422 * The physical start addresses of the ranges are the configuration, 423 * memory and IO handles. 424 */ 425 for (n = 0; n < sc->sc_nrange; n++) { 426 i = UPA_RANGE_CS(&sc->sc_range[n]); 427 if (sc->sc_bh[i] != 0) 428 panic("psycho_attach: duplicate range for space %d", i); 429 sc->sc_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]); 430 } 431 /* 432 * Check that all needed handles are present. The PCI_CS_MEM64 one is 433 * not currently used. 434 */ 435 for (n = 0; n < 3; n++) { 436 if (sc->sc_bh[n] == 0) 437 panic("psycho_attach: range %d missing", n); 438 } 439 440 /* Register the softc, this is needed for paired psychos. */ 441 SLIST_INSERT_HEAD(&psycho_softcs, sc, sc_link); 442 443 /* 444 * If we're a sabre or the first of a pair of psycho's to arrive here, 445 * start up the IOMMU. 446 */ 447 if (osc == NULL) { 448 /* 449 * Establish handlers for interesting interrupts.... 450 * 451 * XXX We need to remember these and remove this to support 452 * hotplug on the UPA/FHC bus. 453 * 454 * XXX Not all controllers have these, but installing them 455 * is better than trying to sort through this mess. 456 */ 457 psycho_set_intr(sc, 0, dev, PSR_UE_INT_MAP, INTR_FAST, 458 psycho_ue); 459 psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce); 460 psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST, 461 psycho_bus_a); 462 psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, 463 PSYCHO_PWRFAIL_INT_FLAGS, psycho_powerfail); 464 /* Psycho-specific initialization. */ 465 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 466 /* 467 * Sabres do not have the following two interrupts. 468 */ 469 psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, 470 INTR_FAST, psycho_bus_b); 471#ifdef PSYCHO_MAP_WAKEUP 472 /* 473 * psycho_wakeup() doesn't do anything useful right 474 * now. 475 */ 476 psycho_set_intr(sc, 5, dev, PSR_PWRMGT_INT_MAP, 0, 477 psycho_wakeup); 478#endif /* PSYCHO_MAP_WAKEUP */ 479 480 /* Initialize the counter-timer. */ 481 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, 482 PSR_TC0); 483 } 484 485 /* 486 * Setup IOMMU and PCI configuration if we're the first 487 * of a pair of psycho's to arrive here. 488 * 489 * We should calculate a TSB size based on amount of RAM 490 * and number of bus controllers and number and type of 491 * child devices. 492 * 493 * For the moment, 32KB should be more than enough. 494 */ 495 sc->sc_is = malloc(sizeof(struct iommu_state), M_DEVBUF, 496 M_NOWAIT); 497 if (sc->sc_is == NULL) 498 panic("psycho_attach: malloc iommu_state failed"); 499 sc->sc_is->is_sb[0] = 0; 500 sc->sc_is->is_sb[1] = 0; 501 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 502 sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF; 503 psycho_iommu_init(sc, 3); 504 } else { 505 /* Just copy IOMMU state, config tag and address */ 506 sc->sc_is = osc->sc_is; 507 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 508 sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF; 509 iommu_reset(sc->sc_is); 510 } 511 512 /* Allocate our tags. */ 513 sc->sc_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 514 sc->sc_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE); 515 sc->sc_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE); 516 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 517 0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_dmat) != 0) 518 panic("psycho_attach: bus_dma_tag_create failed"); 519 /* Customize the tag. */ 520 sc->sc_dmat->dt_cookie = sc->sc_is; 521 sc->sc_dmat->dt_mt = &iommu_dma_methods; 522 /* XXX: register as root dma tag (kludge). */ 523 sparc64_root_dma_tag = sc->sc_dmat; 524 525#ifdef PSYCHO_DEBUG 526 /* 527 * Enable all interrupts and clear all interrupt states. 528 * This aids the debugging of interrupt routing problems. 529 */ 530 for (map = PSR_PCIA0_INT_MAP, clr = PSR_PCIA0_INT_CLR, n = 0; 531 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { 532 mr = PSYCHO_READ8(sc, map); 533 device_printf(dev, "intr map (pci) %d: %#lx\n", n, (u_long)mr); 534 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 535 for (i = 0; i < 4; i++) 536 PCICTL_WRITE8(sc, clr + i * 8, 0); 537 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 538 } 539 for (map = PSR_SCSI_INT_MAP, clr = PSR_SCSI_INT_CLR, n = 0; 540 map <= PSR_SERIAL_INT_MAP; map += 8, clr += 8, n++) { 541 mr = PSYCHO_READ8(sc, map); 542 device_printf(dev, "intr map (obio) %d: %#lx, clr: %#lx\n", n, 543 (u_long)mr, (u_long)clr); 544 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 545 PSYCHO_WRITE8(sc, clr, 0); 546 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 547 } 548#endif /* PSYCHO_DEBUG */ 549 550 /* 551 * Get the bus range from the firmware; it is used solely for obtaining 552 * the inital bus number, and cannot be trusted on all machines. 553 */ 554 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); 555 if (n == -1) 556 panic("could not get psycho bus-range"); 557 if (n != sizeof(psycho_br)) 558 panic("broken psycho bus-range (%d)", n); 559 560 sc->sc_secbus = sc->sc_subbus = ofw_pci_alloc_busno(sc->sc_node); 561 /* 562 * Program the bus range registers. 563 * NOTE: for the psycho, the second write changes the bus number the 564 * psycho itself uses for it's configuration space, so these 565 * writes must be kept in this order! 566 * The sabre always uses bus 0, but there only can be one sabre per 567 * machine. 568 */ 569 PCIB_WRITE_CONFIG(dev, psycho_br[0], PCS_DEVICE, PCS_FUNC, PCSR_SUBBUS, 570 sc->sc_subbus, 1); 571 PCIB_WRITE_CONFIG(dev, psycho_br[0], PCS_DEVICE, PCS_FUNC, PCSR_SECBUS, 572 sc->sc_secbus, 1); 573 574 ofw_bus_setup_iinfo(node, &sc->sc_iinfo, sizeof(ofw_pci_intr_t)); 575 576 device_add_child(dev, "pci", sc->sc_secbus); 577 return (bus_generic_attach(dev)); 578} 579 580static void 581psycho_set_intr(struct psycho_softc *sc, int index, 582 device_t dev, bus_addr_t map, int iflags, driver_intr_t handler) 583{ 584 int rid, vec; 585 u_int64_t mr; 586 587 mr = PSYCHO_READ8(sc, map); 588 vec = INTVEC(mr); 589 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 590 vec, vec, 1, RF_ACTIVE); 591 if (sc->sc_irq_res[index] == NULL) 592 panic("psycho_set_intr: failed to get interrupt"); 593 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 594 handler, sc, &sc->sc_ihand[index]); 595 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 596} 597 598static int 599psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 600 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 601{ 602 bus_addr_t intrmap, intrclr; 603 u_int64_t im; 604 u_long diag; 605 int found; 606 607 found = 0; 608 /* Hunt thru obio first */ 609 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG); 610 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR; 611 intrmap <= PSR_SERIAL_INT_MAP; intrmap += 8, intrclr += 8, 612 diag >>= 2) { 613 im = PSYCHO_READ8(sc, intrmap); 614 if (INTINO(im) == ino) { 615 diag &= 2; 616 found = 1; 617 break; 618 } 619 } 620 621 if (!found) { 622 diag = PSYCHO_READ8(sc, PSR_PCI_INT_DIAG); 623 /* Now do PCI interrupts */ 624 for (intrmap = PSR_PCIA0_INT_MAP, intrclr = PSR_PCIA0_INT_CLR; 625 intrmap <= PSR_PCIB3_INT_MAP; intrmap += 8, intrclr += 32, 626 diag >>= 8) { 627 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 628 (intrmap == PSR_PCIA2_INT_MAP || 629 intrmap == PSR_PCIA3_INT_MAP)) 630 continue; 631 im = PSYCHO_READ8(sc, intrmap); 632 if (((im ^ ino) & 0x3c) == 0) { 633 intrclr += 8 * (ino & 3); 634 diag = (diag >> ((ino & 3) * 2)) & 2; 635 found = 1; 636 break; 637 } 638 } 639 } 640 if (intrmapptr != NULL) 641 *intrmapptr = intrmap; 642 if (intrclrptr != NULL) 643 *intrclrptr = intrclr; 644 if (intrdiagptr != NULL) 645 *intrdiagptr = diag; 646 return (found); 647} 648 649/* 650 * Interrupt handlers. 651 */ 652static void 653psycho_ue(void *arg) 654{ 655 struct psycho_softc *sc = (struct psycho_softc *)arg; 656 u_int64_t afar, afsr; 657 658 afar = PSYCHO_READ8(sc, PSR_UE_AFA); 659 afsr = PSYCHO_READ8(sc, PSR_UE_AFS); 660 /* 661 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause 662 * the AFAR to be set to the physical address of the TTE entry that 663 * was invalid/write protected. Call into the iommu code to have 664 * them decoded to virtual IO addresses. 665 */ 666 if ((afsr & UEAFSR_P_DTE) != 0) 667 iommu_decode_fault(sc->sc_is, afar); 668 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx", 669 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 670} 671 672static void 673psycho_ce(void *arg) 674{ 675 struct psycho_softc *sc = (struct psycho_softc *)arg; 676 u_int64_t afar, afsr; 677 678 afar = PSYCHO_READ8(sc, PSR_CE_AFA); 679 afsr = PSYCHO_READ8(sc, PSR_CE_AFS); 680 device_printf(sc->sc_dev, "correctable DMA error AFAR %#lx " 681 "AFSR %#lx\n", (u_long)afar, (u_long)afsr); 682 /* Clear the error bits that we caught. */ 683 PSYCHO_WRITE8(sc, PSR_CE_AFS, afsr & CEAFSR_ERRMASK); 684 PSYCHO_WRITE8(sc, PSR_CE_INT_CLR, 0); 685} 686 687static void 688psycho_bus_a(void *arg) 689{ 690 struct psycho_softc *sc = (struct psycho_softc *)arg; 691 u_int64_t afar, afsr; 692 693 afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA); 694 afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS); 695 panic("%s: PCI bus A error AFAR %#lx AFSR %#lx", 696 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 697} 698 699static void 700psycho_bus_b(void *arg) 701{ 702 struct psycho_softc *sc = (struct psycho_softc *)arg; 703 u_int64_t afar, afsr; 704 705 afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA); 706 afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS); 707 panic("%s: PCI bus B error AFAR %#lx AFSR %#lx", 708 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 709} 710 711static void 712psycho_powerfail(void *arg) 713{ 714 715#ifdef DEBUGGER_ON_POWERFAIL 716 struct psycho_softc *sc = (struct psycho_softc *)arg; 717 718 kdb_enter("powerfail"); 719 PSYCHO_WRITE8(sc, PSR_POWER_INT_CLR, 0); 720#else 721 printf("Power Failure Detected: Shutting down NOW.\n"); 722 shutdown_nice(0); 723#endif 724} 725 726#ifdef PSYCHO_MAP_WAKEUP 727static void 728psycho_wakeup(void *arg) 729{ 730 struct psycho_softc *sc = (struct psycho_softc *)arg; 731 732 PSYCHO_WRITE8(sc, PSR_PWRMGT_INT_CLR, 0); 733 /* Gee, we don't really have a framework to deal with this properly. */ 734 device_printf(sc->sc_dev, "power management wakeup\n"); 735} 736#endif /* PSYCHO_MAP_WAKEUP */ 737 738void 739psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 740{ 741 char *name; 742 struct iommu_state *is = sc->sc_is; 743 744 /* punch in our copies */ 745 is->is_bustag = sc->sc_bustag; 746 is->is_bushandle = sc->sc_bushandle; 747 is->is_iommu = PSR_IOMMU; 748 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG; 749 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG; 750 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG; 751 is->is_dva = PSR_IOMMU_SVADIAG; 752 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG; 753 754 /* give us a nice name.. */ 755 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 756 if (name == 0) 757 panic("couldn't malloc iommu name"); 758 snprintf(name, 32, "%s dvma", device_get_nameunit(sc->sc_dev)); 759 760 iommu_init(name, is, tsbsize, sc->sc_dvmabase, 0); 761} 762 763static int 764psycho_maxslots(device_t dev) 765{ 766 767 /* XXX: is this correct? */ 768 return (PCI_SLOTMAX); 769} 770 771static u_int32_t 772psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 773 int width) 774{ 775 struct psycho_softc *sc; 776 bus_space_handle_t bh; 777 u_long offset = 0; 778 u_int8_t byte; 779 u_int16_t shrt; 780 u_int32_t wrd; 781 u_int32_t r; 782 int i; 783 784 sc = (struct psycho_softc *)device_get_softc(dev); 785 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 786 bh = sc->sc_bh[PCI_CS_CONFIG]; 787 switch (width) { 788 case 1: 789 i = bus_space_peek_1(sc->sc_cfgt, bh, offset, &byte); 790 r = byte; 791 break; 792 case 2: 793 i = bus_space_peek_2(sc->sc_cfgt, bh, offset, &shrt); 794 r = shrt; 795 break; 796 case 4: 797 i = bus_space_peek_4(sc->sc_cfgt, bh, offset, &wrd); 798 r = wrd; 799 break; 800 default: 801 panic("psycho_read_config: bad width"); 802 } 803 804 if (i) { 805#ifdef PSYCHO_DEBUG 806 printf("psycho read data error reading: %d.%d.%d: 0x%x\n", 807 bus, slot, func, reg); 808#endif 809 r = -1; 810 } 811 return (r); 812} 813 814static void 815psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, 816 u_int reg, u_int32_t val, int width) 817{ 818 struct psycho_softc *sc; 819 bus_space_handle_t bh; 820 u_long offset = 0; 821 822 sc = (struct psycho_softc *)device_get_softc(dev); 823 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 824 bh = sc->sc_bh[PCI_CS_CONFIG]; 825 switch (width) { 826 case 1: 827 bus_space_write_1(sc->sc_cfgt, bh, offset, val); 828 break; 829 case 2: 830 bus_space_write_2(sc->sc_cfgt, bh, offset, val); 831 break; 832 case 4: 833 bus_space_write_4(sc->sc_cfgt, bh, offset, val); 834 break; 835 default: 836 panic("psycho_write_config: bad width"); 837 } 838} 839 840static int 841psycho_route_interrupt(device_t bridge, device_t dev, int pin) 842{ 843 struct psycho_softc *sc = device_get_softc(bridge); 844 struct ofw_pci_register reg; 845 bus_addr_t intrmap; 846 phandle_t node = ofw_bus_get_node(dev); 847 ofw_pci_intr_t pintr, mintr; 848 u_int8_t maskbuf[sizeof(reg) + sizeof(pintr)]; 849 850 pintr = pin; 851 if (ofw_bus_lookup_imap(node, &sc->sc_iinfo, ®, sizeof(reg), 852 &pintr, sizeof(pintr), &mintr, sizeof(mintr), maskbuf)) 853 return (mintr); 854 /* 855 * If this is outside of the range for an intpin, it's likely a full 856 * INO, and no mapping is required at all; this happens on the u30, 857 * where there's no interrupt map at the psycho node. Fortunately, 858 * there seem to be no INOs in the intpin range on this boxen, so 859 * this easy heuristics will do. 860 */ 861 if (pin > 4) 862 return (pin); 863 /* 864 * Guess the INO; we always assume that this is a non-OBIO 865 * device, and that pin is a "real" intpin number. Determine 866 * the mapping register to be used by the slot number. 867 * We only need to do this on e450s, it seems; here, the slot numbers 868 * for bus A are one-based, while those for bus B seemingly have an 869 * offset of 2 (hence the factor of 3 below). 870 */ 871 intrmap = PSR_PCIA0_INT_MAP + 872 8 * (pci_get_slot(dev) - 1 + 3 * sc->sc_half); 873 mintr = INTINO(PSYCHO_READ8(sc, intrmap)) + pin - 1; 874 device_printf(bridge, "guessing interrupt %d for device %d/%d pin %d\n", 875 (int)mintr, pci_get_slot(dev), pci_get_function(dev), pin); 876 return (mintr); 877} 878 879static int 880psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 881{ 882 struct psycho_softc *sc; 883 884 sc = (struct psycho_softc *)device_get_softc(dev); 885 switch (which) { 886 case PCIB_IVAR_BUS: 887 *result = sc->sc_secbus; 888 return (0); 889 } 890 return (ENOENT); 891} 892 893/* Write to the correct clr register, and call the actual handler. */ 894static void 895psycho_intr_stub(void *arg) 896{ 897 struct psycho_clr *pc; 898 899 pc = (struct psycho_clr *)arg; 900 pc->pci_handler(pc->pci_arg); 901 PSYCHO_WRITE8(pc->pci_sc, pc->pci_clr, 0); 902} 903 904static int 905psycho_setup_intr(device_t dev, device_t child, 906 struct resource *ires, int flags, driver_intr_t *intr, void *arg, 907 void **cookiep) 908{ 909 struct psycho_softc *sc; 910 struct psycho_clr *pc; 911 bus_addr_t intrmapptr, intrclrptr; 912 long vec = rman_get_start(ires); 913 u_int64_t mr; 914 int ino, error; 915 916 sc = (struct psycho_softc *)device_get_softc(dev); 917 pc = (struct psycho_clr *)malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT); 918 if (pc == NULL) 919 return (0); 920 921 /* 922 * Hunt through all the interrupt mapping regs to look for our 923 * interrupt vector. 924 * 925 * XXX We only compare INOs rather than IGNs since the firmware may 926 * not provide the IGN and the IGN is constant for all devices on that 927 * PCI controller. This could cause problems for the FFB/external 928 * interrupt which has a full vector that can be set arbitrarily. 929 */ 930 ino = INTINO(vec); 931 932 if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) { 933 device_printf(dev, "Cannot find interrupt vector %lx\n", vec); 934 free(pc, M_DEVBUF); 935 return (0); 936 } 937 938#ifdef PSYCHO_DEBUG 939 device_printf(dev, "psycho_setup_intr: INO %d, map %#lx, clr %#lx\n", 940 ino, (u_long)intrmapptr, (u_long)intrclrptr); 941#endif 942 pc->pci_sc = sc; 943 pc->pci_arg = arg; 944 pc->pci_handler = intr; 945 pc->pci_clr = intrclrptr; 946 /* Disable the interrupt while we fiddle with it */ 947 mr = PSYCHO_READ8(sc, intrmapptr); 948 PSYCHO_WRITE8(sc, intrmapptr, mr & ~INTMAP_V); 949 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 950 psycho_intr_stub, pc, cookiep); 951 if (error != 0) { 952 free(pc, M_DEVBUF); 953 return (error); 954 } 955 pc->pci_cookie = *cookiep; 956 *cookiep = pc; 957 958 /* 959 * Clear the interrupt, it might have been triggered before it was 960 * set up. 961 */ 962 PSYCHO_WRITE8(sc, intrclrptr, 0); 963 /* 964 * Enable the interrupt and program the target module now we have the 965 * handler installed. 966 */ 967 PSYCHO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(mr, PCPU_GET(mid))); 968 return (error); 969} 970 971static int 972psycho_teardown_intr(device_t dev, device_t child, 973 struct resource *vec, void *cookie) 974{ 975 struct psycho_clr *pc; 976 int error; 977 978 pc = (struct psycho_clr *)cookie; 979 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 980 pc->pci_cookie); 981 /* 982 * Don't disable the interrupt for now, so that stray interupts get 983 * detected... 984 */ 985 if (error != 0) 986 free(pc, M_DEVBUF); 987 return (error); 988} 989 990static struct resource * 991psycho_alloc_resource(device_t bus, device_t child, int type, int *rid, 992 u_long start, u_long end, u_long count, u_int flags) 993{ 994 struct psycho_softc *sc; 995 struct resource *rv; 996 struct rman *rm; 997 bus_space_tag_t bt; 998 bus_space_handle_t bh; 999 int needactivate = flags & RF_ACTIVE; 1000 1001 flags &= ~RF_ACTIVE; 1002 1003 sc = (struct psycho_softc *)device_get_softc(bus); 1004 if (type == SYS_RES_IRQ) { 1005 /* 1006 * XXX: Don't accept blank ranges for now, only single 1007 * interrupts. The other case should not happen with the MI pci 1008 * code... 1009 * XXX: This may return a resource that is out of the range 1010 * that was specified. Is this correct...? 1011 */ 1012 if (start != end) 1013 panic("psycho_alloc_resource: XXX: interrupt range"); 1014 start = end |= sc->sc_ign; 1015 return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, 1016 rid, start, end, count, flags)); 1017 } 1018 switch (type) { 1019 case SYS_RES_MEMORY: 1020 rm = &sc->sc_mem_rman; 1021 bt = sc->sc_memt; 1022 bh = sc->sc_bh[PCI_CS_MEM32]; 1023 break; 1024 case SYS_RES_IOPORT: 1025 rm = &sc->sc_io_rman; 1026 bt = sc->sc_iot; 1027 bh = sc->sc_bh[PCI_CS_IO]; 1028 break; 1029 default: 1030 return (NULL); 1031 } 1032 1033 rv = rman_reserve_resource(rm, start, end, count, flags, child); 1034 if (rv == NULL) 1035 return (NULL); 1036 1037 bh += rman_get_start(rv); 1038 rman_set_bustag(rv, bt); 1039 rman_set_bushandle(rv, bh); 1040 1041 if (needactivate) { 1042 if (bus_activate_resource(child, type, *rid, rv)) { 1043 rman_release_resource(rv); 1044 return (NULL); 1045 } 1046 } 1047 1048 return (rv); 1049} 1050 1051static int 1052psycho_activate_resource(device_t bus, device_t child, int type, int rid, 1053 struct resource *r) 1054{ 1055 void *p; 1056 int error; 1057 1058 if (type == SYS_RES_IRQ) 1059 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child, 1060 type, rid, r)); 1061 if (type == SYS_RES_MEMORY) { 1062 /* 1063 * Need to memory-map the device space, as some drivers depend 1064 * on the virtual address being set and useable. 1065 */ 1066 error = sparc64_bus_mem_map(rman_get_bustag(r), 1067 rman_get_bushandle(r), rman_get_size(r), 0, 0, &p); 1068 if (error != 0) 1069 return (error); 1070 rman_set_virtual(r, p); 1071 } 1072 return (rman_activate_resource(r)); 1073} 1074 1075static int 1076psycho_deactivate_resource(device_t bus, device_t child, int type, int rid, 1077 struct resource *r) 1078{ 1079 1080 if (type == SYS_RES_IRQ) 1081 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child, 1082 type, rid, r)); 1083 if (type == SYS_RES_MEMORY) { 1084 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r)); 1085 rman_set_virtual(r, NULL); 1086 } 1087 return (rman_deactivate_resource(r)); 1088} 1089 1090static int 1091psycho_release_resource(device_t bus, device_t child, int type, int rid, 1092 struct resource *r) 1093{ 1094 int error; 1095 1096 if (type == SYS_RES_IRQ) 1097 return (BUS_RELEASE_RESOURCE(device_get_parent(bus), child, 1098 type, rid, r)); 1099 if (rman_get_flags(r) & RF_ACTIVE) { 1100 error = bus_deactivate_resource(child, type, rid, r); 1101 if (error) 1102 return error; 1103 } 1104 return (rman_release_resource(r)); 1105} 1106 1107static int 1108psycho_intr_pending(device_t dev, ofw_pci_intr_t intr) 1109{ 1110 struct psycho_softc *sc; 1111 u_long diag; 1112 1113 sc = (struct psycho_softc *)device_get_softc(dev); 1114 if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) { 1115 device_printf(dev, "psycho_intr_pending: mapping not found for" 1116 " %d\n", intr); 1117 return (0); 1118 } 1119 return (diag != 0); 1120} 1121 1122static bus_space_handle_t 1123psycho_get_bus_handle(device_t dev, int type, bus_space_handle_t childhdl, 1124 bus_space_tag_t *tag) 1125{ 1126 struct psycho_softc *sc; 1127 1128 sc = (struct psycho_softc *)device_get_softc(dev); 1129 switch (type) { 1130 case SYS_RES_IOPORT: 1131 *tag = sc->sc_iot; 1132 return (sc->sc_bh[PCI_CS_IO] + childhdl); 1133 case SYS_RES_MEMORY: 1134 *tag = sc->sc_memt; 1135 return (sc->sc_bh[PCI_CS_MEM32] + childhdl); 1136 default: 1137 panic("psycho_get_bus_handle: illegal space\n"); 1138 } 1139} 1140 1141static phandle_t 1142psycho_get_node(device_t bus, device_t dev) 1143{ 1144 struct psycho_softc *sc = device_get_softc(bus); 1145 1146 /* We only have one child, the PCI bus, which needs our own node. */ 1147 return (sc->sc_node); 1148} 1149 1150static void 1151psycho_adjust_busrange(device_t dev, u_int subbus) 1152{ 1153 struct psycho_softc *sc = device_get_softc(dev); 1154 1155 /* If necessary, adjust the subordinate bus number register. */ 1156 if (subbus > sc->sc_subbus) { 1157#ifdef PSYCHO_DEBUG 1158 device_printf(dev, 1159 "adjusting secondary bus number from %d to %d\n", 1160 sc->sc_subbus, subbus); 1161#endif 1162 sc->sc_subbus = subbus; 1163 PCIB_WRITE_CONFIG(dev, sc->sc_secbus, PCS_DEVICE, PCS_FUNC, 1164 PCSR_SUBBUS, subbus, 1); 1165 } 1166} 1167 1168static bus_space_tag_t 1169psycho_alloc_bus_tag(struct psycho_softc *sc, int type) 1170{ 1171 bus_space_tag_t bt; 1172 1173 bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 1174 M_NOWAIT | M_ZERO); 1175 if (bt == NULL) 1176 panic("psycho_alloc_bus_tag: out of memory"); 1177 1178 bzero(bt, sizeof *bt); 1179 bt->bst_cookie = sc; 1180 bt->bst_parent = sc->sc_bustag; 1181 bt->bst_type = type; 1182 return (bt); 1183} 1184