psycho.c revision 113238
1/* 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * All rights reserved. 4 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 30 * 31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 113238 2003-04-08 06:35:09Z jake $ 32 */ 33 34/* 35 * Support for `psycho' and `psycho+' UPA to PCI bridge and 36 * UltraSPARC IIi and IIe `sabre' PCI controllers. 37 */ 38 39#include "opt_psycho.h" 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/bus.h> 44#include <sys/kernel.h> 45#include <sys/malloc.h> 46#include <sys/pcpu.h> 47 48#include <ofw/openfirm.h> 49#include <ofw/ofw_pci.h> 50 51#include <machine/bus.h> 52#include <machine/iommureg.h> 53#include <machine/bus_common.h> 54#include <machine/frame.h> 55#include <machine/intr_machdep.h> 56#include <machine/nexusvar.h> 57#include <machine/ofw_upa.h> 58#include <machine/resource.h> 59 60#include <sys/rman.h> 61 62#include <machine/iommuvar.h> 63 64#include <pci/pcivar.h> 65#include <pci/pcireg.h> 66 67#include <sparc64/pci/ofw_pci.h> 68#include <sparc64/pci/psychoreg.h> 69#include <sparc64/pci/psychovar.h> 70 71#include "pcib_if.h" 72#include "sparcbus_if.h" 73 74static void psycho_get_ranges(phandle_t, struct upa_ranges **, int *); 75static void psycho_set_intr(struct psycho_softc *, int, device_t, bus_addr_t, 76 int, driver_intr_t); 77static int psycho_find_intrmap(struct psycho_softc *, int, bus_addr_t *, 78 bus_addr_t *, u_long *); 79static void psycho_intr_stub(void *); 80#ifdef PSYCHO_STRAY 81static void psycho_intr_stray(void *); 82#endif 83static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int); 84 85 86/* Interrupt handlers */ 87static void psycho_ue(void *); 88static void psycho_ce(void *); 89static void psycho_bus_a(void *); 90static void psycho_bus_b(void *); 91static void psycho_powerfail(void *); 92#ifdef PSYCHO_MAP_WAKEUP 93static void psycho_wakeup(void *); 94#endif 95 96/* IOMMU support */ 97static void psycho_iommu_init(struct psycho_softc *, int); 98static ofw_pci_binit_t psycho_binit; 99 100/* 101 * bus space and bus dma support for UltraSPARC `psycho'. note that most 102 * of the bus dma support is provided by the iommu dvma controller. 103 */ 104static int psycho_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int, 105 bus_dmamap_t *); 106static int psycho_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 107static int psycho_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 108 void *, bus_size_t, bus_dmamap_callback_t *, void *, int); 109static int psycho_dmamap_load_mbuf(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 110 struct mbuf *, bus_dmamap_callback2_t *, void *, int); 111static int psycho_dmamap_load_uio(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 112 struct uio *, bus_dmamap_callback2_t *, void *, int); 113static void psycho_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 114static void psycho_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 115 bus_dmasync_op_t); 116static int psycho_dmamem_alloc_size(bus_dma_tag_t, bus_dma_tag_t, void **, int, 117 bus_dmamap_t *, bus_size_t size); 118static int psycho_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int, 119 bus_dmamap_t *); 120static void psycho_dmamem_free_size(bus_dma_tag_t, bus_dma_tag_t, void *, 121 bus_dmamap_t, bus_size_t size); 122static void psycho_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *, 123 bus_dmamap_t); 124 125/* 126 * autoconfiguration 127 */ 128static int psycho_probe(device_t); 129static int psycho_attach(device_t); 130static int psycho_read_ivar(device_t, device_t, int, u_long *); 131static int psycho_setup_intr(device_t, device_t, struct resource *, int, 132 driver_intr_t *, void *, void **); 133static int psycho_teardown_intr(device_t, device_t, struct resource *, void *); 134static struct resource *psycho_alloc_resource(device_t, device_t, int, int *, 135 u_long, u_long, u_long, u_int); 136static int psycho_activate_resource(device_t, device_t, int, int, 137 struct resource *); 138static int psycho_deactivate_resource(device_t, device_t, int, int, 139 struct resource *); 140static int psycho_release_resource(device_t, device_t, int, int, 141 struct resource *); 142static int psycho_maxslots(device_t); 143static u_int32_t psycho_read_config(device_t, u_int, u_int, u_int, u_int, int); 144static void psycho_write_config(device_t, u_int, u_int, u_int, u_int, u_int32_t, 145 int); 146static int psycho_route_interrupt(device_t, device_t, int); 147static int psycho_intr_pending(device_t, int); 148static bus_space_handle_t psycho_get_bus_handle(device_t dev, enum sbbt_id id, 149 bus_space_handle_t childhdl, bus_space_tag_t *tag); 150 151static device_method_t psycho_methods[] = { 152 /* Device interface */ 153 DEVMETHOD(device_probe, psycho_probe), 154 DEVMETHOD(device_attach, psycho_attach), 155 156 /* Bus interface */ 157 DEVMETHOD(bus_print_child, bus_generic_print_child), 158 DEVMETHOD(bus_read_ivar, psycho_read_ivar), 159 DEVMETHOD(bus_setup_intr, psycho_setup_intr), 160 DEVMETHOD(bus_teardown_intr, psycho_teardown_intr), 161 DEVMETHOD(bus_alloc_resource, psycho_alloc_resource), 162 DEVMETHOD(bus_activate_resource, psycho_activate_resource), 163 DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource), 164 DEVMETHOD(bus_release_resource, psycho_release_resource), 165 166 /* pcib interface */ 167 DEVMETHOD(pcib_maxslots, psycho_maxslots), 168 DEVMETHOD(pcib_read_config, psycho_read_config), 169 DEVMETHOD(pcib_write_config, psycho_write_config), 170 DEVMETHOD(pcib_route_interrupt, psycho_route_interrupt), 171 172 /* sparcbus interface */ 173 DEVMETHOD(sparcbus_intr_pending, psycho_intr_pending), 174 DEVMETHOD(sparcbus_get_bus_handle, psycho_get_bus_handle), 175 176 { 0, 0 } 177}; 178 179static driver_t psycho_driver = { 180 "pcib", 181 psycho_methods, 182 sizeof(struct psycho_softc), 183}; 184 185static devclass_t psycho_devclass; 186 187DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0); 188 189SLIST_HEAD(, psycho_softc) psycho_softcs = 190 SLIST_HEAD_INITIALIZER(psycho_softcs); 191 192struct psycho_clr { 193 struct psycho_softc *pci_sc; 194 bus_addr_t pci_clr; /* clear register */ 195 driver_intr_t *pci_handler; /* handler to call */ 196 void *pci_arg; /* argument for the handler */ 197 void *pci_cookie; /* interrupt cookie of parent bus */ 198}; 199 200struct psycho_strayclr { 201 struct psycho_softc *psc_sc; 202 bus_addr_t psc_clr; /* clear register */ 203}; 204 205#define PSYCHO_READ8(sc, off) \ 206 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 207#define PSYCHO_WRITE8(sc, off, v) \ 208 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 209#define PCICTL_READ8(sc, off) \ 210 PSYCHO_READ8((sc), (sc)->sc_pcictl + (off)) 211#define PCICTL_WRITE8(sc, off, v) \ 212 PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v)) 213 214/* 215 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 216 * single PCI bus and does not have a streaming buffer. It often has an APB 217 * (advanced PCI bridge) connected to it, which was designed specifically for 218 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 219 * appears as two "simba"'s underneath the sabre. 220 * 221 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 222 * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while 223 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 224 * will usually find a "psycho+" since I don't think the original "psycho" 225 * ever shipped, and if it did it would be in the U30. 226 * 227 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 228 * both part of the same IC, they only have a single register space. As such, 229 * they need to be configured together, even though the autoconfiguration will 230 * attach them separately. 231 * 232 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 233 * as pci1 and pci2, although they have been implemented with other PCI bus 234 * numbers on some machines. 235 * 236 * On UltraII machines, there can be any number of "psycho+" ICs, each 237 * providing two PCI buses. 238 * 239 * 240 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 241 * the values of the following interrupts in this order: 242 * 243 * PCI Bus Error (30) 244 * DMA UE (2e) 245 * DMA CE (2f) 246 * Power Fail (25) 247 * 248 * We really should attach handlers for each. 249 */ 250#ifdef DEBUGGER_ON_POWERFAIL 251#define PSYCHO_PWRFAIL_INT_FLAGS INTR_FAST 252#else 253#define PSYCHO_PWRFAIL_INT_FLAGS 0 254#endif 255 256#define OFW_PCI_TYPE "pci" 257 258struct psycho_desc { 259 char *pd_string; 260 int pd_mode; 261 char *pd_name; 262}; 263 264static struct psycho_desc psycho_compats[] = { 265 { "pci108e,8000", PSYCHO_MODE_PSYCHO, "Psycho compatible" }, 266 { "pci108e,a000", PSYCHO_MODE_SABRE, "Sabre (US-IIi) compatible" }, 267 { "pci108e,a001", PSYCHO_MODE_SABRE, "Sabre (US-IIe) compatible" }, 268 { NULL, 0, NULL } 269}; 270 271static struct psycho_desc psycho_models[] = { 272 { "SUNW,psycho", PSYCHO_MODE_PSYCHO, "Psycho" }, 273 { "SUNW,sabre", PSYCHO_MODE_SABRE, "Sabre" }, 274 { NULL, 0, NULL } 275}; 276 277static struct psycho_desc * 278psycho_find_desc(struct psycho_desc *table, char *string) 279{ 280 struct psycho_desc *desc; 281 282 for (desc = table; desc->pd_string != NULL; desc++) { 283 if (strcmp(desc->pd_string, string) == 0) 284 return (desc); 285 } 286 return (NULL); 287} 288 289static struct psycho_desc * 290psycho_get_desc(phandle_t node, char *model) 291{ 292 struct psycho_desc *rv; 293 char compat[32]; 294 295 rv = NULL; 296 if (model != NULL) 297 rv = psycho_find_desc(psycho_models, model); 298 if (rv == NULL && 299 OF_getprop(node, "compatible", compat, sizeof(compat)) != -1) 300 rv = psycho_find_desc(psycho_compats, compat); 301 return (rv); 302} 303 304static int 305psycho_probe(device_t dev) 306{ 307 phandle_t node; 308 char *dtype; 309 310 node = nexus_get_node(dev); 311 dtype = nexus_get_device_type(dev); 312 if (nexus_get_reg(dev) != NULL && dtype != NULL && 313 strcmp(dtype, OFW_PCI_TYPE) == 0 && 314 psycho_get_desc(node, nexus_get_model(dev)) != NULL) { 315 device_set_desc(dev, "U2P UPA-PCI bridge"); 316 return (0); 317 } 318 319 return (ENXIO); 320} 321 322/* 323 * SUNW,psycho initialisation .. 324 * - find the per-psycho registers 325 * - figure out the IGN. 326 * - find our partner psycho 327 * - configure ourselves 328 * - bus range, bus, 329 * - interrupt map, 330 * - setup the chipsets. 331 * - if we're the first of the pair, initialise the IOMMU, otherwise 332 * just copy it's tags and addresses. 333 */ 334static int 335psycho_attach(device_t dev) 336{ 337 struct psycho_softc *sc; 338 struct psycho_softc *osc = NULL; 339 struct psycho_softc *asc; 340 struct upa_regs *reg; 341 struct ofw_pci_bdesc obd; 342 struct psycho_desc *desc; 343 vm_paddr_t pcictl_offs; 344 phandle_t node; 345 u_int64_t csr; 346 u_long mlen; 347 int psycho_br[2]; 348 int n, i, nreg, rid; 349#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY) 350 bus_addr_t map, clr; 351 u_int64_t mr; 352#endif 353#ifdef PSYCHO_STRAY 354 struct psycho_strayclr *sclr; 355#endif 356 357 node = nexus_get_node(dev); 358 sc = device_get_softc(dev); 359 desc = psycho_get_desc(node, nexus_get_model(dev)); 360 361 sc->sc_node = node; 362 sc->sc_dev = dev; 363 sc->sc_dmatag = nexus_get_dmatag(dev); 364 sc->sc_mode = desc->pd_mode; 365 366 /* 367 * The psycho gets three register banks: 368 * (0) per-PBM configuration and status registers 369 * (1) per-PBM PCI configuration space, containing only the 370 * PBM 256-byte PCI header 371 * (2) the shared psycho configuration registers (struct psychoreg) 372 */ 373 reg = nexus_get_reg(dev); 374 nreg = nexus_get_nreg(dev); 375 /* Register layouts are different. stuupid. */ 376 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 377 if (nreg <= 2) 378 panic("psycho_attach: %d not enough registers", nreg); 379 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[2]); 380 mlen = UPA_REG_SIZE(®[2]); 381 pcictl_offs = UPA_REG_PHYS(®[0]); 382 } else { 383 if (nreg <= 0) 384 panic("psycho_attach: %d not enough registers", nreg); 385 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[0]); 386 mlen = UPA_REG_SIZE(reg); 387 pcictl_offs = sc->sc_basepaddr + PSR_PCICTL0; 388 } 389 390 /* 391 * Match other psycho's that are already configured against 392 * the base physical address. This will be the same for a 393 * pair of devices that share register space. 394 */ 395 SLIST_FOREACH(asc, &psycho_softcs, sc_link) { 396 if (asc->sc_basepaddr == sc->sc_basepaddr) { 397 /* Found partner */ 398 osc = asc; 399 break; 400 } 401 } 402 403 if (osc == NULL) { 404 rid = 0; 405 sc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 406 sc->sc_basepaddr, sc->sc_basepaddr + mlen - 1, mlen, 407 RF_ACTIVE); 408 if (sc->sc_mem_res == NULL || 409 rman_get_start(sc->sc_mem_res) != sc->sc_basepaddr) 410 panic("psycho_attach: can't allocate device memory"); 411 sc->sc_bustag = rman_get_bustag(sc->sc_mem_res); 412 sc->sc_bushandle = rman_get_bushandle(sc->sc_mem_res); 413 } else { 414 /* 415 * There's another psycho using the same register space. Copy the 416 * relevant stuff. 417 */ 418 sc->sc_mem_res = NULL; 419 sc->sc_bustag = osc->sc_bustag; 420 sc->sc_bushandle = osc->sc_bushandle; 421 } 422 if (pcictl_offs < sc->sc_basepaddr) 423 panic("psycho_attach: bogus pci control register location"); 424 sc->sc_pcictl = pcictl_offs - sc->sc_basepaddr; 425 csr = PSYCHO_READ8(sc, PSR_CS); 426 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 427 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 428 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 429 430 device_printf(dev, "%s, impl %d, version %d, ign %#x\n", 431 desc->pd_name, (int)PSYCHO_GCSR_IMPL(csr), 432 (int)PSYCHO_GCSR_VERS(csr), sc->sc_ign); 433 434 /* 435 * Setup the PCI control register 436 */ 437 csr = PCICTL_READ8(sc, PCR_CS); 438 csr |= PCICTL_MRLM | PCICTL_ARB_PARK | PCICTL_ERRINTEN | PCICTL_4ENABLE; 439 csr &= ~(PCICTL_SERR | PCICTL_CPU_PRIO | PCICTL_ARB_PRIO | 440 PCICTL_RTRYWAIT); 441 PCICTL_WRITE8(sc, PCR_CS, csr); 442 443 if (sc->sc_mode == PSYCHO_MODE_SABRE) { 444 /* 445 * Use the PROM preset for now. 446 */ 447 csr = PCICTL_READ8(sc, PCR_TAS); 448 if (csr == 0) 449 panic("psycho_attach: sabre TAS not initialized."); 450 sc->sc_dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT; 451 } else 452 sc->sc_dvmabase = -1; 453 454 /* Grab the psycho ranges */ 455 psycho_get_ranges(sc->sc_node, &sc->sc_range, &sc->sc_nrange); 456 457 /* Initialize memory and i/o rmans */ 458 sc->sc_io_rman.rm_type = RMAN_ARRAY; 459 sc->sc_io_rman.rm_descr = "Psycho PCI I/O Ports"; 460 if (rman_init(&sc->sc_io_rman) != 0 || 461 rman_manage_region(&sc->sc_io_rman, 0, PSYCHO_IO_SIZE) != 0) 462 panic("psycho_probe: failed to set up i/o rman"); 463 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 464 sc->sc_mem_rman.rm_descr = "Psycho PCI Memory"; 465 if (rman_init(&sc->sc_mem_rman) != 0 || 466 rman_manage_region(&sc->sc_mem_rman, 0, PSYCHO_MEM_SIZE) != 0) 467 panic("psycho_probe: failed to set up memory rman"); 468 /* 469 * Find the addresses of the various bus spaces. 470 * There should not be multiple ones of one kind. 471 * The physical start addresses of the ranges are the configuration, 472 * memory and IO handles. 473 */ 474 for (n = 0; n < sc->sc_nrange; n++) { 475 i = UPA_RANGE_CS(&sc->sc_range[n]); 476 if (sc->sc_bh[i] != 0) 477 panic("psycho_attach: duplicate range for space %d", i); 478 sc->sc_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]); 479 } 480 /* 481 * Check that all needed handles are present. The PCI_CS_MEM64 one is 482 * not currently used. 483 */ 484 for (n = 0; n < 3; n++) { 485 if (sc->sc_bh[n] == 0) 486 panic("psycho_attach: range %d missing", n); 487 } 488 489 /* allocate our tags */ 490 sc->sc_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 491 sc->sc_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE); 492 sc->sc_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE); 493 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 494 0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_dmat) != 0) 495 panic("psycho_attach: bus_dma_tag_create failed"); 496 /* Customize the tag */ 497 sc->sc_dmat->dt_cookie = sc; 498 sc->sc_dmat->dt_dmamap_create = psycho_dmamap_create; 499 sc->sc_dmat->dt_dmamap_destroy = psycho_dmamap_destroy; 500 sc->sc_dmat->dt_dmamap_load = psycho_dmamap_load; 501 sc->sc_dmat->dt_dmamap_load_mbuf = psycho_dmamap_load_mbuf; 502 sc->sc_dmat->dt_dmamap_load_uio = psycho_dmamap_load_uio; 503 sc->sc_dmat->dt_dmamap_unload = psycho_dmamap_unload; 504 sc->sc_dmat->dt_dmamap_sync = psycho_dmamap_sync; 505 sc->sc_dmat->dt_dmamem_alloc_size = psycho_dmamem_alloc_size; 506 sc->sc_dmat->dt_dmamem_alloc = psycho_dmamem_alloc; 507 sc->sc_dmat->dt_dmamem_free_size = psycho_dmamem_free_size; 508 sc->sc_dmat->dt_dmamem_free = psycho_dmamem_free; 509 /* XXX: register as root dma tag (kluge). */ 510 sparc64_root_dma_tag = sc->sc_dmat; 511 512 /* Register the softc, this is needed for paired psychos. */ 513 SLIST_INSERT_HEAD(&psycho_softcs, sc, sc_link); 514 515 /* 516 * And finally, if we're a sabre or the first of a pair of psycho's to 517 * arrive here, start up the IOMMU and get a config space tag. 518 */ 519 if (osc == NULL) { 520 /* 521 * Establish handlers for interesting interrupts.... 522 * 523 * XXX We need to remember these and remove this to support 524 * hotplug on the UPA/FHC bus. 525 * 526 * XXX Not all controllers have these, but installing them 527 * is better than trying to sort through this mess. 528 */ 529 psycho_set_intr(sc, 0, dev, PSR_UE_INT_MAP, INTR_FAST, 530 psycho_ue); 531 psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce); 532 psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST, 533 psycho_bus_a); 534 psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, 535 PSYCHO_PWRFAIL_INT_FLAGS, psycho_powerfail); 536 /* Psycho-specific initialization. */ 537 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 538 /* 539 * Sabres do not have the following two interrupts. 540 */ 541 psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, 542 INTR_FAST, psycho_bus_b); 543#ifdef PSYCHO_MAP_WAKEUP 544 /* 545 * psycho_wakeup() doesn't do anything useful right 546 * now. 547 */ 548 psycho_set_intr(sc, 5, dev, PSR_PWRMGT_INT_MAP, 0, 549 psycho_wakeup); 550#endif /* PSYCHO_MAP_WAKEUP */ 551 552 /* Initialize the counter-timer. */ 553 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, 554 PSR_TC0); 555 } 556 557 /* 558 * Setup IOMMU and PCI configuration if we're the first 559 * of a pair of psycho's to arrive here. 560 * 561 * We should calculate a TSB size based on amount of RAM 562 * and number of bus controllers and number and type of 563 * child devices. 564 * 565 * For the moment, 32KB should be more than enough. 566 */ 567 sc->sc_is = malloc(sizeof(struct iommu_state), M_DEVBUF, 568 M_NOWAIT); 569 if (sc->sc_is == NULL) 570 panic("psycho_attach: malloc iommu_state failed"); 571 sc->sc_is->is_sb[0] = 0; 572 sc->sc_is->is_sb[1] = 0; 573 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 574 sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF; 575 psycho_iommu_init(sc, 2); 576 } else { 577 /* Just copy IOMMU state, config tag and address */ 578 sc->sc_is = osc->sc_is; 579 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 580 sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF; 581 iommu_reset(sc->sc_is); 582 } 583 584 /* 585 * Enable all interrupts, clear all interrupt states, and install an 586 * interrupt handler for OBIO interrupts, which can be ISA ones 587 * (to frob the interrupt clear registers). 588 * This aids the debugging of interrupt routing problems, and is needed 589 * for isa drivers that use isa_irq_pending (otherwise the registers 590 * will never be cleared). 591 */ 592#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY) 593 for (map = PSR_PCIA0_INT_MAP, clr = PSR_PCIA0_INT_CLR, n = 0; 594 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { 595 mr = PSYCHO_READ8(sc, map); 596#ifdef PSYCHO_DEBUG 597 device_printf(dev, "intr map (pci) %d: %#lx\n", n, (u_long)mr); 598#endif 599 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 600 for (i = 0; i < 4; i++) 601 PCICTL_WRITE8(sc, clr + i * 8, 0); 602 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 603 } 604 for (map = PSR_SCSI_INT_MAP, clr = PSR_SCSI_INT_CLR, n = 0; 605 map <= PSR_SERIAL_INT_MAP; map += 8, clr += 8, n++) { 606 mr = PSYCHO_READ8(sc, map); 607#ifdef PSYCHO_DEBUG 608 device_printf(dev, "intr map (obio) %d: %#lx, clr: %#lx\n", n, 609 (u_long)mr, (u_long)clr); 610#endif 611 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 612 PSYCHO_WRITE8(sc, clr, 0); 613#ifdef PSYCHO_STRAY 614 /* 615 * This can cause interrupt storms, and is therefore disabled 616 * by default. 617 * XXX: use intr_setup() to not confuse higher level code 618 */ 619 if (INTVEC(mr) != 0x7e6 && INTVEC(mr) != 0x7e7 && 620 INTVEC(mr) != 0) { 621 sclr = malloc(sizeof(*sclr), M_DEVBUF, M_WAITOK); 622 sclr->psc_sc = sc; 623 sclr->psc_clr = clr; 624 intr_setup(PIL_LOW, intr_fast, INTVEC(mr), 625 psycho_intr_stray, sclr); 626 } 627#endif 628 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 629 } 630#endif 631 632 /* 633 * Get the bus range from the firmware; it is used solely for obtaining 634 * the inital bus number, and cannot be trusted on all machines. 635 */ 636 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); 637 if (n == -1) 638 panic("could not get psycho bus-range"); 639 if (n != sizeof(psycho_br)) 640 panic("broken psycho bus-range (%d)", n); 641 642 sc->sc_busno = ofw_pci_alloc_busno(sc->sc_node); 643 obd.obd_bus = psycho_br[0]; 644 obd.obd_secbus = obd.obd_subbus = sc->sc_busno; 645 obd.obd_slot = PCS_DEVICE; 646 obd.obd_func = PCS_FUNC; 647 obd.obd_init = psycho_binit; 648 obd.obd_super = NULL; 649 /* Initial setup. */ 650 psycho_binit(dev, &obd); 651 /* Update the bus number to what was just programmed. */ 652 obd.obd_bus = obd.obd_secbus; 653 /* 654 * Initialize the interrupt registers of all devices hanging from 655 * the host bridge directly or indirectly via PCI-PCI bridges. 656 * The MI code (and the PCI spec) assume that this is done during 657 * system initialization, however the firmware does not do this 658 * at least on some models, and we probably shouldn't trust that 659 * the firmware uses the same model as this driver if it does. 660 * Additionally, set up the bus numbers and ranges. 661 */ 662 ofw_pci_init(dev, sc->sc_node, sc->sc_ign, &obd); 663 664 device_add_child(dev, "pci", device_get_unit(dev)); 665 return (bus_generic_attach(dev)); 666} 667 668static void 669psycho_set_intr(struct psycho_softc *sc, int index, 670 device_t dev, bus_addr_t map, int iflags, driver_intr_t handler) 671{ 672 int rid, vec; 673 u_int64_t mr; 674 675 mr = PSYCHO_READ8(sc, map); 676 vec = INTVEC(mr); 677 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 678 vec, vec, 1, RF_ACTIVE); 679 if (sc->sc_irq_res[index] == NULL) 680 panic("psycho_set_intr: failed to get interrupt"); 681 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 682 handler, sc, &sc->sc_ihand[index]); 683 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 684} 685 686static int 687psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 688 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 689{ 690 bus_addr_t intrmap, intrclr; 691 u_int64_t im; 692 u_long diag; 693 int found; 694 695 found = 0; 696 /* Hunt thru obio first */ 697 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG); 698 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR; 699 intrmap <= PSR_SERIAL_INT_MAP; intrmap += 8, intrclr += 8, 700 diag >>= 2) { 701 im = PSYCHO_READ8(sc, intrmap); 702 if (INTINO(im) == ino) { 703 diag &= 2; 704 found = 1; 705 break; 706 } 707 } 708 709 if (!found) { 710 diag = PSYCHO_READ8(sc, PSR_PCI_INT_DIAG); 711 /* Now do PCI interrupts */ 712 for (intrmap = PSR_PCIA0_INT_MAP, intrclr = PSR_PCIA0_INT_CLR; 713 intrmap <= PSR_PCIB3_INT_MAP; intrmap += 8, intrclr += 32, 714 diag >>= 8) { 715 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 716 (intrmap == PSR_PCIA2_INT_MAP || 717 intrmap == PSR_PCIA3_INT_MAP)) 718 continue; 719 im = PSYCHO_READ8(sc, intrmap); 720 if (((im ^ ino) & 0x3c) == 0) { 721 intrclr += 8 * (ino & 3); 722 diag = (diag >> ((ino & 3) * 2)) & 2; 723 found = 1; 724 break; 725 } 726 } 727 } 728 if (intrmapptr != NULL) 729 *intrmapptr = intrmap; 730 if (intrclrptr != NULL) 731 *intrclrptr = intrclr; 732 if (intrdiagptr != NULL) 733 *intrdiagptr = diag; 734 return (found); 735} 736 737/* grovel the OBP for various psycho properties */ 738static void 739psycho_get_ranges(phandle_t node, struct upa_ranges **rp, int *np) 740{ 741 742 *np = OF_getprop_alloc(node, "ranges", sizeof(**rp), (void **)rp); 743 if (*np == -1) 744 panic("could not get psycho ranges"); 745} 746 747/* 748 * Interrupt handlers. 749 */ 750static void 751psycho_ue(void *arg) 752{ 753 struct psycho_softc *sc = (struct psycho_softc *)arg; 754 u_int64_t afar, afsr; 755 756 afar = PSYCHO_READ8(sc, PSR_UE_AFA); 757 afsr = PSYCHO_READ8(sc, PSR_UE_AFS); 758 /* 759 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause 760 * the AFAR to be set to the physical address of the TTE entry that 761 * was invalid/write protected. Call into the iommu code to have 762 * them decoded to virtual IO addresses. 763 */ 764 if ((afsr & UEAFSR_P_DTE) != 0) 765 iommu_decode_fault(sc->sc_is, afar); 766 /* It's uncorrectable. Dump the regs and panic. */ 767 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx", 768 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 769} 770 771static void 772psycho_ce(void *arg) 773{ 774 struct psycho_softc *sc = (struct psycho_softc *)arg; 775 u_int64_t afar, afsr; 776 777 PSYCHO_WRITE8(sc, PSR_CE_INT_CLR, 0); 778 afar = PSYCHO_READ8(sc, PSR_CE_AFA); 779 afsr = PSYCHO_READ8(sc, PSR_CE_AFS); 780 /* It's correctable. Dump the regs and continue. */ 781 printf("%s: correctable DMA error AFAR %#lx AFSR %#lx\n", 782 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 783} 784 785static void 786psycho_bus_a(void *arg) 787{ 788 struct psycho_softc *sc = (struct psycho_softc *)arg; 789 u_int64_t afar, afsr; 790 791 afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA); 792 afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS); 793 /* It's uncorrectable. Dump the regs and panic. */ 794 panic("%s: PCI bus A error AFAR %#lx AFSR %#lx", 795 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 796} 797 798static void 799psycho_bus_b(void *arg) 800{ 801 struct psycho_softc *sc = (struct psycho_softc *)arg; 802 u_int64_t afar, afsr; 803 804 afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA); 805 afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS); 806 /* It's uncorrectable. Dump the regs and panic. */ 807 panic("%s: PCI bus B error AFAR %#lx AFSR %#lx", 808 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 809} 810 811static void 812psycho_powerfail(void *arg) 813{ 814 815 /* We lost power. Try to shut down NOW. */ 816#ifdef DEBUGGER_ON_POWERFAIL 817 struct psycho_softc *sc = (struct psycho_softc *)arg; 818 819 Debugger("powerfail"); 820 PSYCHO_WRITE8(sc, PSR_POWER_INT_CLR, 0); 821#else 822 printf("Power Failure Detected: Shutting down NOW.\n"); 823 shutdown_nice(0); 824#endif 825} 826 827#ifdef PSYCHO_MAP_WAKEUP 828static void 829psycho_wakeup(void *arg) 830{ 831 struct psycho_softc *sc = (struct psycho_softc *)arg; 832 833 PSYCHO_WRITE8(sc, PSR_PWRMGT_INT_CLR, 0); 834 /* Gee, we don't really have a framework to deal with this properly. */ 835 printf("%s: power management wakeup\n", device_get_name(sc->sc_dev)); 836} 837#endif /* PSYCHO_MAP_WAKEUP */ 838 839/* initialise the IOMMU... */ 840void 841psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 842{ 843 char *name; 844 struct iommu_state *is = sc->sc_is; 845 846 /* punch in our copies */ 847 is->is_bustag = sc->sc_bustag; 848 is->is_bushandle = sc->sc_bushandle; 849 is->is_iommu = PSR_IOMMU; 850 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG; 851 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG; 852 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG; 853 is->is_dva = PSR_IOMMU_SVADIAG; 854 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG; 855 856 /* give us a nice name.. */ 857 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 858 if (name == 0) 859 panic("couldn't malloc iommu name"); 860 snprintf(name, 32, "%s dvma", device_get_name(sc->sc_dev)); 861 862 iommu_init(name, is, tsbsize, sc->sc_dvmabase, 0); 863} 864 865static void 866psycho_binit(device_t busdev, struct ofw_pci_bdesc *obd) 867{ 868 869#ifdef PSYCHO_DEBUG 870 printf("psycho at %u/%u/%u: setting bus #s to %u/%u/%u\n", 871 obd->obd_bus, obd->obd_slot, obd->obd_func, obd->obd_bus, 872 obd->obd_secbus, obd->obd_subbus); 873#endif /* PSYCHO_DEBUG */ 874 /* 875 * NOTE: this must be kept in this order, since the last write will 876 * change the config space address of the psycho. 877 */ 878 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func, 879 PCSR_SUBBUS, obd->obd_subbus, 1); 880 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func, 881 PCSR_SECBUS, obd->obd_secbus, 1); 882} 883 884static int 885psycho_maxslots(device_t dev) 886{ 887 888 /* 889 * XXX: is this correct? At any rate, a number that is too high 890 * shouldn't do any harm, if only because of the way things are 891 * handled in psycho_read_config. 892 */ 893 return (31); 894} 895 896/* 897 * Keep a table of quirky PCI devices that need fixups before the MI PCI code 898 * creates the resource lists. This needs to be moved around once other bus 899 * drivers are added. Moving it to the MI code should maybe be reconsidered 900 * if one of these devices appear in non-sparc64 boxen. It's likely that not 901 * all BIOSes/firmwares can deal with them. 902 */ 903struct psycho_dquirk { 904 u_int32_t dq_devid; 905 int dq_quirk; 906}; 907 908/* Quirk types. May be or'ed together. */ 909#define DQT_BAD_INTPIN 1 /* Intpin reg 0, but intpin used */ 910 911static struct psycho_dquirk dquirks[] = { 912 { 0x1001108e, DQT_BAD_INTPIN }, /* Sun HME (PCIO func. 1) */ 913 { 0x1101108e, DQT_BAD_INTPIN }, /* Sun GEM (PCIO2 func. 1) */ 914 { 0x1102108e, DQT_BAD_INTPIN }, /* Sun FireWire ctl. (PCIO2 func. 2) */ 915 { 0x1103108e, DQT_BAD_INTPIN }, /* Sun USB ctl. (PCIO2 func. 3) */ 916}; 917 918#define NDQUIRKS (sizeof(dquirks) / sizeof(dquirks[0])) 919 920static u_int32_t 921psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 922 int width) 923{ 924 struct psycho_softc *sc; 925 bus_space_handle_t bh; 926 u_long offset = 0; 927 u_int32_t r, devid; 928 int i; 929 930 /* 931 * The psycho bridge does not tolerate accesses to unconfigured PCI 932 * devices' or function's config space, so look up the device in the 933 * firmware device tree first, and if it is not present, return a value 934 * that will make the detection code think that there is no device here. 935 * This is ugly... 936 */ 937 if (reg == 0 && ofw_pci_find_node(bus, slot, func) == 0) 938 return (0xffffffff); 939 sc = (struct psycho_softc *)device_get_softc(dev); 940 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 941 bh = sc->sc_bh[PCI_CS_CONFIG]; 942 switch (width) { 943 case 1: 944 r = bus_space_read_1(sc->sc_cfgt, bh, offset); 945 break; 946 case 2: 947 r = bus_space_read_2(sc->sc_cfgt, bh, offset); 948 break; 949 case 4: 950 r = bus_space_read_4(sc->sc_cfgt, bh, offset); 951 break; 952 default: 953 panic("psycho_read_config: bad width"); 954 } 955 if (reg == PCIR_INTPIN && r == 0) { 956 /* Check for DQT_BAD_INTPIN quirk. */ 957 devid = psycho_read_config(dev, bus, slot, func, 958 PCIR_DEVVENDOR, 4); 959 for (i = 0; i < NDQUIRKS; i++) { 960 if (dquirks[i].dq_devid == devid) { 961 /* 962 * Need to set the intpin to a value != 0 so 963 * that the MI code will think that this device 964 * has an interrupt. 965 * Just use 1 (intpin a) for now. This is, of 966 * course, bogus, but since interrupts are 967 * routed in advance, this does not really 968 * matter. 969 */ 970 if ((dquirks[i].dq_quirk & DQT_BAD_INTPIN) != 0) 971 r = 1; 972 break; 973 } 974 } 975 } 976 return (r); 977} 978 979static void 980psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, 981 u_int reg, u_int32_t val, int width) 982{ 983 struct psycho_softc *sc; 984 bus_space_handle_t bh; 985 u_long offset = 0; 986 987 sc = (struct psycho_softc *)device_get_softc(dev); 988 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 989 bh = sc->sc_bh[PCI_CS_CONFIG]; 990 switch (width) { 991 case 1: 992 bus_space_write_1(sc->sc_cfgt, bh, offset, val); 993 break; 994 case 2: 995 bus_space_write_2(sc->sc_cfgt, bh, offset, val); 996 break; 997 case 4: 998 bus_space_write_4(sc->sc_cfgt, bh, offset, val); 999 break; 1000 default: 1001 panic("psycho_write_config: bad width"); 1002 } 1003} 1004 1005static int 1006psycho_route_interrupt(device_t bus, device_t dev, int pin) 1007{ 1008 1009 /* 1010 * XXX: ugly loathsome hack: 1011 * We can't use ofw_pci_route_intr() here; the device passed may be 1012 * the one of a bridge, so the original device can't be recovered. 1013 * 1014 * We need to use the firmware to route interrupts, however it has 1015 * no interface which could be used to interpret intpins; instead, 1016 * all assignments are done by device. 1017 * 1018 * The MI pci code will try to reroute interrupts of 0, although they 1019 * are correct; all other interrupts are preinitialized, so if we 1020 * get here, the intline is either 0 (so return 0), or we hit a 1021 * device which was not preinitialized (e.g. hotplugged stuff), in 1022 * which case we are lost. 1023 */ 1024 return (0); 1025} 1026 1027static int 1028psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 1029{ 1030 struct psycho_softc *sc; 1031 1032 sc = (struct psycho_softc *)device_get_softc(dev); 1033 switch (which) { 1034 case PCIB_IVAR_BUS: 1035 *result = sc->sc_busno; 1036 return (0); 1037 } 1038 return (ENOENT); 1039} 1040 1041/* Write to the correct clr register, and call the actual handler. */ 1042static void 1043psycho_intr_stub(void *arg) 1044{ 1045 struct psycho_clr *pc; 1046 1047 pc = (struct psycho_clr *)arg; 1048 pc->pci_handler(pc->pci_arg); 1049 PSYCHO_WRITE8(pc->pci_sc, pc->pci_clr, 0); 1050} 1051 1052#ifdef PSYCHO_STRAY 1053/* 1054 * Write to the correct clr register and return. arg is the address of the clear 1055 * register to be used. 1056 * XXX: print a message? 1057 */ 1058static void 1059psycho_intr_stray(void *arg) 1060{ 1061 struct psycho_strayclr *sclr = arg; 1062 1063 PSYCHO_WRITE8(sclr->psc_sc, sclr->psc_clr, 0); 1064} 1065#endif 1066 1067static int 1068psycho_setup_intr(device_t dev, device_t child, 1069 struct resource *ires, int flags, driver_intr_t *intr, void *arg, 1070 void **cookiep) 1071{ 1072 struct psycho_softc *sc; 1073 struct psycho_clr *pc; 1074 bus_addr_t intrmapptr, intrclrptr; 1075 long vec = rman_get_start(ires); 1076 u_int64_t mr; 1077 int ino, error; 1078 1079 sc = (struct psycho_softc *)device_get_softc(dev); 1080 pc = (struct psycho_clr *)malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT); 1081 if (pc == NULL) 1082 return (NULL); 1083 1084 /* 1085 * Hunt through all the interrupt mapping regs to look for our 1086 * interrupt vector. 1087 * 1088 * XXX We only compare INOs rather than IGNs since the firmware may 1089 * not provide the IGN and the IGN is constant for all device on that 1090 * PCI controller. This could cause problems for the FFB/external 1091 * interrupt which has a full vector that can be set arbitrarily. 1092 */ 1093 ino = INTINO(vec); 1094 1095 if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) { 1096 printf("Cannot find interrupt vector %lx\n", vec); 1097 free(pc, M_DEVBUF); 1098 return (NULL); 1099 } 1100 1101#ifdef PSYCHO_DEBUG 1102 device_printf(dev, "psycho_setup_intr: INO %d, map %#lx, clr %#lx\n", 1103 ino, (u_long)intrmapptr, (u_long)intrclrptr); 1104#endif 1105 pc->pci_sc = sc; 1106 pc->pci_arg = arg; 1107 pc->pci_handler = intr; 1108 pc->pci_clr = intrclrptr; 1109 /* Disable the interrupt while we fiddle with it */ 1110 mr = PSYCHO_READ8(sc, intrmapptr); 1111 PSYCHO_WRITE8(sc, intrmapptr, mr & ~INTMAP_V); 1112 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 1113 psycho_intr_stub, pc, cookiep); 1114 if (error != 0) { 1115 free(pc, M_DEVBUF); 1116 return (error); 1117 } 1118 pc->pci_cookie = *cookiep; 1119 *cookiep = pc; 1120 1121 /* 1122 * Clear the interrupt, it might have been triggered before it was 1123 * set up. 1124 */ 1125 PSYCHO_WRITE8(sc, intrclrptr, 0); 1126 /* 1127 * Enable the interrupt and program the target module now we have the 1128 * handler installed. 1129 */ 1130 PSYCHO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(mr, PCPU_GET(mid))); 1131 return (error); 1132} 1133 1134static int 1135psycho_teardown_intr(device_t dev, device_t child, 1136 struct resource *vec, void *cookie) 1137{ 1138 struct psycho_clr *pc; 1139 int error; 1140 1141 pc = (struct psycho_clr *)cookie; 1142 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 1143 pc->pci_cookie); 1144 /* 1145 * Don't disable the interrupt for now, so that stray interupts get 1146 * detected... 1147 */ 1148 if (error != 0) 1149 free(pc, M_DEVBUF); 1150 return (error); 1151} 1152 1153static struct resource * 1154psycho_alloc_resource(device_t bus, device_t child, int type, int *rid, 1155 u_long start, u_long end, u_long count, u_int flags) 1156{ 1157 struct psycho_softc *sc; 1158 struct resource *rv; 1159 struct rman *rm; 1160 bus_space_tag_t bt; 1161 bus_space_handle_t bh; 1162 int needactivate = flags & RF_ACTIVE; 1163 1164 flags &= ~RF_ACTIVE; 1165 1166 sc = (struct psycho_softc *)device_get_softc(bus); 1167 if (type == SYS_RES_IRQ) { 1168 /* 1169 * XXX: Don't accept blank ranges for now, only single 1170 * interrupts. The other case should not happen with the MI pci 1171 * code... 1172 * XXX: This may return a resource that is out of the range 1173 * that was specified. Is this correct...? 1174 */ 1175 if (start != end) 1176 panic("psycho_alloc_resource: XXX: interrupt range"); 1177 start = end |= sc->sc_ign; 1178 return (bus_alloc_resource(bus, type, rid, start, end, 1179 count, flags)); 1180 } 1181 switch (type) { 1182 case SYS_RES_MEMORY: 1183 rm = &sc->sc_mem_rman; 1184 bt = sc->sc_memt; 1185 bh = sc->sc_bh[PCI_CS_MEM32]; 1186 break; 1187 case SYS_RES_IOPORT: 1188 rm = &sc->sc_io_rman; 1189 bt = sc->sc_iot; 1190 bh = sc->sc_bh[PCI_CS_IO]; 1191 break; 1192 default: 1193 return (NULL); 1194 } 1195 1196 rv = rman_reserve_resource(rm, start, end, count, flags, child); 1197 if (rv == NULL) 1198 return (NULL); 1199 1200 bh += rman_get_start(rv); 1201 rman_set_bustag(rv, bt); 1202 rman_set_bushandle(rv, bh); 1203 1204 if (needactivate) { 1205 if (bus_activate_resource(child, type, *rid, rv)) { 1206 rman_release_resource(rv); 1207 return (NULL); 1208 } 1209 } 1210 1211 return (rv); 1212} 1213 1214static int 1215psycho_activate_resource(device_t bus, device_t child, int type, int rid, 1216 struct resource *r) 1217{ 1218 void *p; 1219 int error; 1220 1221 if (type == SYS_RES_IRQ) 1222 return (bus_activate_resource(bus, type, rid, r)); 1223 if (type == SYS_RES_MEMORY) { 1224 /* 1225 * Need to memory-map the device space, as some drivers depend 1226 * on the virtual address being set and useable. 1227 */ 1228 error = sparc64_bus_mem_map(rman_get_bustag(r), 1229 rman_get_bushandle(r), rman_get_size(r), 0, NULL, &p); 1230 if (error != 0) 1231 return (error); 1232 rman_set_virtual(r, p); 1233 } 1234 return (rman_activate_resource(r)); 1235} 1236 1237static int 1238psycho_deactivate_resource(device_t bus, device_t child, int type, int rid, 1239 struct resource *r) 1240{ 1241 1242 if (type == SYS_RES_IRQ) 1243 return (bus_deactivate_resource(bus, type, rid, r)); 1244 if (type == SYS_RES_MEMORY) { 1245 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r)); 1246 rman_set_virtual(r, NULL); 1247 } 1248 return (rman_deactivate_resource(r)); 1249} 1250 1251static int 1252psycho_release_resource(device_t bus, device_t child, int type, int rid, 1253 struct resource *r) 1254{ 1255 int error; 1256 1257 if (type == SYS_RES_IRQ) 1258 return (bus_release_resource(bus, type, rid, r)); 1259 if (rman_get_flags(r) & RF_ACTIVE) { 1260 error = bus_deactivate_resource(child, type, rid, r); 1261 if (error) 1262 return error; 1263 } 1264 return (rman_release_resource(r)); 1265} 1266 1267static int 1268psycho_intr_pending(device_t dev, int intr) 1269{ 1270 struct psycho_softc *sc; 1271 u_long diag; 1272 1273 sc = (struct psycho_softc *)device_get_softc(dev); 1274 if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) { 1275 printf("psycho_intr_pending: mapping not found for %d\n", intr); 1276 return (0); 1277 } 1278 return (diag != 0); 1279} 1280 1281static bus_space_handle_t 1282psycho_get_bus_handle(device_t dev, enum sbbt_id id, 1283 bus_space_handle_t childhdl, bus_space_tag_t *tag) 1284{ 1285 struct psycho_softc *sc; 1286 1287 sc = (struct psycho_softc *)device_get_softc(dev); 1288 switch(id) { 1289 case SBBT_IO: 1290 *tag = sc->sc_iot; 1291 return (sc->sc_bh[PCI_CS_IO] + childhdl); 1292 case SBBT_MEM: 1293 *tag = sc->sc_memt; 1294 return (sc->sc_bh[PCI_CS_MEM32] + childhdl); 1295 default: 1296 panic("psycho_get_bus_handle: illegal space\n"); 1297 } 1298} 1299 1300/* 1301 * below here is bus space and bus dma support 1302 */ 1303static bus_space_tag_t 1304psycho_alloc_bus_tag(struct psycho_softc *sc, int type) 1305{ 1306 bus_space_tag_t bt; 1307 1308 bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 1309 M_NOWAIT | M_ZERO); 1310 if (bt == NULL) 1311 panic("psycho_alloc_bus_tag: out of memory"); 1312 1313 bzero(bt, sizeof *bt); 1314 bt->bst_cookie = sc; 1315 bt->bst_parent = sc->sc_bustag; 1316 bt->bst_type = type; 1317 return (bt); 1318} 1319 1320/* 1321 * hooks into the iommu dvma calls. 1322 */ 1323static int 1324psycho_dmamem_alloc_size(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 1325 int flags, bus_dmamap_t *mapp, bus_size_t size) 1326{ 1327 struct psycho_softc *sc; 1328 1329 sc = (struct psycho_softc *)pdmat->dt_cookie; 1330 return (iommu_dvmamem_alloc_size(pdmat, ddmat, sc->sc_is, vaddr, flags, 1331 mapp, size)); 1332} 1333 1334static int 1335psycho_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 1336 int flags, bus_dmamap_t *mapp) 1337{ 1338 struct psycho_softc *sc; 1339 1340 sc = (struct psycho_softc *)pdmat->dt_cookie; 1341 return (iommu_dvmamem_alloc(pdmat, ddmat, sc->sc_is, vaddr, flags, 1342 mapp)); 1343} 1344 1345static void 1346psycho_dmamem_free_size(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 1347 bus_dmamap_t map, bus_size_t size) 1348{ 1349 struct psycho_softc *sc; 1350 1351 sc = (struct psycho_softc *)pdmat->dt_cookie; 1352 iommu_dvmamem_free_size(pdmat, ddmat, sc->sc_is, vaddr, map, size); 1353} 1354 1355static void 1356psycho_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 1357 bus_dmamap_t map) 1358{ 1359 struct psycho_softc *sc; 1360 1361 sc = (struct psycho_softc *)pdmat->dt_cookie; 1362 iommu_dvmamem_free(pdmat, ddmat, sc->sc_is, vaddr, map); 1363} 1364 1365static int 1366psycho_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags, 1367 bus_dmamap_t *mapp) 1368{ 1369 struct psycho_softc *sc; 1370 1371 sc = (struct psycho_softc *)pdmat->dt_cookie; 1372 return (iommu_dvmamap_create(pdmat, ddmat, sc->sc_is, flags, mapp)); 1373 1374} 1375 1376static int 1377psycho_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1378 bus_dmamap_t map) 1379{ 1380 struct psycho_softc *sc; 1381 1382 sc = (struct psycho_softc *)pdmat->dt_cookie; 1383 return (iommu_dvmamap_destroy(pdmat, ddmat, sc->sc_is, map)); 1384} 1385 1386static int 1387psycho_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 1388 void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback, 1389 void *callback_arg, int flags) 1390{ 1391 struct psycho_softc *sc; 1392 1393 sc = (struct psycho_softc *)pdmat->dt_cookie; 1394 return (iommu_dvmamap_load(pdmat, ddmat, sc->sc_is, map, buf, buflen, 1395 callback, callback_arg, flags)); 1396} 1397 1398static int 1399psycho_dmamap_load_mbuf(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1400 bus_dmamap_t map, struct mbuf *m, bus_dmamap_callback2_t *callback, 1401 void *callback_arg, int flags) 1402{ 1403 struct psycho_softc *sc; 1404 1405 sc = (struct psycho_softc *)pdmat->dt_cookie; 1406 return (iommu_dvmamap_load_mbuf(pdmat, ddmat, sc->sc_is, map, m, 1407 callback, callback_arg, flags)); 1408} 1409 1410static int 1411psycho_dmamap_load_uio(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1412 bus_dmamap_t map, struct uio *uio, bus_dmamap_callback2_t *callback, 1413 void *callback_arg, int flags) 1414{ 1415 struct psycho_softc *sc; 1416 1417 sc = (struct psycho_softc *)pdmat->dt_cookie; 1418 return (iommu_dvmamap_load_uio(pdmat, ddmat, sc->sc_is, map, uio, 1419 callback, callback_arg, flags)); 1420} 1421 1422static void 1423psycho_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 1424{ 1425 struct psycho_softc *sc; 1426 1427 sc = (struct psycho_softc *)pdmat->dt_cookie; 1428 iommu_dvmamap_unload(pdmat, ddmat, sc->sc_is, map); 1429} 1430 1431static void 1432psycho_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 1433 bus_dmasync_op_t op) 1434{ 1435 struct psycho_softc *sc; 1436 1437 sc = (struct psycho_softc *)pdmat->dt_cookie; 1438 iommu_dvmamap_sync(pdmat, ddmat, sc->sc_is, map, op); 1439} 1440