psycho.c revision 109623
1/* 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * All rights reserved. 4 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 30 * 31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 109623 2003-01-21 08:56:16Z alfred $ 32 */ 33 34/* 35 * Support for `psycho' and `psycho+' UPA to PCI bridge and 36 * UltraSPARC IIi and IIe `sabre' PCI controllers. 37 */ 38 39#include "opt_psycho.h" 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/bus.h> 44#include <sys/kernel.h> 45#include <sys/malloc.h> 46#include <sys/pcpu.h> 47 48#include <ofw/openfirm.h> 49#include <ofw/ofw_pci.h> 50 51#include <machine/bus.h> 52#include <machine/iommureg.h> 53#include <machine/bus_common.h> 54#include <machine/frame.h> 55#include <machine/intr_machdep.h> 56#include <machine/nexusvar.h> 57#include <machine/ofw_upa.h> 58#include <machine/resource.h> 59 60#include <sys/rman.h> 61 62#include <machine/iommuvar.h> 63 64#include <pci/pcivar.h> 65#include <pci/pcireg.h> 66 67#include <sparc64/pci/ofw_pci.h> 68#include <sparc64/pci/psychoreg.h> 69#include <sparc64/pci/psychovar.h> 70 71#include "pcib_if.h" 72#include "sparcbus_if.h" 73 74static void psycho_get_ranges(phandle_t, struct upa_ranges **, int *); 75static void psycho_set_intr(struct psycho_softc *, int, device_t, bus_addr_t, 76 int, driver_intr_t); 77static int psycho_find_intrmap(struct psycho_softc *, int, bus_addr_t *, 78 bus_addr_t *, u_long *); 79static void psycho_intr_stub(void *); 80#ifdef PSYCHO_STRAY 81static void psycho_intr_stray(void *); 82#endif 83static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int); 84 85 86/* Interrupt handlers */ 87static void psycho_ue(void *); 88static void psycho_ce(void *); 89static void psycho_bus_a(void *); 90static void psycho_bus_b(void *); 91static void psycho_powerfail(void *); 92#ifdef PSYCHO_MAP_WAKEUP 93static void psycho_wakeup(void *); 94#endif 95 96/* IOMMU support */ 97static void psycho_iommu_init(struct psycho_softc *, int); 98static ofw_pci_binit_t psycho_binit; 99 100/* 101 * bus space and bus dma support for UltraSPARC `psycho'. note that most 102 * of the bus dma support is provided by the iommu dvma controller. 103 */ 104static int psycho_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int, 105 bus_dmamap_t *); 106static int psycho_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 107static int psycho_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 108 void *, bus_size_t, bus_dmamap_callback_t *, void *, int); 109static int psycho_dmamap_load_mbuf(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 110 struct mbuf *, bus_dmamap_callback2_t *, void *, int); 111static int psycho_dmamap_load_uio(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 112 struct uio *, bus_dmamap_callback2_t *, void *, int); 113static void psycho_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 114static void psycho_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 115 bus_dmasync_op_t); 116static int psycho_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int, 117 bus_dmamap_t *); 118static void psycho_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *, 119 bus_dmamap_t); 120 121/* 122 * autoconfiguration 123 */ 124static int psycho_probe(device_t); 125static int psycho_attach(device_t); 126static int psycho_read_ivar(device_t, device_t, int, u_long *); 127static int psycho_setup_intr(device_t, device_t, struct resource *, int, 128 driver_intr_t *, void *, void **); 129static int psycho_teardown_intr(device_t, device_t, struct resource *, void *); 130static struct resource *psycho_alloc_resource(device_t, device_t, int, int *, 131 u_long, u_long, u_long, u_int); 132static int psycho_activate_resource(device_t, device_t, int, int, 133 struct resource *); 134static int psycho_deactivate_resource(device_t, device_t, int, int, 135 struct resource *); 136static int psycho_release_resource(device_t, device_t, int, int, 137 struct resource *); 138static int psycho_maxslots(device_t); 139static u_int32_t psycho_read_config(device_t, u_int, u_int, u_int, u_int, int); 140static void psycho_write_config(device_t, u_int, u_int, u_int, u_int, u_int32_t, 141 int); 142static int psycho_route_interrupt(device_t, device_t, int); 143static int psycho_intr_pending(device_t, int); 144static bus_space_handle_t psycho_get_bus_handle(device_t dev, enum sbbt_id id, 145 bus_space_handle_t childhdl, bus_space_tag_t *tag); 146 147static device_method_t psycho_methods[] = { 148 /* Device interface */ 149 DEVMETHOD(device_probe, psycho_probe), 150 DEVMETHOD(device_attach, psycho_attach), 151 152 /* Bus interface */ 153 DEVMETHOD(bus_print_child, bus_generic_print_child), 154 DEVMETHOD(bus_read_ivar, psycho_read_ivar), 155 DEVMETHOD(bus_setup_intr, psycho_setup_intr), 156 DEVMETHOD(bus_teardown_intr, psycho_teardown_intr), 157 DEVMETHOD(bus_alloc_resource, psycho_alloc_resource), 158 DEVMETHOD(bus_activate_resource, psycho_activate_resource), 159 DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource), 160 DEVMETHOD(bus_release_resource, psycho_release_resource), 161 162 /* pcib interface */ 163 DEVMETHOD(pcib_maxslots, psycho_maxslots), 164 DEVMETHOD(pcib_read_config, psycho_read_config), 165 DEVMETHOD(pcib_write_config, psycho_write_config), 166 DEVMETHOD(pcib_route_interrupt, psycho_route_interrupt), 167 168 /* sparcbus interface */ 169 DEVMETHOD(sparcbus_intr_pending, psycho_intr_pending), 170 DEVMETHOD(sparcbus_get_bus_handle, psycho_get_bus_handle), 171 172 { 0, 0 } 173}; 174 175static driver_t psycho_driver = { 176 "pcib", 177 psycho_methods, 178 sizeof(struct psycho_softc), 179}; 180 181static devclass_t psycho_devclass; 182 183DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0); 184 185SLIST_HEAD(, psycho_softc) psycho_softcs = 186 SLIST_HEAD_INITIALIZER(psycho_softcs); 187 188struct psycho_clr { 189 struct psycho_softc *pci_sc; 190 bus_addr_t pci_clr; /* clear register */ 191 driver_intr_t *pci_handler; /* handler to call */ 192 void *pci_arg; /* argument for the handler */ 193 void *pci_cookie; /* interrupt cookie of parent bus */ 194}; 195 196struct psycho_strayclr { 197 struct psycho_softc *psc_sc; 198 bus_addr_t psc_clr; /* clear register */ 199}; 200 201#define PSYCHO_READ8(sc, off) \ 202 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 203#define PSYCHO_WRITE8(sc, off, v) \ 204 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 205#define PCICTL_READ8(sc, off) \ 206 PSYCHO_READ8((sc), (sc)->sc_pcictl + (off)) 207#define PCICTL_WRITE8(sc, off, v) \ 208 PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v)) 209 210/* 211 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 212 * single PCI bus and does not have a streaming buffer. It often has an APB 213 * (advanced PCI bridge) connected to it, which was designed specifically for 214 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 215 * appears as two "simba"'s underneath the sabre. 216 * 217 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 218 * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while 219 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 220 * will usually find a "psycho+" since I don't think the original "psycho" 221 * ever shipped, and if it did it would be in the U30. 222 * 223 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 224 * both part of the same IC, they only have a single register space. As such, 225 * they need to be configured together, even though the autoconfiguration will 226 * attach them separately. 227 * 228 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 229 * as pci1 and pci2, although they have been implemented with other PCI bus 230 * numbers on some machines. 231 * 232 * On UltraII machines, there can be any number of "psycho+" ICs, each 233 * providing two PCI buses. 234 * 235 * 236 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 237 * the values of the following interrupts in this order: 238 * 239 * PCI Bus Error (30) 240 * DMA UE (2e) 241 * DMA CE (2f) 242 * Power Fail (25) 243 * 244 * We really should attach handlers for each. 245 */ 246#ifdef DEBUGGER_ON_POWERFAIL 247#define PSYCHO_PWRFAIL_INT_FLAGS INTR_FAST 248#else 249#define PSYCHO_PWRFAIL_INT_FLAGS 0 250#endif 251 252#define OFW_PCI_TYPE "pci" 253 254struct psycho_desc { 255 char *pd_string; 256 int pd_mode; 257 char *pd_name; 258}; 259 260static struct psycho_desc psycho_compats[] = { 261 { "pci108e,8000", PSYCHO_MODE_PSYCHO, "Psycho compatible" }, 262 { "pci108e,a000", PSYCHO_MODE_SABRE, "Sabre (US-IIi) compatible" }, 263 { "pci108e,a001", PSYCHO_MODE_SABRE, "Sabre (US-IIe) compatible" }, 264 { NULL, 0, NULL } 265}; 266 267static struct psycho_desc psycho_models[] = { 268 { "SUNW,psycho", PSYCHO_MODE_PSYCHO, "Psycho" }, 269 { "SUNW,sabre", PSYCHO_MODE_SABRE, "Sabre" }, 270 { NULL, 0, NULL } 271}; 272 273static struct psycho_desc * 274psycho_find_desc(struct psycho_desc *table, char *string) 275{ 276 struct psycho_desc *desc; 277 278 for (desc = table; desc->pd_string != NULL; desc++) { 279 if (strcmp(desc->pd_string, string) == 0) 280 return (desc); 281 } 282 return (NULL); 283} 284 285static struct psycho_desc * 286psycho_get_desc(phandle_t node, char *model) 287{ 288 struct psycho_desc *rv; 289 char compat[32]; 290 291 rv = NULL; 292 if (model != NULL) 293 rv = psycho_find_desc(psycho_models, model); 294 if (rv == NULL && 295 OF_getprop(node, "compatible", compat, sizeof(compat)) != -1) 296 rv = psycho_find_desc(psycho_compats, compat); 297 return (rv); 298} 299 300static int 301psycho_probe(device_t dev) 302{ 303 phandle_t node; 304 char *dtype; 305 306 node = nexus_get_node(dev); 307 dtype = nexus_get_device_type(dev); 308 if (nexus_get_reg(dev) != NULL && dtype != NULL && 309 strcmp(dtype, OFW_PCI_TYPE) == 0 && 310 psycho_get_desc(node, nexus_get_model(dev)) != NULL) { 311 device_set_desc(dev, "U2P UPA-PCI bridge"); 312 return (0); 313 } 314 315 return (ENXIO); 316} 317 318/* 319 * SUNW,psycho initialisation .. 320 * - find the per-psycho registers 321 * - figure out the IGN. 322 * - find our partner psycho 323 * - configure ourselves 324 * - bus range, bus, 325 * - interrupt map, 326 * - setup the chipsets. 327 * - if we're the first of the pair, initialise the IOMMU, otherwise 328 * just copy it's tags and addresses. 329 */ 330static int 331psycho_attach(device_t dev) 332{ 333 struct psycho_softc *sc; 334 struct psycho_softc *osc = NULL; 335 struct psycho_softc *asc; 336 struct upa_regs *reg; 337 struct ofw_pci_bdesc obd; 338 struct psycho_desc *desc; 339 phandle_t node; 340 u_int64_t csr; 341 u_long pcictl_offs, mlen; 342 int psycho_br[2]; 343 int n, i, nreg, rid; 344#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY) 345 bus_addr_t map, clr; 346 u_int64_t mr; 347#endif 348#ifdef PSYCHO_STRAY 349 struct psycho_strayclr *sclr; 350#endif 351 352 node = nexus_get_node(dev); 353 sc = device_get_softc(dev); 354 desc = psycho_get_desc(node, nexus_get_model(dev)); 355 356 sc->sc_node = node; 357 sc->sc_dev = dev; 358 sc->sc_dmatag = nexus_get_dmatag(dev); 359 sc->sc_mode = desc->pd_mode; 360 361 /* 362 * The psycho gets three register banks: 363 * (0) per-PBM configuration and status registers 364 * (1) per-PBM PCI configuration space, containing only the 365 * PBM 256-byte PCI header 366 * (2) the shared psycho configuration registers (struct psychoreg) 367 */ 368 reg = nexus_get_reg(dev); 369 nreg = nexus_get_nreg(dev); 370 /* Register layouts are different. stuupid. */ 371 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 372 if (nreg <= 2) 373 panic("psycho_attach: %d not enough registers", nreg); 374 sc->sc_basepaddr = (vm_offset_t)UPA_REG_PHYS(®[2]); 375 mlen = UPA_REG_SIZE(®[2]); 376 pcictl_offs = UPA_REG_PHYS(®[0]); 377 } else { 378 if (nreg <= 0) 379 panic("psycho_attach: %d not enough registers", nreg); 380 sc->sc_basepaddr = (vm_offset_t)UPA_REG_PHYS(®[0]); 381 mlen = UPA_REG_SIZE(reg); 382 pcictl_offs = sc->sc_basepaddr + PSR_PCICTL0; 383 } 384 385 /* 386 * Match other psycho's that are already configured against 387 * the base physical address. This will be the same for a 388 * pair of devices that share register space. 389 */ 390 SLIST_FOREACH(asc, &psycho_softcs, sc_link) { 391 if (asc->sc_basepaddr == sc->sc_basepaddr) { 392 /* Found partner */ 393 osc = asc; 394 break; 395 } 396 } 397 398 if (osc == NULL) { 399 rid = 0; 400 sc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 401 sc->sc_basepaddr, sc->sc_basepaddr + mlen - 1, mlen, 402 RF_ACTIVE); 403 if (sc->sc_mem_res == NULL || 404 rman_get_start(sc->sc_mem_res) != sc->sc_basepaddr) 405 panic("psycho_attach: can't allocate device memory"); 406 sc->sc_bustag = rman_get_bustag(sc->sc_mem_res); 407 sc->sc_bushandle = rman_get_bushandle(sc->sc_mem_res); 408 } else { 409 /* 410 * There's another psycho using the same register space. Copy the 411 * relevant stuff. 412 */ 413 sc->sc_mem_res = NULL; 414 sc->sc_bustag = osc->sc_bustag; 415 sc->sc_bushandle = osc->sc_bushandle; 416 } 417 if (pcictl_offs < sc->sc_basepaddr) 418 panic("psycho_attach: bogus pci control register location"); 419 sc->sc_pcictl = pcictl_offs - sc->sc_basepaddr; 420 csr = PSYCHO_READ8(sc, PSR_CS); 421 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 422 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 423 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 424 425 device_printf(dev, "%s, impl %d, version %d, ign %#x\n", 426 desc->pd_name, (int)PSYCHO_GCSR_IMPL(csr), 427 (int)PSYCHO_GCSR_VERS(csr), sc->sc_ign); 428 429 /* 430 * Setup the PCI control register 431 */ 432 csr = PCICTL_READ8(sc, PCR_CS); 433 csr |= PCICTL_MRLM | PCICTL_ARB_PARK | PCICTL_ERRINTEN | PCICTL_4ENABLE; 434 csr &= ~(PCICTL_SERR | PCICTL_CPU_PRIO | PCICTL_ARB_PRIO | 435 PCICTL_RTRYWAIT); 436 PCICTL_WRITE8(sc, PCR_CS, csr); 437 438 if (sc->sc_mode == PSYCHO_MODE_SABRE) { 439 /* 440 * Use the PROM preset for now. 441 */ 442 csr = PCICTL_READ8(sc, PCR_TAS); 443 if (csr == 0) 444 panic("psycho_attach: sabre TAS not initialized."); 445 sc->sc_dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT; 446 } else 447 sc->sc_dvmabase = -1; 448 449 /* Grab the psycho ranges */ 450 psycho_get_ranges(sc->sc_node, &sc->sc_range, &sc->sc_nrange); 451 452 /* Initialize memory and i/o rmans */ 453 sc->sc_io_rman.rm_type = RMAN_ARRAY; 454 sc->sc_io_rman.rm_descr = "Psycho PCI I/O Ports"; 455 if (rman_init(&sc->sc_io_rman) != 0 || 456 rman_manage_region(&sc->sc_io_rman, 0, PSYCHO_IO_SIZE) != 0) 457 panic("psycho_probe: failed to set up i/o rman"); 458 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 459 sc->sc_mem_rman.rm_descr = "Psycho PCI Memory"; 460 if (rman_init(&sc->sc_mem_rman) != 0 || 461 rman_manage_region(&sc->sc_mem_rman, 0, PSYCHO_MEM_SIZE) != 0) 462 panic("psycho_probe: failed to set up memory rman"); 463 /* 464 * Find the addresses of the various bus spaces. 465 * There should not be multiple ones of one kind. 466 * The physical start addresses of the ranges are the configuration, 467 * memory and IO handles. 468 */ 469 for (n = 0; n < sc->sc_nrange; n++) { 470 i = UPA_RANGE_CS(&sc->sc_range[n]); 471 if (sc->sc_bh[i] != 0) 472 panic("psycho_attach: duplicate range for space %d", i); 473 sc->sc_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]); 474 } 475 /* 476 * Check that all needed handles are present. The PCI_CS_MEM64 one is 477 * not currently used. 478 */ 479 for (n = 0; n < 3; n++) { 480 if (sc->sc_bh[n] == 0) 481 panic("psycho_attach: range %d missing", n); 482 } 483 484 /* allocate our tags */ 485 sc->sc_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 486 sc->sc_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE); 487 sc->sc_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE); 488 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 489 0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_dmat) != 0) 490 panic("psycho_attach: bus_dma_tag_create failed"); 491 /* Customize the tag */ 492 sc->sc_dmat->dt_cookie = sc; 493 sc->sc_dmat->dt_dmamap_create = psycho_dmamap_create; 494 sc->sc_dmat->dt_dmamap_destroy = psycho_dmamap_destroy; 495 sc->sc_dmat->dt_dmamap_load = psycho_dmamap_load; 496 sc->sc_dmat->dt_dmamap_load_mbuf = psycho_dmamap_load_mbuf; 497 sc->sc_dmat->dt_dmamap_load_uio = psycho_dmamap_load_uio; 498 sc->sc_dmat->dt_dmamap_unload = psycho_dmamap_unload; 499 sc->sc_dmat->dt_dmamap_sync = psycho_dmamap_sync; 500 sc->sc_dmat->dt_dmamem_alloc = psycho_dmamem_alloc; 501 sc->sc_dmat->dt_dmamem_free = psycho_dmamem_free; 502 /* XXX: register as root dma tag (kluge). */ 503 sparc64_root_dma_tag = sc->sc_dmat; 504 505 /* Register the softc, this is needed for paired psychos. */ 506 SLIST_INSERT_HEAD(&psycho_softcs, sc, sc_link); 507 508 /* 509 * And finally, if we're a sabre or the first of a pair of psycho's to 510 * arrive here, start up the IOMMU and get a config space tag. 511 */ 512 if (osc == NULL) { 513 /* 514 * Establish handlers for interesting interrupts.... 515 * 516 * XXX We need to remember these and remove this to support 517 * hotplug on the UPA/FHC bus. 518 * 519 * XXX Not all controllers have these, but installing them 520 * is better than trying to sort through this mess. 521 */ 522 psycho_set_intr(sc, 0, dev, PSR_UE_INT_MAP, INTR_FAST, 523 psycho_ue); 524 psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce); 525 psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST, 526 psycho_bus_a); 527 psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, 528 PSYCHO_PWRFAIL_INT_FLAGS, psycho_powerfail); 529 /* Psycho-specific initialization. */ 530 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 531 /* 532 * Sabres do not have the following two interrupts. 533 */ 534 psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, 535 INTR_FAST, psycho_bus_b); 536#ifdef PSYCHO_MAP_WAKEUP 537 /* 538 * psycho_wakeup() doesn't do anything useful right 539 * now. 540 */ 541 psycho_set_intr(sc, 5, dev, PSR_PWRMGT_INT_MAP, 0, 542 psycho_wakeup); 543#endif /* PSYCHO_MAP_WAKEUP */ 544 545 /* Initialize the counter-timer. */ 546 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, 547 PSR_TC0); 548 } 549 550 /* 551 * Setup IOMMU and PCI configuration if we're the first 552 * of a pair of psycho's to arrive here. 553 * 554 * We should calculate a TSB size based on amount of RAM 555 * and number of bus controllers and number and type of 556 * child devices. 557 * 558 * For the moment, 32KB should be more than enough. 559 */ 560 sc->sc_is = malloc(sizeof(struct iommu_state), M_DEVBUF, 561 M_NOWAIT); 562 if (sc->sc_is == NULL) 563 panic("psycho_attach: malloc iommu_state failed"); 564 sc->sc_is->is_sb[0] = 0; 565 sc->sc_is->is_sb[1] = 0; 566 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 567 sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF; 568 psycho_iommu_init(sc, 2); 569 } else { 570 /* Just copy IOMMU state, config tag and address */ 571 sc->sc_is = osc->sc_is; 572 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 573 sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF; 574 iommu_reset(sc->sc_is); 575 } 576 577 /* 578 * Enable all interrupts, clear all interrupt states, and install an 579 * interrupt handler for OBIO interrupts, which can be ISA ones 580 * (to frob the interrupt clear registers). 581 * This aids the debugging of interrupt routing problems, and is needed 582 * for isa drivers that use isa_irq_pending (otherwise the registers 583 * will never be cleared). 584 */ 585#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY) 586 for (map = PSR_PCIA0_INT_MAP, clr = PSR_PCIA0_INT_CLR, n = 0; 587 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { 588 mr = PSYCHO_READ8(sc, map); 589#ifdef PSYCHO_DEBUG 590 device_printf(dev, "intr map (pci) %d: %#lx\n", n, (u_long)mr); 591#endif 592 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 593 for (i = 0; i < 4; i++) 594 PCICTL_WRITE8(sc, clr + i * 8, 0); 595 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 596 } 597 for (map = PSR_SCSI_INT_MAP, clr = PSR_SCSI_INT_CLR, n = 0; 598 map <= PSR_SERIAL_INT_MAP; map += 8, clr += 8, n++) { 599 mr = PSYCHO_READ8(sc, map); 600#ifdef PSYCHO_DEBUG 601 device_printf(dev, "intr map (obio) %d: %#lx, clr: %#lx\n", n, 602 (u_long)mr, (u_long)clr); 603#endif 604 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 605 PSYCHO_WRITE8(sc, clr, 0); 606#ifdef PSYCHO_STRAY 607 /* 608 * This can cause interrupt storms, and is therefore disabled 609 * by default. 610 * XXX: use intr_setup() to not confuse higher level code 611 */ 612 if (INTVEC(mr) != 0x7e6 && INTVEC(mr) != 0x7e7 && 613 INTVEC(mr) != 0) { 614 sclr = malloc(sizeof(*sclr), M_DEVBUF, 0); 615 sclr->psc_sc = sc; 616 sclr->psc_clr = clr; 617 intr_setup(PIL_LOW, intr_fast, INTVEC(mr), 618 psycho_intr_stray, sclr); 619 } 620#endif 621 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 622 } 623#endif 624 625 /* 626 * Get the bus range from the firmware; it is used solely for obtaining 627 * the inital bus number, and cannot be trusted on all machines. 628 */ 629 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); 630 if (n == -1) 631 panic("could not get psycho bus-range"); 632 if (n != sizeof(psycho_br)) 633 panic("broken psycho bus-range (%d)", n); 634 635 sc->sc_busno = ofw_pci_alloc_busno(sc->sc_node); 636 obd.obd_bus = psycho_br[0]; 637 obd.obd_secbus = obd.obd_subbus = sc->sc_busno; 638 obd.obd_slot = PCS_DEVICE; 639 obd.obd_func = PCS_FUNC; 640 obd.obd_init = psycho_binit; 641 obd.obd_super = NULL; 642 /* Initial setup. */ 643 psycho_binit(dev, &obd); 644 /* Update the bus number to what was just programmed. */ 645 obd.obd_bus = obd.obd_secbus; 646 /* 647 * Initialize the interrupt registers of all devices hanging from 648 * the host bridge directly or indirectly via PCI-PCI bridges. 649 * The MI code (and the PCI spec) assume that this is done during 650 * system initialization, however the firmware does not do this 651 * at least on some models, and we probably shouldn't trust that 652 * the firmware uses the same model as this driver if it does. 653 * Additionally, set up the bus numbers and ranges. 654 */ 655 ofw_pci_init(dev, sc->sc_node, sc->sc_ign, &obd); 656 657 device_add_child(dev, "pci", device_get_unit(dev)); 658 return (bus_generic_attach(dev)); 659} 660 661static void 662psycho_set_intr(struct psycho_softc *sc, int index, 663 device_t dev, bus_addr_t map, int iflags, driver_intr_t handler) 664{ 665 int rid, vec; 666 u_int64_t mr; 667 668 mr = PSYCHO_READ8(sc, map); 669 vec = INTVEC(mr); 670 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 671 vec, vec, 1, RF_ACTIVE); 672 if (sc->sc_irq_res[index] == NULL) 673 panic("psycho_set_intr: failed to get interrupt"); 674 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 675 handler, sc, &sc->sc_ihand[index]); 676 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 677} 678 679static int 680psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 681 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 682{ 683 bus_addr_t intrmap, intrclr; 684 u_int64_t im; 685 u_long diag; 686 int found; 687 688 found = 0; 689 /* Hunt thru obio first */ 690 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG); 691 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR; 692 intrmap <= PSR_SERIAL_INT_MAP; intrmap += 8, intrclr += 8, 693 diag >>= 2) { 694 im = PSYCHO_READ8(sc, intrmap); 695 if (INTINO(im) == ino) { 696 diag &= 2; 697 found = 1; 698 break; 699 } 700 } 701 702 if (!found) { 703 diag = PSYCHO_READ8(sc, PSR_PCI_INT_DIAG); 704 /* Now do PCI interrupts */ 705 for (intrmap = PSR_PCIA0_INT_MAP, intrclr = PSR_PCIA0_INT_CLR; 706 intrmap <= PSR_PCIB3_INT_MAP; intrmap += 8, intrclr += 32, 707 diag >>= 8) { 708 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 709 (intrmap == PSR_PCIA2_INT_MAP || 710 intrmap == PSR_PCIA3_INT_MAP)) 711 continue; 712 im = PSYCHO_READ8(sc, intrmap); 713 if (((im ^ ino) & 0x3c) == 0) { 714 intrclr += 8 * (ino & 3); 715 diag = (diag >> ((ino & 3) * 2)) & 2; 716 found = 1; 717 break; 718 } 719 } 720 } 721 if (intrmapptr != NULL) 722 *intrmapptr = intrmap; 723 if (intrclrptr != NULL) 724 *intrclrptr = intrclr; 725 if (intrdiagptr != NULL) 726 *intrdiagptr = diag; 727 return (found); 728} 729 730/* grovel the OBP for various psycho properties */ 731static void 732psycho_get_ranges(phandle_t node, struct upa_ranges **rp, int *np) 733{ 734 735 *np = OF_getprop_alloc(node, "ranges", sizeof(**rp), (void **)rp); 736 if (*np == -1) 737 panic("could not get psycho ranges"); 738} 739 740/* 741 * Interrupt handlers. 742 */ 743static void 744psycho_ue(void *arg) 745{ 746 struct psycho_softc *sc = (struct psycho_softc *)arg; 747 u_int64_t afar, afsr; 748 749 afar = PSYCHO_READ8(sc, PSR_UE_AFA); 750 afsr = PSYCHO_READ8(sc, PSR_UE_AFS); 751 /* 752 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause 753 * the AFAR to be set to the physical address of the TTE entry that 754 * was invalid/write protected. Call into the iommu code to have 755 * them decoded to virtual IO addresses. 756 */ 757 if ((afsr & UEAFSR_P_DTE) != 0) 758 iommu_decode_fault(sc->sc_is, afar); 759 /* It's uncorrectable. Dump the regs and panic. */ 760 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx", 761 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 762} 763 764static void 765psycho_ce(void *arg) 766{ 767 struct psycho_softc *sc = (struct psycho_softc *)arg; 768 u_int64_t afar, afsr; 769 770 PSYCHO_WRITE8(sc, PSR_CE_INT_CLR, 0); 771 afar = PSYCHO_READ8(sc, PSR_CE_AFA); 772 afsr = PSYCHO_READ8(sc, PSR_CE_AFS); 773 /* It's correctable. Dump the regs and continue. */ 774 printf("%s: correctable DMA error AFAR %#lx AFSR %#lx\n", 775 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 776} 777 778static void 779psycho_bus_a(void *arg) 780{ 781 struct psycho_softc *sc = (struct psycho_softc *)arg; 782 u_int64_t afar, afsr; 783 784 afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA); 785 afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS); 786 /* It's uncorrectable. Dump the regs and panic. */ 787 panic("%s: PCI bus A error AFAR %#lx AFSR %#lx", 788 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 789} 790 791static void 792psycho_bus_b(void *arg) 793{ 794 struct psycho_softc *sc = (struct psycho_softc *)arg; 795 u_int64_t afar, afsr; 796 797 afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA); 798 afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS); 799 /* It's uncorrectable. Dump the regs and panic. */ 800 panic("%s: PCI bus B error AFAR %#lx AFSR %#lx", 801 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 802} 803 804static void 805psycho_powerfail(void *arg) 806{ 807 808 /* We lost power. Try to shut down NOW. */ 809#ifdef DEBUGGER_ON_POWERFAIL 810 struct psycho_softc *sc = (struct psycho_softc *)arg; 811 812 Debugger("powerfail"); 813 PSYCHO_WRITE8(sc, PSR_POWER_INT_CLR, 0); 814#else 815 printf("Power Failure Detected: Shutting down NOW.\n"); 816 shutdown_nice(0); 817#endif 818} 819 820#ifdef PSYCHO_MAP_WAKEUP 821static void 822psycho_wakeup(void *arg) 823{ 824 struct psycho_softc *sc = (struct psycho_softc *)arg; 825 826 PSYCHO_WRITE8(sc, PSR_PWRMGT_INT_CLR, 0); 827 /* Gee, we don't really have a framework to deal with this properly. */ 828 printf("%s: power management wakeup\n", device_get_name(sc->sc_dev)); 829} 830#endif /* PSYCHO_MAP_WAKEUP */ 831 832/* initialise the IOMMU... */ 833void 834psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 835{ 836 char *name; 837 struct iommu_state *is = sc->sc_is; 838 839 /* punch in our copies */ 840 is->is_bustag = sc->sc_bustag; 841 is->is_bushandle = sc->sc_bushandle; 842 is->is_iommu = PSR_IOMMU; 843 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG; 844 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG; 845 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG; 846 is->is_dva = PSR_IOMMU_SVADIAG; 847 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG; 848 849 /* give us a nice name.. */ 850 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 851 if (name == 0) 852 panic("couldn't malloc iommu name"); 853 snprintf(name, 32, "%s dvma", device_get_name(sc->sc_dev)); 854 855 iommu_init(name, is, tsbsize, sc->sc_dvmabase, 0); 856} 857 858static void 859psycho_binit(device_t busdev, struct ofw_pci_bdesc *obd) 860{ 861 862#ifdef PSYCHO_DEBUG 863 printf("psycho at %u/%u/%u: setting bus #s to %u/%u/%u\n", 864 obd->obd_bus, obd->obd_slot, obd->obd_func, obd->obd_bus, 865 obd->obd_secbus, obd->obd_subbus); 866#endif /* PSYCHO_DEBUG */ 867 /* 868 * NOTE: this must be kept in this order, since the last write will 869 * change the config space address of the psycho. 870 */ 871 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func, 872 PCSR_SUBBUS, obd->obd_subbus, 1); 873 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func, 874 PCSR_SECBUS, obd->obd_secbus, 1); 875} 876 877static int 878psycho_maxslots(device_t dev) 879{ 880 881 /* 882 * XXX: is this correct? At any rate, a number that is too high 883 * shouldn't do any harm, if only because of the way things are 884 * handled in psycho_read_config. 885 */ 886 return (31); 887} 888 889/* 890 * Keep a table of quirky PCI devices that need fixups before the MI PCI code 891 * creates the resource lists. This needs to be moved around once other bus 892 * drivers are added. Moving it to the MI code should maybe be reconsidered 893 * if one of these devices appear in non-sparc64 boxen. It's likely that not 894 * all BIOSes/firmwares can deal with them. 895 */ 896struct psycho_dquirk { 897 u_int32_t dq_devid; 898 int dq_quirk; 899}; 900 901/* Quirk types. May be or'ed together. */ 902#define DQT_BAD_INTPIN 1 /* Intpin reg 0, but intpin used */ 903 904static struct psycho_dquirk dquirks[] = { 905 { 0x1001108e, DQT_BAD_INTPIN }, /* Sun HME (PCIO func. 1) */ 906 { 0x1101108e, DQT_BAD_INTPIN }, /* Sun GEM (PCIO2 func. 1) */ 907 { 0x1102108e, DQT_BAD_INTPIN }, /* Sun FireWire ctl. (PCIO2 func. 2) */ 908 { 0x1103108e, DQT_BAD_INTPIN }, /* Sun USB ctl. (PCIO2 func. 3) */ 909}; 910 911#define NDQUIRKS (sizeof(dquirks) / sizeof(dquirks[0])) 912 913static u_int32_t 914psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 915 int width) 916{ 917 struct psycho_softc *sc; 918 bus_space_handle_t bh; 919 u_long offset = 0; 920 u_int32_t r, devid; 921 int i; 922 923 /* 924 * The psycho bridge does not tolerate accesses to unconfigured PCI 925 * devices' or function's config space, so look up the device in the 926 * firmware device tree first, and if it is not present, return a value 927 * that will make the detection code think that there is no device here. 928 * This is ugly... 929 */ 930 if (reg == 0 && ofw_pci_find_node(bus, slot, func) == 0) 931 return (0xffffffff); 932 sc = (struct psycho_softc *)device_get_softc(dev); 933 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 934 bh = sc->sc_bh[PCI_CS_CONFIG]; 935 switch (width) { 936 case 1: 937 r = bus_space_read_1(sc->sc_cfgt, bh, offset); 938 break; 939 case 2: 940 r = bus_space_read_2(sc->sc_cfgt, bh, offset); 941 break; 942 case 4: 943 r = bus_space_read_4(sc->sc_cfgt, bh, offset); 944 break; 945 default: 946 panic("psycho_read_config: bad width"); 947 } 948 if (reg == PCIR_INTPIN && r == 0) { 949 /* Check for DQT_BAD_INTPIN quirk. */ 950 devid = psycho_read_config(dev, bus, slot, func, 951 PCIR_DEVVENDOR, 4); 952 for (i = 0; i < NDQUIRKS; i++) { 953 if (dquirks[i].dq_devid == devid) { 954 /* 955 * Need to set the intpin to a value != 0 so 956 * that the MI code will think that this device 957 * has an interrupt. 958 * Just use 1 (intpin a) for now. This is, of 959 * course, bogus, but since interrupts are 960 * routed in advance, this does not really 961 * matter. 962 */ 963 if ((dquirks[i].dq_quirk & DQT_BAD_INTPIN) != 0) 964 r = 1; 965 break; 966 } 967 } 968 } 969 return (r); 970} 971 972static void 973psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, 974 u_int reg, u_int32_t val, int width) 975{ 976 struct psycho_softc *sc; 977 bus_space_handle_t bh; 978 u_long offset = 0; 979 980 sc = (struct psycho_softc *)device_get_softc(dev); 981 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 982 bh = sc->sc_bh[PCI_CS_CONFIG]; 983 switch (width) { 984 case 1: 985 bus_space_write_1(sc->sc_cfgt, bh, offset, val); 986 break; 987 case 2: 988 bus_space_write_2(sc->sc_cfgt, bh, offset, val); 989 break; 990 case 4: 991 bus_space_write_4(sc->sc_cfgt, bh, offset, val); 992 break; 993 default: 994 panic("psycho_write_config: bad width"); 995 } 996} 997 998static int 999psycho_route_interrupt(device_t bus, device_t dev, int pin) 1000{ 1001 1002 /* 1003 * XXX: ugly loathsome hack: 1004 * We can't use ofw_pci_route_intr() here; the device passed may be 1005 * the one of a bridge, so the original device can't be recovered. 1006 * 1007 * We need to use the firmware to route interrupts, however it has 1008 * no interface which could be used to interpret intpins; instead, 1009 * all assignments are done by device. 1010 * 1011 * The MI pci code will try to reroute interrupts of 0, although they 1012 * are correct; all other interrupts are preinitialized, so if we 1013 * get here, the intline is either 0 (so return 0), or we hit a 1014 * device which was not preinitialized (e.g. hotplugged stuff), in 1015 * which case we are lost. 1016 */ 1017 return (0); 1018} 1019 1020static int 1021psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 1022{ 1023 struct psycho_softc *sc; 1024 1025 sc = (struct psycho_softc *)device_get_softc(dev); 1026 switch (which) { 1027 case PCIB_IVAR_BUS: 1028 *result = sc->sc_busno; 1029 return (0); 1030 } 1031 return (ENOENT); 1032} 1033 1034/* Write to the correct clr register, and call the actual handler. */ 1035static void 1036psycho_intr_stub(void *arg) 1037{ 1038 struct psycho_clr *pc; 1039 1040 pc = (struct psycho_clr *)arg; 1041 pc->pci_handler(pc->pci_arg); 1042 PSYCHO_WRITE8(pc->pci_sc, pc->pci_clr, 0); 1043} 1044 1045#ifdef PSYCHO_STRAY 1046/* 1047 * Write to the correct clr register and return. arg is the address of the clear 1048 * register to be used. 1049 * XXX: print a message? 1050 */ 1051static void 1052psycho_intr_stray(void *arg) 1053{ 1054 struct psycho_strayclr *sclr = arg; 1055 1056 PSYCHO_WRITE8(sclr->psc_sc, sclr->psc_clr, 0); 1057} 1058#endif 1059 1060static int 1061psycho_setup_intr(device_t dev, device_t child, 1062 struct resource *ires, int flags, driver_intr_t *intr, void *arg, 1063 void **cookiep) 1064{ 1065 struct psycho_softc *sc; 1066 struct psycho_clr *pc; 1067 bus_addr_t intrmapptr, intrclrptr; 1068 long vec = rman_get_start(ires); 1069 u_int64_t mr; 1070 int ino, error; 1071 1072 sc = (struct psycho_softc *)device_get_softc(dev); 1073 pc = (struct psycho_clr *)malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT); 1074 if (pc == NULL) 1075 return (NULL); 1076 1077 /* 1078 * Hunt through all the interrupt mapping regs to look for our 1079 * interrupt vector. 1080 * 1081 * XXX We only compare INOs rather than IGNs since the firmware may 1082 * not provide the IGN and the IGN is constant for all device on that 1083 * PCI controller. This could cause problems for the FFB/external 1084 * interrupt which has a full vector that can be set arbitrarily. 1085 */ 1086 ino = INTINO(vec); 1087 1088 if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) { 1089 printf("Cannot find interrupt vector %lx\n", vec); 1090 free(pc, M_DEVBUF); 1091 return (NULL); 1092 } 1093 1094#ifdef PSYCHO_DEBUG 1095 device_printf(dev, "psycho_setup_intr: INO %d, map %#lx, clr %#lx\n", 1096 ino, (u_long)intrmapptr, (u_long)intrclrptr); 1097#endif 1098 pc->pci_sc = sc; 1099 pc->pci_arg = arg; 1100 pc->pci_handler = intr; 1101 pc->pci_clr = intrclrptr; 1102 /* Disable the interrupt while we fiddle with it */ 1103 mr = PSYCHO_READ8(sc, intrmapptr); 1104 PSYCHO_WRITE8(sc, intrmapptr, mr & ~INTMAP_V); 1105 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 1106 psycho_intr_stub, pc, cookiep); 1107 if (error != 0) { 1108 free(pc, M_DEVBUF); 1109 return (error); 1110 } 1111 pc->pci_cookie = *cookiep; 1112 *cookiep = pc; 1113 1114 /* 1115 * Clear the interrupt, it might have been triggered before it was 1116 * set up. 1117 */ 1118 PSYCHO_WRITE8(sc, intrclrptr, 0); 1119 /* 1120 * Enable the interrupt and program the target module now we have the 1121 * handler installed. 1122 */ 1123 PSYCHO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(mr, PCPU_GET(mid))); 1124 return (error); 1125} 1126 1127static int 1128psycho_teardown_intr(device_t dev, device_t child, 1129 struct resource *vec, void *cookie) 1130{ 1131 struct psycho_clr *pc; 1132 int error; 1133 1134 pc = (struct psycho_clr *)cookie; 1135 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 1136 pc->pci_cookie); 1137 /* 1138 * Don't disable the interrupt for now, so that stray interupts get 1139 * detected... 1140 */ 1141 if (error != 0) 1142 free(pc, M_DEVBUF); 1143 return (error); 1144} 1145 1146static struct resource * 1147psycho_alloc_resource(device_t bus, device_t child, int type, int *rid, 1148 u_long start, u_long end, u_long count, u_int flags) 1149{ 1150 struct psycho_softc *sc; 1151 struct resource *rv; 1152 struct rman *rm; 1153 bus_space_tag_t bt; 1154 bus_space_handle_t bh; 1155 int needactivate = flags & RF_ACTIVE; 1156 1157 flags &= ~RF_ACTIVE; 1158 1159 sc = (struct psycho_softc *)device_get_softc(bus); 1160 if (type == SYS_RES_IRQ) { 1161 /* 1162 * XXX: Don't accept blank ranges for now, only single 1163 * interrupts. The other case should not happen with the MI pci 1164 * code... 1165 * XXX: This may return a resource that is out of the range 1166 * that was specified. Is this correct...? 1167 */ 1168 if (start != end) 1169 panic("psycho_alloc_resource: XXX: interrupt range"); 1170 start = end |= sc->sc_ign; 1171 return (bus_alloc_resource(bus, type, rid, start, end, 1172 count, flags)); 1173 } 1174 switch (type) { 1175 case SYS_RES_MEMORY: 1176 rm = &sc->sc_mem_rman; 1177 bt = sc->sc_memt; 1178 bh = sc->sc_bh[PCI_CS_MEM32]; 1179 break; 1180 case SYS_RES_IOPORT: 1181 rm = &sc->sc_io_rman; 1182 bt = sc->sc_iot; 1183 bh = sc->sc_bh[PCI_CS_IO]; 1184 break; 1185 default: 1186 return (NULL); 1187 } 1188 1189 rv = rman_reserve_resource(rm, start, end, count, flags, child); 1190 if (rv == NULL) 1191 return (NULL); 1192 1193 bh += rman_get_start(rv); 1194 rman_set_bustag(rv, bt); 1195 rman_set_bushandle(rv, bh); 1196 1197 if (needactivate) { 1198 if (bus_activate_resource(child, type, *rid, rv)) { 1199 rman_release_resource(rv); 1200 return (NULL); 1201 } 1202 } 1203 1204 return (rv); 1205} 1206 1207static int 1208psycho_activate_resource(device_t bus, device_t child, int type, int rid, 1209 struct resource *r) 1210{ 1211 void *p; 1212 int error; 1213 1214 if (type == SYS_RES_IRQ) 1215 return (bus_activate_resource(bus, type, rid, r)); 1216 if (type == SYS_RES_MEMORY) { 1217 /* 1218 * Need to memory-map the device space, as some drivers depend 1219 * on the virtual address being set and useable. 1220 */ 1221 error = sparc64_bus_mem_map(rman_get_bustag(r), 1222 rman_get_bushandle(r), rman_get_size(r), 0, NULL, &p); 1223 if (error != 0) 1224 return (error); 1225 rman_set_virtual(r, p); 1226 } 1227 return (rman_activate_resource(r)); 1228} 1229 1230static int 1231psycho_deactivate_resource(device_t bus, device_t child, int type, int rid, 1232 struct resource *r) 1233{ 1234 1235 if (type == SYS_RES_IRQ) 1236 return (bus_deactivate_resource(bus, type, rid, r)); 1237 if (type == SYS_RES_MEMORY) { 1238 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r)); 1239 rman_set_virtual(r, NULL); 1240 } 1241 return (rman_deactivate_resource(r)); 1242} 1243 1244static int 1245psycho_release_resource(device_t bus, device_t child, int type, int rid, 1246 struct resource *r) 1247{ 1248 int error; 1249 1250 if (type == SYS_RES_IRQ) 1251 return (bus_release_resource(bus, type, rid, r)); 1252 if (rman_get_flags(r) & RF_ACTIVE) { 1253 error = bus_deactivate_resource(child, type, rid, r); 1254 if (error) 1255 return error; 1256 } 1257 return (rman_release_resource(r)); 1258} 1259 1260static int 1261psycho_intr_pending(device_t dev, int intr) 1262{ 1263 struct psycho_softc *sc; 1264 u_long diag; 1265 1266 sc = (struct psycho_softc *)device_get_softc(dev); 1267 if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) { 1268 printf("psycho_intr_pending: mapping not found for %d\n", intr); 1269 return (0); 1270 } 1271 return (diag != 0); 1272} 1273 1274static bus_space_handle_t 1275psycho_get_bus_handle(device_t dev, enum sbbt_id id, 1276 bus_space_handle_t childhdl, bus_space_tag_t *tag) 1277{ 1278 struct psycho_softc *sc; 1279 1280 sc = (struct psycho_softc *)device_get_softc(dev); 1281 switch(id) { 1282 case SBBT_IO: 1283 *tag = sc->sc_iot; 1284 return (sc->sc_bh[PCI_CS_IO] + childhdl); 1285 case SBBT_MEM: 1286 *tag = sc->sc_memt; 1287 return (sc->sc_bh[PCI_CS_MEM32] + childhdl); 1288 default: 1289 panic("psycho_get_bus_handle: illegal space\n"); 1290 } 1291} 1292 1293/* 1294 * below here is bus space and bus dma support 1295 */ 1296static bus_space_tag_t 1297psycho_alloc_bus_tag(struct psycho_softc *sc, int type) 1298{ 1299 bus_space_tag_t bt; 1300 1301 bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 1302 M_NOWAIT | M_ZERO); 1303 if (bt == NULL) 1304 panic("psycho_alloc_bus_tag: out of memory"); 1305 1306 bzero(bt, sizeof *bt); 1307 bt->bst_cookie = sc; 1308 bt->bst_parent = sc->sc_bustag; 1309 bt->bst_type = type; 1310 return (bt); 1311} 1312 1313/* 1314 * hooks into the iommu dvma calls. 1315 */ 1316static int 1317psycho_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 1318 int flags, bus_dmamap_t *mapp) 1319{ 1320 struct psycho_softc *sc; 1321 1322 sc = (struct psycho_softc *)pdmat->dt_cookie; 1323 return (iommu_dvmamem_alloc(pdmat, ddmat, sc->sc_is, vaddr, flags, 1324 mapp)); 1325} 1326 1327static void 1328psycho_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 1329 bus_dmamap_t map) 1330{ 1331 struct psycho_softc *sc; 1332 1333 sc = (struct psycho_softc *)pdmat->dt_cookie; 1334 iommu_dvmamem_free(pdmat, ddmat, sc->sc_is, vaddr, map); 1335} 1336 1337static int 1338psycho_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags, 1339 bus_dmamap_t *mapp) 1340{ 1341 struct psycho_softc *sc; 1342 1343 sc = (struct psycho_softc *)pdmat->dt_cookie; 1344 return (iommu_dvmamap_create(pdmat, ddmat, sc->sc_is, flags, mapp)); 1345 1346} 1347 1348static int 1349psycho_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1350 bus_dmamap_t map) 1351{ 1352 struct psycho_softc *sc; 1353 1354 sc = (struct psycho_softc *)pdmat->dt_cookie; 1355 return (iommu_dvmamap_destroy(pdmat, ddmat, sc->sc_is, map)); 1356} 1357 1358static int 1359psycho_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 1360 void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback, 1361 void *callback_arg, int flags) 1362{ 1363 struct psycho_softc *sc; 1364 1365 sc = (struct psycho_softc *)pdmat->dt_cookie; 1366 return (iommu_dvmamap_load(pdmat, ddmat, sc->sc_is, map, buf, buflen, 1367 callback, callback_arg, flags)); 1368} 1369 1370static int 1371psycho_dmamap_load_mbuf(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1372 bus_dmamap_t map, struct mbuf *m, bus_dmamap_callback2_t *callback, 1373 void *callback_arg, int flags) 1374{ 1375 struct psycho_softc *sc; 1376 1377 sc = (struct psycho_softc *)pdmat->dt_cookie; 1378 return (iommu_dvmamap_load_mbuf(pdmat, ddmat, sc->sc_is, map, m, 1379 callback, callback_arg, flags)); 1380} 1381 1382static int 1383psycho_dmamap_load_uio(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1384 bus_dmamap_t map, struct uio *uio, bus_dmamap_callback2_t *callback, 1385 void *callback_arg, int flags) 1386{ 1387 struct psycho_softc *sc; 1388 1389 sc = (struct psycho_softc *)pdmat->dt_cookie; 1390 return (iommu_dvmamap_load_uio(pdmat, ddmat, sc->sc_is, map, uio, 1391 callback, callback_arg, flags)); 1392} 1393 1394static void 1395psycho_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 1396{ 1397 struct psycho_softc *sc; 1398 1399 sc = (struct psycho_softc *)pdmat->dt_cookie; 1400 iommu_dvmamap_unload(pdmat, ddmat, sc->sc_is, map); 1401} 1402 1403static void 1404psycho_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 1405 bus_dmasync_op_t op) 1406{ 1407 struct psycho_softc *sc; 1408 1409 sc = (struct psycho_softc *)pdmat->dt_cookie; 1410 iommu_dvmamap_sync(pdmat, ddmat, sc->sc_is, map, op); 1411} 1412