tlb.h revision 91613
180709Sjake/*- 280709Sjake * Copyright (c) 2001 Jake Burkholder. 380709Sjake * All rights reserved. 480709Sjake * 580709Sjake * Redistribution and use in source and binary forms, with or without 680709Sjake * modification, are permitted provided that the following conditions 780709Sjake * are met: 880709Sjake * 1. Redistributions of source code must retain the above copyright 980709Sjake * notice, this list of conditions and the following disclaimer. 1080709Sjake * 2. Redistributions in binary form must reproduce the above copyright 1180709Sjake * notice, this list of conditions and the following disclaimer in the 1280709Sjake * documentation and/or other materials provided with the distribution. 1380709Sjake * 1481334Sobrien * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1580709Sjake * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1680709Sjake * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1781334Sobrien * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1880709Sjake * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1980709Sjake * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2080709Sjake * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2180709Sjake * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2280709Sjake * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2380709Sjake * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2480709Sjake * SUCH DAMAGE. 2580709Sjake * 2680709Sjake * $FreeBSD: head/sys/sparc64/include/tlb.h 91613 2002-03-04 05:20:29Z jake $ 2780709Sjake */ 2880709Sjake 2980709Sjake#ifndef _MACHINE_TLB_H_ 3080709Sjake#define _MACHINE_TLB_H_ 3180709Sjake 3280709Sjake#define TLB_SLOT_COUNT 64 3380709Sjake 3491224Sjake#define TLB_SLOT_TSB_KERNEL_MIN 62 /* XXX */ 3580709Sjake#define TLB_SLOT_KERNEL 63 3680709Sjake 3780709Sjake#define TLB_DAR_SLOT_SHIFT (3) 3880709Sjake#define TLB_DAR_SLOT(slot) ((slot) << TLB_DAR_SLOT_SHIFT) 3980709Sjake 4091224Sjake#define TAR_VPN_SHIFT (13) 4191224Sjake#define TAR_CTX_MASK ((1 << TAR_VPN_SHIFT) - 1) 4280709Sjake 4391224Sjake#define TLB_TAR_VA(va) ((va) & ~TAR_CTX_MASK) 4491224Sjake#define TLB_TAR_CTX(ctx) ((ctx) & TAR_CTX_MASK) 4591224Sjake 4680709Sjake#define TLB_DEMAP_ID_SHIFT (4) 4780709Sjake#define TLB_DEMAP_ID_PRIMARY (0) 4880709Sjake#define TLB_DEMAP_ID_SECONDARY (1) 4980709Sjake#define TLB_DEMAP_ID_NUCLEUS (2) 5080709Sjake 5180709Sjake#define TLB_DEMAP_TYPE_SHIFT (6) 5280709Sjake#define TLB_DEMAP_TYPE_PAGE (0) 5380709Sjake#define TLB_DEMAP_TYPE_CONTEXT (1) 5480709Sjake 5580709Sjake#define TLB_DEMAP_VA(va) ((va) & ~PAGE_MASK) 5680709Sjake#define TLB_DEMAP_ID(id) ((id) << TLB_DEMAP_ID_SHIFT) 5780709Sjake#define TLB_DEMAP_TYPE(type) ((type) << TLB_DEMAP_TYPE_SHIFT) 5880709Sjake 5980709Sjake#define TLB_DEMAP_PAGE (TLB_DEMAP_TYPE(TLB_DEMAP_TYPE_PAGE)) 6080709Sjake#define TLB_DEMAP_CONTEXT (TLB_DEMAP_TYPE(TLB_DEMAP_TYPE_CONTEXT)) 6180709Sjake 6280709Sjake#define TLB_DEMAP_PRIMARY (TLB_DEMAP_ID(TLB_DEMAP_ID_PRIMARY)) 6380709Sjake#define TLB_DEMAP_SECONDARY (TLB_DEMAP_ID(TLB_DEMAP_ID_SECONDARY)) 6480709Sjake#define TLB_DEMAP_NUCLEUS (TLB_DEMAP_ID(TLB_DEMAP_ID_NUCLEUS)) 6580709Sjake 6680709Sjake#define TLB_CTX_KERNEL (0) 6791613Sjake#define TLB_CTX_USER_MIN (1) 6891613Sjake#define TLB_CTX_USER_MAX (8192) 6980709Sjake 7080709Sjake#define TLB_DTLB (1 << 0) 7180709Sjake#define TLB_ITLB (1 << 1) 7280709Sjake 7381176Sjake#define MMU_SFSR_ASI_SHIFT (16) 7481176Sjake#define MMU_SFSR_FT_SHIFT (7) 7581176Sjake#define MMU_SFSR_E_SHIFT (6) 7681176Sjake#define MMU_SFSR_CT_SHIFT (4) 7781176Sjake#define MMU_SFSR_PR_SHIFT (3) 7881176Sjake#define MMU_SFSR_W_SHIFT (2) 7981176Sjake#define MMU_SFSR_OW_SHIFT (1) 8081176Sjake#define MMU_SFSR_FV_SHIFT (0) 8181176Sjake 8281176Sjake#define MMU_SFSR_ASI_SIZE (8) 8381176Sjake#define MMU_SFSR_FT_SIZE (6) 8481176Sjake#define MMU_SFSR_CT_SIZE (2) 8581176Sjake 8681176Sjake#define MMU_SFSR_W (1L << MMU_SFSR_W_SHIFT) 8781176Sjake 8888629Sjake/* 8988629Sjake * Some tlb operations must be atomical, so no interrupt or trap can be allowed 9088629Sjake * while they are in progress. Traps should not happen, but interrupts need to 9188629Sjake * be explicitely disabled. critical_enter() cannot be used here, since it only 9288629Sjake * disables soft interrupts. 9388629Sjake * XXX: is something like this needed elsewhere, too? 9488629Sjake */ 9588629Sjake 9680709Sjakestatic __inline void 9788629Sjaketlb_dtlb_context_primary_demap(void) 9888629Sjake{ 9988629Sjake stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_DMMU_DEMAP, 0); 10088629Sjake membar(Sync); 10188629Sjake} 10288629Sjake 10388629Sjakestatic __inline void 10481377Sjaketlb_dtlb_page_demap(u_long ctx, vm_offset_t va) 10580709Sjake{ 10680709Sjake if (ctx == TLB_CTX_KERNEL) { 10780709Sjake stxa(TLB_DEMAP_VA(va) | TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, 10880709Sjake ASI_DMMU_DEMAP, 0); 10980709Sjake membar(Sync); 11091613Sjake } else if (ctx != -1) { 11191613Sjake stxa(TLB_DEMAP_VA(va) | TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE, 11281377Sjake ASI_DMMU_DEMAP, 0); 11388629Sjake membar(Sync); 11481377Sjake } 11580709Sjake} 11680709Sjake 11780709Sjakestatic __inline void 11881377Sjaketlb_dtlb_store(vm_offset_t va, u_long ctx, struct tte tte) 11980709Sjake{ 12088629Sjake u_long pst; 12188629Sjake 12291170Sjake pst = intr_disable(); 12381176Sjake stxa(AA_DMMU_TAR, ASI_DMMU, 12481377Sjake TLB_TAR_VA(va) | TLB_TAR_CTX(ctx)); 12580709Sjake stxa(0, ASI_DTLB_DATA_IN_REG, tte.tte_data); 12680709Sjake membar(Sync); 12791170Sjake intr_restore(pst); 12880709Sjake} 12980709Sjake 13080709Sjakestatic __inline void 13181377Sjaketlb_dtlb_store_slot(vm_offset_t va, u_long ctx, struct tte tte, int slot) 13280709Sjake{ 13388629Sjake u_long pst; 13488629Sjake 13591170Sjake pst = intr_disable(); 13681377Sjake stxa(AA_DMMU_TAR, ASI_DMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(ctx)); 13780709Sjake stxa(TLB_DAR_SLOT(slot), ASI_DTLB_DATA_ACCESS_REG, tte.tte_data); 13880709Sjake membar(Sync); 13991170Sjake intr_restore(pst); 14080709Sjake} 14180709Sjake 14280709Sjakestatic __inline void 14388629Sjaketlb_itlb_context_primary_demap(void) 14488629Sjake{ 14588629Sjake stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_IMMU_DEMAP, 0); 14688629Sjake membar(Sync); 14788629Sjake} 14888629Sjake 14988629Sjakestatic __inline void 15081377Sjaketlb_itlb_page_demap(u_long ctx, vm_offset_t va) 15180709Sjake{ 15280709Sjake if (ctx == TLB_CTX_KERNEL) { 15380709Sjake stxa(TLB_DEMAP_VA(va) | TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, 15480709Sjake ASI_IMMU_DEMAP, 0); 15580709Sjake flush(KERNBASE); 15691613Sjake } else if (ctx != -1) { 15791613Sjake stxa(TLB_DEMAP_VA(va) | TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE, 15881377Sjake ASI_IMMU_DEMAP, 0); 15988629Sjake membar(Sync); 16081377Sjake } 16180709Sjake} 16280709Sjake 16380709Sjakestatic __inline void 16481377Sjaketlb_itlb_store(vm_offset_t va, u_long ctx, struct tte tte) 16580709Sjake{ 16688629Sjake u_long pst; 16788629Sjake 16891170Sjake pst = intr_disable(); 16981377Sjake stxa(AA_IMMU_TAR, ASI_IMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(ctx)); 17081377Sjake stxa(0, ASI_ITLB_DATA_IN_REG, tte.tte_data); 17181377Sjake if (ctx == TLB_CTX_KERNEL) 17281377Sjake flush(va); 17381377Sjake else { 17481377Sjake /* 17581377Sjake * flush probably not needed and impossible here, no access to 17681377Sjake * user page. 17781377Sjake */ 17881377Sjake membar(Sync); 17981377Sjake } 18091170Sjake intr_restore(pst); 18180709Sjake} 18280709Sjake 18380709Sjakestatic __inline void 18491613Sjaketlb_context_demap(u_int ctx) 18588629Sjake{ 18691613Sjake if (ctx != -1) { 18791613Sjake tlb_dtlb_context_primary_demap(); 18891613Sjake tlb_itlb_context_primary_demap(); 18991613Sjake } 19088629Sjake} 19188629Sjake 19288629Sjakestatic __inline void 19381377Sjaketlb_itlb_store_slot(vm_offset_t va, u_long ctx, struct tte tte, int slot) 19480709Sjake{ 19588629Sjake u_long pst; 19688629Sjake 19791170Sjake pst = intr_disable(); 19881377Sjake stxa(AA_IMMU_TAR, ASI_IMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(ctx)); 19980709Sjake stxa(TLB_DAR_SLOT(slot), ASI_ITLB_DATA_ACCESS_REG, tte.tte_data); 20080709Sjake flush(va); 20191170Sjake intr_restore(pst); 20280709Sjake} 20380709Sjake 20480709Sjakestatic __inline void 20580709Sjaketlb_page_demap(u_int tlb, u_int ctx, vm_offset_t va) 20680709Sjake{ 20780709Sjake if (tlb & TLB_DTLB) 20880709Sjake tlb_dtlb_page_demap(ctx, va); 20980709Sjake if (tlb & TLB_ITLB) 21080709Sjake tlb_itlb_page_demap(ctx, va); 21180709Sjake} 21280709Sjake 21380709Sjakestatic __inline void 21491172Sjaketlb_range_demap(u_int ctx, vm_offset_t start, vm_offset_t end) 21591172Sjake{ 21691172Sjake for (; start < end; start += PAGE_SIZE) 21791172Sjake tlb_page_demap(TLB_DTLB | TLB_ITLB, ctx, start); 21891172Sjake} 21991172Sjake 22091172Sjakestatic __inline void 22191224Sjaketlb_tte_demap(struct tte tte, u_int ctx) 22291172Sjake{ 22391224Sjake tlb_page_demap(TD_GET_TLB(tte.tte_data), ctx, TV_GET_VA(tte.tte_vpn)); 22491172Sjake} 22591172Sjake 22691172Sjakestatic __inline void 22781377Sjaketlb_store(u_int tlb, vm_offset_t va, u_long ctx, struct tte tte) 22880709Sjake{ 22991613Sjake KASSERT(ctx != -1, ("tlb_store: invalid context")); 23080709Sjake if (tlb & TLB_DTLB) 23181377Sjake tlb_dtlb_store(va, ctx, tte); 23280709Sjake if (tlb & TLB_ITLB) 23381377Sjake tlb_itlb_store(va, ctx, tte); 23480709Sjake} 23580709Sjake 23680709Sjakestatic __inline void 23781377Sjaketlb_store_slot(u_int tlb, vm_offset_t va, u_long ctx, struct tte tte, int slot) 23880709Sjake{ 23991613Sjake KASSERT(ctx != -1, ("tlb_store_slot: invalid context")); 24080709Sjake if (tlb & TLB_DTLB) 24181377Sjake tlb_dtlb_store_slot(va, ctx, tte, slot); 24280709Sjake if (tlb & TLB_ITLB) 24381377Sjake tlb_itlb_store_slot(va, ctx, tte, slot); 24480709Sjake} 24580709Sjake 24680709Sjake#endif /* !_MACHINE_TLB_H_ */ 247