181390Sjake/*- 281390Sjake * Copyright (c) 2001 Jake Burkholder. 381390Sjake * All rights reserved. 481390Sjake * 581390Sjake * Redistribution and use in source and binary forms, with or without 681390Sjake * modification, are permitted provided that the following conditions 781390Sjake * are met: 881390Sjake * 1. Redistributions of source code must retain the above copyright 981390Sjake * notice, this list of conditions and the following disclaimer. 1081390Sjake * 2. Redistributions in binary form must reproduce the above copyright 1181390Sjake * notice, this list of conditions and the following disclaimer in the 1281390Sjake * documentation and/or other materials provided with the distribution. 1381390Sjake * 1481390Sjake * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1581390Sjake * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1681390Sjake * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1781390Sjake * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1881390Sjake * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1981390Sjake * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2081390Sjake * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2181390Sjake * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2281390Sjake * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2381390Sjake * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2481390Sjake * SUCH DAMAGE. 2581390Sjake * 2681390Sjake * $FreeBSD$ 2781390Sjake */ 2881390Sjake 2981390Sjake#ifndef _MACHINE_INTR_MACHDEP_H_ 3081390Sjake#define _MACHINE_INTR_MACHDEP_H_ 3181390Sjake 3297265Sjake#define IRSR_BUSY (1 << 5) 3381390Sjake 3497265Sjake#define PIL_MAX (1 << 4) 3597265Sjake#define IV_MAX (1 << 11) 3681390Sjake 3797265Sjake#define IR_FREE (PIL_MAX * 2) 3897265Sjake 3988623Sjake#define IH_SHIFT PTR_SHIFT 4081390Sjake#define IQE_SHIFT 5 41172066Smarius#define IV_SHIFT 6 4281390Sjake 4384849Stmm#define PIL_LOW 1 /* stray interrupts */ 44241780Smarius#define PIL_PREEMPT 2 /* preempt idle thread CPU IPI */ 45241780Smarius#define PIL_ITHREAD 3 /* interrupts that use ithreads */ 46241780Smarius#define PIL_RENDEZVOUS 4 /* SMP rendezvous IPI */ 47241780Smarius#define PIL_AST 5 /* asynchronous trap IPI */ 48241780Smarius#define PIL_HARDCLOCK 6 /* hardclock broadcast */ 49241780Smarius#define PIL_FILTER 11 /* filter interrupts */ 50241780Smarius#define PIL_BRIDGE 12 /* bridge interrupts */ 51241780Smarius#define PIL_STOP 13 /* stop CPU IPI */ 52185109Smarius#define PIL_TICK 14 /* tick interrupts */ 5381390Sjake 54166105Smarius#ifndef LOCORE 55166105Smarius 56216961Smarius#define INTR_BRIDGE INTR_MD1 57216961Smarius 5897508Sjakestruct trapframe; 5997508Sjake 6081390Sjaketypedef void ih_func_t(struct trapframe *); 6181390Sjaketypedef void iv_func_t(void *); 6281390Sjake 6397265Sjakestruct intr_request { 6497265Sjake struct intr_request *ir_next; 6597265Sjake iv_func_t *ir_func; 6697265Sjake void *ir_arg; 6797265Sjake u_int ir_vec; 6897265Sjake u_int ir_pri; 6981390Sjake}; 7081390Sjake 71172066Smariusstruct intr_controller { 72172066Smarius void (*ic_enable)(void *); 73172066Smarius void (*ic_disable)(void *); 74178443Smarius void (*ic_assign)(void *); 75178443Smarius void (*ic_clear)(void *); 76172066Smarius}; 77172066Smarius 7883053Sobrienstruct intr_vector { 7985235Sjake iv_func_t *iv_func; 8081390Sjake void *iv_arg; 81172066Smarius const struct intr_controller *iv_ic; 82172066Smarius void *iv_icarg; 83151658Sjhb struct intr_event *iv_event; 8481390Sjake u_int iv_pri; 8585235Sjake u_int iv_vec; 86172066Smarius u_int iv_mid; 87172066Smarius u_int iv_refcnt; 88172066Smarius u_int iv_pad[2]; 8981390Sjake}; 9081390Sjake 9188623Sjakeextern ih_func_t *intr_handlers[]; 9281390Sjakeextern struct intr_vector intr_vectors[]; 9381390Sjake 94241371Sattilio#ifdef SMP 95235232Smariusvoid intr_add_cpu(u_int cpu); 96241371Sattilio#endif 97178443Smariusint intr_bind(int vec, u_char cpu); 98200948Smariusint intr_describe(int vec, void *ih, const char *descr); 9981390Sjakevoid intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf, 100166105Smarius void *iva); 10190624Stmmvoid intr_init1(void); 10290624Stmmvoid intr_init2(void); 103172066Smariusint intr_controller_register(int vec, const struct intr_controller *ic, 104172066Smarius void *icarg); 105166901Spisoint inthand_add(const char *name, int vec, int (*filt)(void *), 106172066Smarius void (*handler)(void *), void *arg, int flags, void **cookiep); 10784849Stmmint inthand_remove(int vec, void *cookie); 10881390Sjake 109104075Sjakeih_func_t intr_fast; 11081390Sjake 111166105Smarius#endif /* !LOCORE */ 112166105Smarius 113166105Smarius#endif /* !_MACHINE_INTR_MACHDEP_H_ */ 114