fp.h revision 81147 
1/*-
2 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
17 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
20 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
22 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * $FreeBSD: head/sys/sparc64/include/fp.h 81147 2001-08-05 03:47:02Z tmm $
25 */
26
27#ifndef	_MACHINE_FP_H_
28#define	_MACHINE_FP_H_
29
30#define	FPRS_DL		(1 << 0)
31#define	FPRS_DU		(1 << 1)
32#define	FPRS_FEF	(1 << 2)
33
34#define	FSR_CEXC_NX	(1 << 0)
35#define	FSR_CEXC_DZ	(1 << 1)
36#define	FSR_CEXC_UF	(1 << 2)
37#define	FSR_CEXC_OF	(1 << 3)
38#define	FSR_CEXC_NV	(1 << 4)
39#define	FSR_AEXC_NX	(1 << 5)
40#define	FSR_AEXC_DZ	(1 << 6)
41#define	FSR_AEXC_UF	(1 << 7)
42#define	FSR_AEXC_OF	(1 << 8)
43#define	FSR_AEXC_NV	(1 << 9)
44#define	FSR_QNE		(1 << 13)
45#define	FSR_NS		(1 << 22)
46#define	FSR_TEM_NX	(1 << 23)
47#define	FSR_TEM_DZ	(1 << 24)
48#define	FSR_TEM_UF	(1 << 25)
49#define	FSR_TEM_OF	(1 << 26)
50#define	FSR_TEM_NV	(1 << 27)
51
52#define	FSR_FCC0_SHIFT	10
53#define	FSR_FCC0(x)	(((x) >> FSR_FCC0_SHIFT) & 3)
54#define	FSR_FTT_SHIFT	14
55#define	FSR_FTT(x)	(((x) >> FSR_FTT_SHIFT) & 7)
56#define	FSR_VER_SHIFT	17
57#define	FSR_VER(x)	(((x) >> FSR_VER_SHIFT) & 7)
58#define	FSR_RD_SHIFT	30
59#define	FSR_RD(x)	(((x) >> FSR_RD_SHIFT) & 3)
60#define	FSR_FCC1_SHIFT	32
61#define	FSR_FCC1(x)	(((x) >> FSR_FCC1_SHIFT) & 3)
62#define	FSR_FCC2_SHIFT	34
63#define	FSR_FCC2(x)	(((x) >> FSR_FCC2_SHIFT) & 3)
64#define	FSR_FCC3_SHIFT	36
65#define	FSR_FCC3(x)	(((x) >> FSR_FCC3_SHIFT) & 3)
66
67/* A block of 8 double-precision (16 single-precision) FP registers. */
68struct	fpblock {
69	u_long	fpq_l[8];
70};
71
72struct	fpstate {
73	struct	fpblock fp_fb[4];
74	u_long	fp_fsr;
75	u_long	fp_fprs;
76};
77
78void	fp_init_pcb(struct pcb *);
79int	fp_enable_proc(struct proc *);
80/*
81 * Note: The pointers passed to the next two functions must be aligned on
82 * 64 byte boundaries.
83 */
84void	savefpctx(struct fpstate *);
85void	restorefpctx(struct fpstate *);
86
87#endif /* !_MACHINE_FP_H_ */
88