fp.h revision 81392
181147Stmm/*- 281147Stmm * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 381147Stmm * 481147Stmm * Redistribution and use in source and binary forms, with or without 581147Stmm * modification, are permitted provided that the following conditions 681147Stmm * are met: 781147Stmm * 1. Redistributions of source code must retain the above copyright 881147Stmm * notice, this list of conditions and the following disclaimer. 981147Stmm * 2. Redistributions in binary form must reproduce the above copyright 1081147Stmm * notice, this list of conditions and the following disclaimer in the 1181147Stmm * documentation and/or other materials provided with the distribution. 1281147Stmm * 1381392Sjake * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1481147Stmm * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1581147Stmm * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1681392Sjake * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 1781147Stmm * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 1881147Stmm * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 1981147Stmm * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 2081147Stmm * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 2181147Stmm * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 2281147Stmm * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2381147Stmm * 2481147Stmm * $FreeBSD: head/sys/sparc64/include/fp.h 81392 2001-08-10 04:51:19Z jake $ 2581147Stmm */ 2681147Stmm 2781147Stmm#ifndef _MACHINE_FP_H_ 2881147Stmm#define _MACHINE_FP_H_ 2981147Stmm 3081147Stmm#define FPRS_DL (1 << 0) 3181147Stmm#define FPRS_DU (1 << 1) 3281147Stmm#define FPRS_FEF (1 << 2) 3381147Stmm 3481147Stmm#define FSR_CEXC_NX (1 << 0) 3581147Stmm#define FSR_CEXC_DZ (1 << 1) 3681147Stmm#define FSR_CEXC_UF (1 << 2) 3781147Stmm#define FSR_CEXC_OF (1 << 3) 3881147Stmm#define FSR_CEXC_NV (1 << 4) 3981147Stmm#define FSR_AEXC_NX (1 << 5) 4081147Stmm#define FSR_AEXC_DZ (1 << 6) 4181147Stmm#define FSR_AEXC_UF (1 << 7) 4281147Stmm#define FSR_AEXC_OF (1 << 8) 4381147Stmm#define FSR_AEXC_NV (1 << 9) 4481147Stmm#define FSR_QNE (1 << 13) 4581147Stmm#define FSR_NS (1 << 22) 4681147Stmm#define FSR_TEM_NX (1 << 23) 4781147Stmm#define FSR_TEM_DZ (1 << 24) 4881147Stmm#define FSR_TEM_UF (1 << 25) 4981147Stmm#define FSR_TEM_OF (1 << 26) 5081147Stmm#define FSR_TEM_NV (1 << 27) 5181147Stmm 5281147Stmm#define FSR_FCC0_SHIFT 10 5381147Stmm#define FSR_FCC0(x) (((x) >> FSR_FCC0_SHIFT) & 3) 5481147Stmm#define FSR_FTT_SHIFT 14 5581147Stmm#define FSR_FTT(x) (((x) >> FSR_FTT_SHIFT) & 7) 5681147Stmm#define FSR_VER_SHIFT 17 5781147Stmm#define FSR_VER(x) (((x) >> FSR_VER_SHIFT) & 7) 5881147Stmm#define FSR_RD_SHIFT 30 5981147Stmm#define FSR_RD(x) (((x) >> FSR_RD_SHIFT) & 3) 6081147Stmm#define FSR_FCC1_SHIFT 32 6181147Stmm#define FSR_FCC1(x) (((x) >> FSR_FCC1_SHIFT) & 3) 6281147Stmm#define FSR_FCC2_SHIFT 34 6381147Stmm#define FSR_FCC2(x) (((x) >> FSR_FCC2_SHIFT) & 3) 6481147Stmm#define FSR_FCC3_SHIFT 36 6581147Stmm#define FSR_FCC3(x) (((x) >> FSR_FCC3_SHIFT) & 3) 6681147Stmm 6781147Stmm/* A block of 8 double-precision (16 single-precision) FP registers. */ 6881147Stmmstruct fpblock { 6981147Stmm u_long fpq_l[8]; 7081147Stmm}; 7181147Stmm 7281147Stmmstruct fpstate { 7381147Stmm struct fpblock fp_fb[4]; 7481147Stmm u_long fp_fsr; 7581147Stmm u_long fp_fprs; 7681147Stmm}; 7781147Stmm 7881147Stmmvoid fp_init_pcb(struct pcb *); 7981147Stmmint fp_enable_proc(struct proc *); 8081147Stmm/* 8181147Stmm * Note: The pointers passed to the next two functions must be aligned on 8281147Stmm * 64 byte boundaries. 8381147Stmm */ 8481147Stmmvoid savefpctx(struct fpstate *); 8581147Stmmvoid restorefpctx(struct fpstate *); 8681147Stmm 8781147Stmm#endif /* !_MACHINE_FP_H_ */ 88