1/*- 2 * Copyright (c) 1996 3 * The President and Fellows of Harvard College. All rights reserved. 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Aaron Brown and 22 * Harvard University. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)cache.h 8.1 (Berkeley) 6/11/93 40 * from: NetBSD: cache.h,v 1.3 2000/08/01 00:28:02 eeh Exp 41 * 42 * $FreeBSD$ 43 */ 44 45#ifndef _MACHINE_CACHE_H_ 46#define _MACHINE_CACHE_H_ 47 48#define DCACHE_COLOR_BITS (1) 49#define DCACHE_COLORS (1 << DCACHE_COLOR_BITS) 50#define DCACHE_COLOR_MASK (DCACHE_COLORS - 1) 51#define DCACHE_COLOR(va) (((va) >> PAGE_SHIFT) & DCACHE_COLOR_MASK) 52#define DCACHE_OTHER_COLOR(color) \ 53 ((color) ^ DCACHE_COLOR_BITS) 54 55#define DC_TAG_SHIFT 2 56#define DC_VALID_SHIFT 0 57 58#define DC_TAG_BITS 28 59#define DC_VALID_BITS 2 60 61#define DC_TAG_MASK ((1 << DC_TAG_BITS) - 1) 62#define DC_VALID_MASK ((1 << DC_VALID_BITS) - 1) 63 64#define IC_TAG_SHIFT 7 65#define IC_VALID_SHIFT 36 66 67#define IC_TAG_BITS 28 68#define IC_VALID_BITS 1 69 70#define IC_TAG_MASK ((1 << IC_TAG_BITS) - 1) 71#define IC_VALID_MASK ((1 << IC_VALID_BITS) - 1) 72 73#ifndef LOCORE 74 75/* 76 * Cache control information 77 */ 78struct cacheinfo { 79 u_int ic_size; /* instruction cache */ 80 u_int ic_assoc; 81 u_int ic_linesize; 82 u_int dc_size; /* data cache */ 83 u_int dc_assoc; 84 u_int dc_linesize; 85 u_int ec_size; /* external cache info */ 86 u_int ec_assoc; 87 u_int ec_linesize; 88}; 89 90#ifdef _KERNEL 91 92extern u_int dcache_color_ignore; 93 94struct pcpu; 95 96typedef void cache_enable_t(u_int cpu_impl); 97typedef void cache_flush_t(void); 98typedef void dcache_page_inval_t(vm_paddr_t pa); 99typedef void icache_page_inval_t(vm_paddr_t pa); 100 101void cache_init(struct pcpu *pcpu); 102 103cache_enable_t cheetah_cache_enable; 104cache_flush_t cheetah_cache_flush; 105dcache_page_inval_t cheetah_dcache_page_inval; 106icache_page_inval_t cheetah_icache_page_inval; 107 108cache_enable_t spitfire_cache_enable; 109cache_flush_t spitfire_cache_flush; 110dcache_page_inval_t spitfire_dcache_page_inval; 111icache_page_inval_t spitfire_icache_page_inval; 112 113cache_enable_t zeus_cache_enable; 114cache_flush_t zeus_cache_flush; 115dcache_page_inval_t zeus_dcache_page_inval; 116icache_page_inval_t zeus_icache_page_inval; 117 118extern cache_enable_t *cache_enable; 119extern cache_flush_t *cache_flush; 120extern dcache_page_inval_t *dcache_page_inval; 121extern icache_page_inval_t *icache_page_inval; 122 123#endif /* KERNEL */ 124 125#endif /* !LOCORE */ 126 127#endif /* !_MACHINE_CACHE_H_ */ 128