bus.h revision 93052
1116742Ssam/*- 2116904Ssam * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 3178354Ssam * All rights reserved. 4116742Ssam * 5116742Ssam * This code is derived from software contributed to The NetBSD Foundation 6116742Ssam * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 7116742Ssam * NASA Ames Research Center. 8116742Ssam * 9116742Ssam * Redistribution and use in source and binary forms, with or without 10116742Ssam * modification, are permitted provided that the following conditions 11116742Ssam * are met: 12116742Ssam * 1. Redistributions of source code must retain the above copyright 13116742Ssam * notice, this list of conditions and the following disclaimer. 14116742Ssam * 2. Redistributions in binary form must reproduce the above copyright 15116904Ssam * notice, this list of conditions and the following disclaimer in the 16116904Ssam * documentation and/or other materials provided with the distribution. 17116904Ssam * 3. All advertising materials mentioning features or use of this software 18116904Ssam * must display the following acknowledgement: 19116904Ssam * This product includes software developed by the NetBSD 20116904Ssam * Foundation, Inc. and its contributors. 21116904Ssam * 4. Neither the name of The NetBSD Foundation nor the names of its 22116904Ssam * contributors may be used to endorse or promote products derived 23116904Ssam * from this software without specific prior written permission. 24116904Ssam * 25116904Ssam * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26116742Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27116742Ssam * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28116742Ssam * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29116742Ssam * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30116742Ssam * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31116742Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32116742Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33116742Ssam * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34138568Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35138568Ssam * POSSIBILITY OF SUCH DAMAGE. 36138568Ssam */ 37138568Ssam/* 38138568Ssam * Copyright (c) 1997-1999 Eduardo E. Horvath. All rights reserved. 39138568Ssam * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 40138568Ssam * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 41138568Ssam * 42138568Ssam * Redistribution and use in source and binary forms, with or without 43138568Ssam * modification, are permitted provided that the following conditions 44138568Ssam * are met: 45138568Ssam * 1. Redistributions of source code must retain the above copyright 46116742Ssam * notice, this list of conditions and the following disclaimer. 47116742Ssam * 2. Redistributions in binary form must reproduce the above copyright 48178354Ssam * notice, this list of conditions and the following disclaimer in the 49121180Ssam * documentation and/or other materials provided with the distribution. 50116742Ssam * 3. All advertising materials mentioning features or use of this software 51170530Ssam * must display the following acknowledgement: 52116742Ssam * This product includes software developed by Christopher G. Demetriou 53170530Ssam * for the NetBSD Project. 54116742Ssam * 4. The name of the author may not be used to endorse or promote products 55138568Ssam * derived from this software without specific prior written permission 56138568Ssam * 57116742Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 58138568Ssam * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59140754Ssam * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60116742Ssam * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 61153349Ssam * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 62155688Ssam * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 63153349Ssam * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 64170530Ssam * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 65170530Ssam * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 66170530Ssam * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67170530Ssam * 68170530Ssam * from: NetBSD: bus.h,v 1.28 2001/07/19 15:32:19 thorpej Exp 69170530Ssam * and 70170530Ssam * from: FreeBSD: src/sys/alpha/include/bus.h,v 1.9 2001/01/09 71170530Ssam * 72170530Ssam * $FreeBSD: head/sys/sparc64/include/bus.h 93052 2002-03-23 20:27:32Z tmm $ 73138568Ssam */ 74138568Ssam 75116742Ssam#ifndef _MACHINE_BUS_H_ 76178354Ssam#define _MACHINE_BUS_H_ 77178354Ssam 78148290Ssam#include "opt_bus.h" 79148291Ssam#ifdef BUS_SPACE_DEBUG 80148291Ssam#include <sys/ktr.h> 81148291Ssam#endif 82167242Ssam 83167242Ssam#include <machine/types.h> 84167242Ssam#include <machine/cpufunc.h> 85140754Ssam#include <machine/upa.h> 86178354Ssam 87178354Ssam/* 88178354Ssam * UPA and SBUS spaces are non-cached and big endian 89178354Ssam * (except for RAM and PROM) 90178354Ssam * 91178354Ssam * PCI spaces are non-cached and little endian 92178354Ssam */ 93178354Ssam#define UPA_BUS_SPACE 0 94116742Ssam#define SBUS_BUS_SPACE 1 95178354Ssam#define PCI_CONFIG_BUS_SPACE 2 96178354Ssam#define PCI_IO_BUS_SPACE 3 97178354Ssam#define PCI_MEMORY_BUS_SPACE 4 98178354Ssam#define LAST_BUS_SPACE 5 99178354Ssam 100178354Ssamextern int bus_type_asi[]; 101178354Ssamextern int bus_stream_asi[]; 102178354Ssam 103178354Ssam#define __BUS_SPACE_HAS_STREAM_METHODS 1 104178354Ssam 105178354Ssam/* 106178354Ssam * Bus address and size types 107178354Ssam */ 108138568Ssamtypedef u_long bus_space_handle_t; 109138568Ssamtypedef int bus_type_t; 110170530Ssamtypedef u_long bus_addr_t; 111178354Ssamtypedef u_long bus_size_t; 112138568Ssam 113170530Ssam#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF 114170530Ssam#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF 115170530Ssam#define BUS_SPACE_MAXSIZE (128 * 1024) /* Maximum supported size */ 116170530Ssam#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF 117170530Ssam#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF 118178354Ssam#define BUS_SPACE_MAXADDR 0xFFFFFFFF 119178354Ssam 120127648Ssam#define BUS_SPACE_UNRESTRICTED (~0UL) 121170530Ssam 122170530Ssam/* 123173273Ssam * Access methods for bus resources and address space. 124170530Ssam */ 125173273Ssamtypedef struct bus_space_tag *bus_space_tag_t; 126178354Ssam 127170530Ssamstruct bus_space_tag { 128178354Ssam void *cookie; 129178354Ssam bus_space_tag_t parent; 130178354Ssam int type; 131178354Ssam 132170530Ssam void (*bus_barrier)(bus_space_tag_t, bus_space_handle_t, 133170530Ssam bus_size_t, bus_size_t, int); 134170530Ssam}; 135170530Ssam 136178354Ssam/* 137170530Ssam * Helpers 138170530Ssam */ 139170530Ssamint sparc64_bus_mem_map(bus_space_tag_t, bus_space_handle_t, bus_size_t, 140170530Ssam int, vm_offset_t, void **); 141170530Ssamint sparc64_bus_mem_unmap(void *, bus_size_t); 142170530Ssambus_space_handle_t sparc64_fake_bustag(int, bus_addr_t, 143170530Ssam struct bus_space_tag *); 144170530Ssam 145170530Ssam/* 146170530Ssam * Bus space function prototypes. 147170530Ssam */ 148170530Ssamstatic void bus_space_barrier(bus_space_tag_t, bus_space_handle_t, bus_size_t, 149170530Ssam bus_size_t, int); 150170530Ssam 151170530Ssam/* This macro finds the first "upstream" implementation of method `f' */ 152170530Ssam#define _BS_CALL(t,f) \ 153170530Ssam while (t->f == NULL) \ 154170530Ssam t = t->parent; \ 155170530Ssam return (*(t)->f) 156170530Ssam 157170530Ssamstatic __inline void 158170530Ssambus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 159116742Ssam bus_size_t s, int f) 160170530Ssam{ 161170530Ssam _BS_CALL(t, bus_barrier)(t, h, o, s, f); 162170530Ssam} 163170530Ssam 164170530Ssam/* flags for bus space map functions */ 165170530Ssam#define BUS_SPACE_MAP_CACHEABLE 0x0001 166178354Ssam#define BUS_SPACE_MAP_LINEAR 0x0002 167178354Ssam#define BUS_SPACE_MAP_READONLY 0x0004 168178354Ssam#define BUS_SPACE_MAP_PREFETCHABLE 0x0008 169170530Ssam/* placeholders for bus functions... */ 170178354Ssam#define BUS_SPACE_MAP_BUS1 0x0100 171178354Ssam#define BUS_SPACE_MAP_BUS2 0x0200 172178354Ssam#define BUS_SPACE_MAP_BUS3 0x0400 173178354Ssam#define BUS_SPACE_MAP_BUS4 0x0800 174178354Ssam 175170530Ssam/* flags for bus_space_barrier() */ 176170530Ssam#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 177170530Ssam#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 178170530Ssam 179178354Ssam#ifdef BUS_SPACE_DEBUG 180178354Ssam#define KTR_BUS KTR_CT2 181170530Ssam#define BUS_HANDLE_MIN UPA_MEMSTART 182170530Ssam#define __BUS_DEBUG_ACCESS(h, o, desc, sz) do { \ 183178354Ssam CTR4(KTR_BUS, "bus space: %s %d: handle %#lx, offset %#lx", \ 184170530Ssam (desc), (sz), (h), (o)); \ 185170530Ssam if ((h) + (o) < BUS_HANDLE_MIN) \ 186178354Ssam panic("bus space access at %#lx out of range", \ 187170530Ssam (h) + (o)); \ 188170530Ssam} while (0) 189170530Ssam#else 190170530Ssam#define __BUS_DEBUG_ACCESS(h, o, desc, sz) 191173273Ssam#endif 192173273Ssam 193172211Ssam#define bus_space_read_1(t, h, o) ({ \ 194173273Ssam __BUS_DEBUG_ACCESS((h), (o), "read", 1); \ 195172211Ssam lduba_nc((caddr_t)((h) + (o)), bus_type_asi[(t)->type]); \ 196173273Ssam}) 197170530Ssam 198178354Ssam#define bus_space_read_2(t, h, o) ({ \ 199178354Ssam __BUS_DEBUG_ACCESS((h), (o), "read", 2); \ 200178354Ssam lduha_nc((caddr_t)((h) + (o)), bus_type_asi[(t)->type]); \ 201178354Ssam}) 202178354Ssam 203178354Ssam#define bus_space_read_4(t, h, o) ({ \ 204178354Ssam __BUS_DEBUG_ACCESS((h), (o), "read", 4); \ 205178354Ssam lduwa_nc((caddr_t)((h) + (o)), bus_type_asi[(t)->type]); \ 206178354Ssam}) 207178354Ssam 208178354Ssam#define bus_space_read_8(t, h, o) ({ \ 209178354Ssam __BUS_DEBUG_ACCESS((h), (o), "read", 8); \ 210178354Ssam ldxa_nc((caddr_t)(h) + (o), bus_type_asi[(t)->type]); \ 211178354Ssam}) 212178354Ssam 213178354Ssam#define bus_space_read_multi_1(t, h, o, a, c) do { \ 214170530Ssam int i = c; \ 215178354Ssam u_int8_t *p = (u_int8_t *)a; \ 216178354Ssam while (i-- > 0) \ 217170530Ssam *p++ = bus_space_read_1(t, h, o); \ 218170530Ssam} while (0) 219170530Ssam 220170530Ssam#define bus_space_read_multi_2(t, h, o, a, c) do { \ 221170530Ssam int i = c; \ 222170530Ssam u_int16_t *p = (u_int16_t *)a; \ 223178354Ssam while (i-- > 0) \ 224178354Ssam *p++ = bus_space_read_2(t, h, o); \ 225178354Ssam} while (0) 226178354Ssam 227170530Ssam#define bus_space_read_multi_4(t, h, o, a, c) do { \ 228170530Ssam int i = c; \ 229170530Ssam u_int32_t *p = (u_int32_t *)a; \ 230179643Ssam while (i-- > 0) \ 231179643Ssam *p++ = bus_space_read_4(t, h, o); \ 232170530Ssam} while (0) 233170530Ssam 234178354Ssam#define bus_space_read_multi_8(t, h, o, a, c) do { \ 235178354Ssam int i = c; \ 236170530Ssam u_int64_t *p = (u_int64_t *)a; \ 237170530Ssam while (i-- > 0) \ 238170530Ssam *p++ = bus_space_read_8(t, h, o); \ 239178354Ssam} while (0) 240178354Ssam 241178354Ssam#define bus_space_write_1(t, h, o, v) do { \ 242170530Ssam __BUS_DEBUG_ACCESS((h), (o), "write", 1); \ 243170530Ssam stba_nc((caddr_t)((h) + (o)), bus_type_asi[(t)->type], (v)); \ 244170530Ssam} while (0) 245170530Ssam 246178354Ssam#define bus_space_write_2(t, h, o, v) do { \ 247170530Ssam __BUS_DEBUG_ACCESS((h), (o), "write", 2); \ 248178354Ssam stha_nc((caddr_t)((h) + (o)), bus_type_asi[(t)->type], (v)); \ 249170530Ssam} while (0) 250138568Ssam 251170530Ssam#define bus_space_write_4(t, h, o, v) do { \ 252170530Ssam __BUS_DEBUG_ACCESS((h), (o), "write", 4); \ 253170530Ssam stwa_nc((caddr_t)((h) + (o)), bus_type_asi[(t)->type], (v)); \ 254170530Ssam} while (0) 255170530Ssam 256170530Ssam#define bus_space_write_8(t, h, o, v) do { \ 257138568Ssam __BUS_DEBUG_ACCESS((h), (o), "write", 8); \ 258170530Ssam stxa_nc((caddr_t)((h) + (o)), bus_type_asi[(t)->type], (v)); \ 259170530Ssam} while (0) 260170530Ssam 261170530Ssam#define bus_space_write_multi_1(t, h, o, a, c) do { \ 262170530Ssam int i = c; \ 263178354Ssam u_int8_t *p = (u_int8_t *)a; \ 264178354Ssam while (i-- > 0) \ 265178354Ssam bus_space_write_1(t, h, o, *p++); \ 266170530Ssam} while (0) 267170530Ssam 268170530Ssam#define bus_space_write_multi_2(t, h, o, a, c) do { \ 269170530Ssam int i = c; \ 270170530Ssam u_int16_t *p = (u_int16_t *)a; \ 271170530Ssam while (i-- > 0) \ 272170530Ssam bus_space_write_2(t, h, o, *p++); \ 273170530Ssam} while (0) 274170530Ssam 275170530Ssam#define bus_space_write_multi_4(t, h, o, a, c) do { \ 276116742Ssam int i = c; \ 277116742Ssam u_int32_t *p = (u_int32_t *)a; \ 278178354Ssam while (i-- > 0) \ 279178354Ssam bus_space_write_4(t, h, o, *p++); \ 280178354Ssam} while (0) 281178354Ssam 282178354Ssam#define bus_space_write_multi_8(t, h, o, a, c) do { \ 283178354Ssam int i = c; \ 284178354Ssam u_int64_t *p = (u_int64_t *)a; \ 285178354Ssam while (i-- > 0) \ 286178354Ssam bus_space_write_8(t, h, o, *p++); \ 287178354Ssam} while (0) 288178354Ssam 289178354Ssam#define bus_space_set_multi_1(t, h, o, v, c) do { \ 290178354Ssam int i = c; \ 291178354Ssam while (i-- > 0) \ 292178354Ssam bus_space_write_1(t, h, o, v); \ 293178354Ssam} while (0) 294178354Ssam 295178354Ssam#define bus_space_set_multi_2(t, h, o, v, c) do { \ 296178354Ssam int i = c; \ 297178354Ssam while (i-- > 0) \ 298178354Ssam bus_space_write_2(t, h, o, v); \ 299178354Ssam} while (0) 300178354Ssam 301178354Ssam#define bus_space_set_multi_4(t, h, o, v, c) do { \ 302178354Ssam int i = c; \ 303178354Ssam while (i-- > 0) \ 304178354Ssam bus_space_write_4(t, h, o, v); \ 305178354Ssam} while (0) 306178354Ssam 307178354Ssam#define bus_space_set_multi_8(t, h, o, v, c) do { \ 308178354Ssam int i = c; \ 309178354Ssam while (i-- > 0) \ 310178354Ssam bus_space_write_8(t, h, o, v); \ 311178354Ssam} while (0) 312178354Ssam 313178354Ssamstatic __inline void 314178354Ssambus_space_read_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 315178354Ssam u_int8_t *a, bus_size_t c) 316178354Ssam{ 317178354Ssam for (; c; a++, c--, o++) 318178354Ssam *a = bus_space_read_1(t, h, o); 319178354Ssam} 320178354Ssam 321178354Ssamstatic __inline void 322178354Ssambus_space_read_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 323178354Ssam u_int16_t *a, bus_size_t c) 324178354Ssam{ 325178354Ssam for (; c; a++, c--, o+=2) 326178354Ssam *a = bus_space_read_2(t, h, o); 327178354Ssam} 328178354Ssam 329178354Ssamstatic __inline void 330178354Ssambus_space_read_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 331178354Ssam u_int32_t *a, bus_size_t c) 332178354Ssam{ 333178354Ssam for (; c; a++, c--, o+=4) 334178354Ssam *a = bus_space_read_4(t, h, o); 335178354Ssam} 336178354Ssam 337178354Ssamstatic __inline void 338178354Ssambus_space_read_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 339178354Ssam u_int64_t *a, bus_size_t c) 340178354Ssam{ 341178354Ssam for (; c; a++, c--, o+=8) 342178354Ssam *a = bus_space_read_8(t, h, o); 343178354Ssam} 344178354Ssam 345178354Ssamstatic __inline void 346178354Ssambus_space_write_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 347178354Ssam const u_int8_t *a, bus_size_t c) 348178354Ssam{ 349178354Ssam for (; c; a++, c--, o++) 350178354Ssam bus_space_write_1(t, h, o, *a); 351178354Ssam} 352178354Ssam 353178354Ssamstatic __inline void 354178354Ssambus_space_write_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 355178354Ssam const u_int16_t *a, bus_size_t c) 356178354Ssam{ 357178354Ssam for (; c; a++, c--, o+=2) 358178354Ssam bus_space_write_2(t, h, o, *a); 359178354Ssam} 360178354Ssam 361178354Ssamstatic __inline void 362178354Ssambus_space_write_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 363178354Ssam const u_int32_t *a, bus_size_t c) 364178354Ssam{ 365178354Ssam for (; c; a++, c--, o+=4) 366178354Ssam bus_space_write_4(t, h, o, *a); 367178354Ssam} 368178354Ssam 369178354Ssamstatic __inline void 370178354Ssambus_space_write_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 371178354Ssam const u_int64_t *a, bus_size_t c) 372178354Ssam{ 373178354Ssam for (; c; a++, c--, o+=8) 374178354Ssam bus_space_write_8(t, h, o, *a); 375178354Ssam} 376178354Ssam 377178354Ssamstatic __inline void 378178354Ssambus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 379178354Ssam const u_int8_t v, bus_size_t c) 380178354Ssam{ 381178354Ssam for (; c; c--, o++) 382178354Ssam bus_space_write_1(t, h, o, v); 383178354Ssam} 384178354Ssam 385178354Ssamstatic __inline void 386178354Ssambus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 387178354Ssam const u_int16_t v, bus_size_t c) 388178354Ssam{ 389178354Ssam for (; c; c--, o+=2) 390178354Ssam bus_space_write_2(t, h, o, v); 391178354Ssam} 392178354Ssam 393178354Ssamstatic __inline void 394178354Ssambus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 395178354Ssam const u_int32_t v, bus_size_t c) 396178354Ssam{ 397178354Ssam for (; c; c--, o+=4) 398178354Ssam bus_space_write_4(t, h, o, v); 399178354Ssam} 400178354Ssam 401178354Ssamstatic __inline void 402178354Ssambus_space_set_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 403178354Ssam const u_int64_t v, bus_size_t c) 404178354Ssam{ 405178354Ssam for (; c; c--, o+=8) 406178354Ssam bus_space_write_8(t, h, o, v); 407178354Ssam} 408178354Ssam 409178354Ssamstatic __inline void 410178354Ssambus_space_copy_region_1(bus_space_tag_t t, bus_space_handle_t h1, 411178354Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 412178354Ssam{ 413178354Ssam for (; c; c--, o1++, o2++) 414178354Ssam bus_space_write_1(t, h1, o1, bus_space_read_1(t, h2, o2)); 415178354Ssam} 416178354Ssam 417178354Ssamstatic __inline void 418178354Ssambus_space_copy_region_2(bus_space_tag_t t, bus_space_handle_t h1, 419178354Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 420178354Ssam{ 421178354Ssam for (; c; c--, o1+=2, o2+=2) 422116742Ssam bus_space_write_2(t, h1, o1, bus_space_read_2(t, h2, o2)); 423116742Ssam} 424116742Ssam 425178354Ssamstatic __inline void 426170530Ssambus_space_copy_region_4(bus_space_tag_t t, bus_space_handle_t h1, 427170530Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 428170530Ssam{ 429170530Ssam for (; c; c--, o1+=4, o2+=4) 430138568Ssam bus_space_write_4(t, h1, o1, bus_space_read_4(t, h2, o2)); 431138568Ssam} 432147794Ssam 433138568Ssamstatic __inline void 434138568Ssambus_space_copy_region_8(bus_space_tag_t t, bus_space_handle_t h1, 435138568Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 436138568Ssam{ 437138568Ssam for (; c; c--, o1+=8, o2+=8) 438138568Ssam bus_space_write_8(t, h1, o1, bus_space_read_8(t, h2, o2)); 439138568Ssam} 440138568Ssam 441148288Ssam#define bus_space_read_stream_1(t, h, o) ({ \ 442138568Ssam __BUS_DEBUG_ACCESS((h), (o), "read stream", 1); \ 443138568Ssam lduba_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type]); \ 444138568Ssam}) 445138568Ssam 446138568Ssam#define bus_space_read_stream_2(t, h, o) ({ \ 447127648Ssam __BUS_DEBUG_ACCESS((h), (o), "read stream", 2); \ 448127648Ssam lduha_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type]); \ 449178354Ssam}) 450138568Ssam 451138568Ssam#define bus_space_read_stream_4(t, h, o) ({ \ 452138568Ssam __BUS_DEBUG_ACCESS((h), (o), "read stream", 4); \ 453138568Ssam lduwa_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type]); \ 454138568Ssam}) 455138568Ssam 456138568Ssam#define bus_space_read_stream_8(t, h, o) ({ \ 457178354Ssam __BUS_DEBUG_ACCESS((h), (o), "read stream", 8); \ 458170530Ssam ldxa_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type]); \ 459178354Ssam}) 460116742Ssam 461170530Ssam#define bus_space_read_multi_stream_1(t, h, o, a, c) do { \ 462170530Ssam int i = c; \ 463170530Ssam u_int8_t *p = (u_int8_t *)a; \ 464170530Ssam while (i-- > 0) \ 465178354Ssam *p++ = bus_space_read_stream_1(t, h, o); \ 466178354Ssam} while (0) 467170530Ssam 468178354Ssam#define bus_space_read_multi_stream_2(t, h, o, a, c) do { \ 469173273Ssam int i = c; \ 470172062Ssam u_int16_t *p = (u_int16_t *)a; \ 471178354Ssam while (i-- > 0) \ 472148288Ssam *p++ = bus_space_read_stream_2(t, h, o); \ 473170530Ssam} while (0) 474178354Ssam 475178354Ssam#define bus_space_read_multi_stream_4(t, h, o, a, c) do { \ 476178354Ssam int i = c; \ 477179391Ssam u_int32_t *p = (u_int32_t *)a; \ 478178354Ssam while (i-- > 0) \ 479172211Ssam *p++ = bus_space_read_stream_4(t, h, o); \ 480170530Ssam} while (0) 481178354Ssam 482178354Ssam#define bus_space_read_multi_stream_8(t, h, o, a, c) do { \ 483178354Ssam int i = c; \ 484156358Ssam u_int64_t *p = (u_int64_t *)a; \ 485170530Ssam while (i-- > 0) \ 486170530Ssam *p++ = bus_space_read_stream_8(t, h, o); \ 487170530Ssam} while (0) 488170530Ssam 489170530Ssam#define bus_space_write_stream_1(t, h, o, v) do { \ 490170530Ssam __BUS_DEBUG_ACCESS((h), (o), "write stream", 1); \ 491170530Ssam stba_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type], (v)); \ 492170530Ssam} while (0) 493170530Ssam 494170530Ssam#define bus_space_write_stream_2(t, h, o, v) do { \ 495148288Ssam __BUS_DEBUG_ACCESS((h), (o), "write stream", 2); \ 496178354Ssam stha_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type], (v)); \ 497178354Ssam} while (0) 498178957Ssam 499148288Ssam#define bus_space_write_stream_4(t, h, o, v) do { \ 500148288Ssam __BUS_DEBUG_ACCESS((h), (o), "write stream", 4); \ 501138568Ssam stwa_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type], (v)); \ 502138568Ssam} while (0) 503138568Ssam 504138568Ssam#define bus_space_write_stream_8(t, h, o, v) do { \ 505138568Ssam __BUS_DEBUG_ACCESS((h), (o), "write stream", 8); \ 506138568Ssam stxa_nc((caddr_t)((h) + (o)), bus_stream_asi[(t)->type], (v)); \ 507138568Ssam} while (0) 508138568Ssam 509138568Ssam#define bus_space_write_multi_stream_1(t, h, o, a, c) do { \ 510178954Ssam int i = c; \ 511178957Ssam u_int8_t *p = (u_int8_t *)a; \ 512138568Ssam while (i-- > 0) \ 513138568Ssam bus_space_write_stream_1(t, h, o, *p++); \ 514138568Ssam} while (0) 515138568Ssam 516138568Ssam#define bus_space_write_multi_stream_2(t, h, o, a, c) do { \ 517148288Ssam int i = c; \ 518148288Ssam u_int16_t *p = (u_int16_t *)a; \ 519148288Ssam while (i-- > 0) \ 520148288Ssam bus_space_write_stream_2(t, h, o, *p++); \ 521138568Ssam} while (0) 522116742Ssam 523178957Ssam#define bus_space_write_multi_stream_4(t, h, o, a, c) do { \ 524178957Ssam int i = c; \ 525178957Ssam u_int32_t *p = (u_int32_t *)a; \ 526178957Ssam while (i-- > 0) \ 527170530Ssam bus_space_write_stream_4(t, h, o, *p++); \ 528178354Ssam} while (0) 529170530Ssam 530170530Ssam#define bus_space_write_multi_stream_8(t, h, o, a, c) do { \ 531170530Ssam int i = c; \ 532170530Ssam u_int64_t *p = (u_int64_t *)a; \ 533170530Ssam while (i-- > 0) \ 534170530Ssam bus_space_write_stream_8(t, h, o, *p++); \ 535173273Ssam} while (0) 536173273Ssam 537170530Ssam#define bus_space_set_multi_stream_1(t, h, o, v, c) do { \ 538138568Ssam int i = c; \ 539138568Ssam while (i-- > 0) \ 540178354Ssam bus_space_write_stream_1(t, h, o, v); \ 541178354Ssam} while (0) 542178354Ssam 543178354Ssam#define bus_space_set_multi_stream_2(t, h, o, v, c) do { \ 544178354Ssam int i = c; \ 545178354Ssam while (i-- > 0) \ 546178354Ssam bus_space_write_stream_2(t, h, o, v); \ 547170530Ssam} while (0) 548165569Ssam 549138568Ssam#define bus_space_set_multi_stream_4(t, h, o, v, c) do { \ 550170530Ssam int i = c; \ 551178354Ssam while (i-- > 0) \ 552178354Ssam bus_space_write_stream_4(t, h, o, v); \ 553170530Ssam} while (0) 554116742Ssam 555116742Ssam#define bus_space_set_multi_stream_8(t, h, o, v, c) do { \ 556178354Ssam int i = c; \ 557116742Ssam while (i-- > 0) \ 558116742Ssam bus_space_write_stream_8(t, h, o, v); \ 559116742Ssam} while (0) 560152450Ssam 561170530Ssamstatic __inline void 562170530Ssambus_space_read_region_stream_1(bus_space_tag_t t, bus_space_handle_t h, 563116742Ssam bus_size_t o, u_int8_t *a, bus_size_t c) 564170530Ssam{ 565170530Ssam for (; c; a++, c--, o++) 566173861Ssam *a = bus_space_read_stream_1(t, h, o); 567173861Ssam} 568116742Ssam 569170530Ssamstatic __inline void 570116742Ssambus_space_read_region_stream_2(bus_space_tag_t t, bus_space_handle_t h, 571138568Ssam bus_size_t o, u_int16_t *a, bus_size_t c) 572138568Ssam{ 573138568Ssam for (; c; a++, c--, o+=2) 574138568Ssam *a = bus_space_read_stream_2(t, h, o); 575178354Ssam} 576138568Ssam 577178354Ssamstatic __inline void 578138568Ssambus_space_read_region_stream_4(bus_space_tag_t t, bus_space_handle_t h, 579138568Ssam bus_size_t o, u_int32_t *a, bus_size_t c) 580178354Ssam{ 581138568Ssam for (; c; a++, c--, o+=4) 582178354Ssam *a = bus_space_read_stream_4(t, h, o); 583138568Ssam} 584138568Ssam 585139509Ssamstatic __inline void 586139509Ssambus_space_read_region_stream_8(bus_space_tag_t t, bus_space_handle_t h, 587139509Ssam bus_size_t o, u_int64_t *a, bus_size_t c) 588139509Ssam{ 589139509Ssam for (; c; a++, c--, o+=8) 590139509Ssam *a = bus_space_read_stream_8(t, h, o); 591139509Ssam} 592139509Ssam 593139509Ssamstatic __inline void 594139509Ssambus_space_write_region_stream_1(bus_space_tag_t t, bus_space_handle_t h, 595139509Ssam bus_size_t o, const u_int8_t *a, bus_size_t c) 596139509Ssam{ 597139509Ssam for (; c; a++, c--, o++) 598139509Ssam bus_space_write_stream_1(t, h, o, *a); 599170530Ssam} 600139509Ssam 601139509Ssamstatic __inline void 602139509Ssambus_space_write_region_stream_2(bus_space_tag_t t, bus_space_handle_t h, 603139509Ssam bus_size_t o, const u_int16_t *a, bus_size_t c) 604139509Ssam{ 605139509Ssam for (; c; a++, c--, o+=2) 606139509Ssam bus_space_write_stream_2(t, h, o, *a); 607139509Ssam} 608139509Ssam 609139509Ssamstatic __inline void 610139509Ssambus_space_write_region_stream_4(bus_space_tag_t t, bus_space_handle_t h, 611170530Ssam bus_size_t o, const u_int32_t *a, bus_size_t c) 612139509Ssam{ 613139509Ssam for (; c; a++, c--, o+=4) 614139509Ssam bus_space_write_stream_4(t, h, o, *a); 615172211Ssam} 616178354Ssam 617172211Ssamstatic __inline void 618172211Ssambus_space_write_region_stream_8(bus_space_tag_t t, bus_space_handle_t h, 619178354Ssam bus_size_t o, const u_int64_t *a, bus_size_t c) 620172211Ssam{ 621178354Ssam for (; c; a++, c--, o+=8) 622178354Ssam bus_space_write_stream_8(t, h, o, *a); 623172211Ssam} 624172211Ssam 625173273Ssamstatic __inline void 626178354Ssambus_space_set_region_stream_1(bus_space_tag_t t, bus_space_handle_t h, 627178354Ssam bus_size_t o, const u_int8_t v, bus_size_t c) 628178354Ssam{ 629178354Ssam for (; c; c--, o++) 630178354Ssam bus_space_write_stream_1(t, h, o, v); 631178354Ssam} 632178354Ssam 633178354Ssamstatic __inline void 634178354Ssambus_space_set_region_stream_2(bus_space_tag_t t, bus_space_handle_t h, 635178354Ssam bus_size_t o, const u_int16_t v, bus_size_t c) 636178354Ssam{ 637178354Ssam for (; c; c--, o+=2) 638173273Ssam bus_space_write_stream_2(t, h, o, v); 639173273Ssam} 640173273Ssam 641173273Ssamstatic __inline void 642173273Ssambus_space_set_region_stream_4(bus_space_tag_t t, bus_space_handle_t h, 643173273Ssam bus_size_t o, const u_int32_t v, bus_size_t c) 644173273Ssam{ 645173273Ssam for (; c; c--, o+=4) 646173273Ssam bus_space_write_stream_4(t, h, o, v); 647170530Ssam} 648138568Ssam 649138568Ssamstatic __inline void 650138568Ssambus_space_set_region_stream_8(bus_space_tag_t t, bus_space_handle_t h, 651138568Ssam bus_size_t o, const u_int64_t v, bus_size_t c) 652138568Ssam{ 653138568Ssam for (; c; c--, o+=8) 654138568Ssam bus_space_write_stream_8(t, h, o, v); 655138568Ssam} 656138568Ssam 657138568Ssamstatic __inline void 658138568Ssambus_space_copy_region_stream_1(bus_space_tag_t t, bus_space_handle_t h1, 659138568Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 660138568Ssam{ 661138568Ssam for (; c; c--, o1++, o2++) 662138568Ssam bus_space_write_stream_1(t, h1, o1, bus_space_read_stream_1(t, h2, 663138568Ssam o2)); 664138568Ssam} 665138568Ssam 666138568Ssamstatic __inline void 667138568Ssambus_space_copy_region_stream_2(bus_space_tag_t t, bus_space_handle_t h1, 668138568Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 669148288Ssam{ 670148288Ssam for (; c; c--, o1+=2, o2+=2) 671148288Ssam bus_space_write_stream_2(t, h1, o1, bus_space_read_stream_2(t, h2, 672148288Ssam o2)); 673164634Ssam} 674170530Ssam 675173273Ssamstatic __inline void 676173273Ssambus_space_copy_region_stream_4(bus_space_tag_t t, bus_space_handle_t h1, 677138568Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 678138568Ssam{ 679138568Ssam for (; c; c--, o1+=4, o2+=4) 680116742Ssam bus_space_write_stream_4(t, h1, o1, bus_space_read_stream_4(t, h2, 681178354Ssam o2)); 682178354Ssam} 683178354Ssam 684178354Ssamstatic __inline void 685138568Ssambus_space_copy_region_stream_8(bus_space_tag_t t, bus_space_handle_t h1, 686178354Ssam bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 687178354Ssam{ 688178354Ssam for (; c; c--, o1+=8, o2+=8) 689148288Ssam bus_space_write_stream_8(t, h1, o1, bus_space_read_8(t, h2, o2)); 690178354Ssam} 691178354Ssam 692178354Ssam/* Back-compat functions for old ISA drivers */ 693148288Ssamextern bus_space_tag_t isa_io_bt; 694178354Ssamextern bus_space_handle_t isa_io_hdl; 695178354Ssamextern bus_space_tag_t isa_mem_bt; 696178354Ssamextern bus_space_handle_t isa_mem_hdl; 697148288Ssam 698178354Ssam#define inb(o) bus_space_read_1(isa_io_bt, isa_io_hdl, o) 699178354Ssam#define inw(o) bus_space_read_2(isa_io_bt, isa_io_hdl, o) 700178354Ssam#define inl(o) bus_space_read_4(isa_io_bt, isa_io_hdl, o) 701178354Ssam#define outb(o, v) bus_space_write_1(isa_io_bt, isa_io_hdl, o, v) 702178354Ssam#define outw(o, v) bus_space_write_2(isa_io_bt, isa_io_hdl, o, v) 703178354Ssam#define outl(o, v) bus_space_write_4(isa_io_bt, isa_io_hdl, o, v) 704178354Ssam 705178354Ssam#define readb(o) bus_space_read_1(isa_mem_bt, isa_mem_hdl, o) 706178354Ssam#define readw(o) bus_space_read_2(isa_mem_bt, isa_mem_hdl, o) 707178354Ssam#define readl(o) bus_space_read_4(isa_mem_bt, isa_mem_hdl, o) 708178354Ssam#define writeb(o, v) bus_space_write_1(isa_mem_bt, isa_mem_hdl, o, v) 709178354Ssam#define writew(o, v) bus_space_write_2(isa_mem_bt, isa_mem_hdl, o, v) 710178354Ssam#define writel(o, v) bus_space_write_4(isa_mem_bt, isa_mem_hdl, o, v) 711178354Ssam 712178354Ssam#define insb(o, a, c) \ 713178354Ssam bus_space_read_multi_1(isa_io_bt, isa_io_hdl, o, (void*)a, c) 714178354Ssam#define insw(o, a, c) \ 715178354Ssam bus_space_read_multi_2(isa_io_bt, isa_io_hdl, o, (void*)a, c) 716178354Ssam#define insl(o, a, c) \ 717178354Ssam bus_space_read_multi_4(isa_io_bt, isa_io_hdl, o, (void*)a, c) 718178354Ssam#define outsb(o, a, c) \ 719167441Ssam bus_space_write_multi_1(isa_io_bt, isa_io_hdl, o, (void*)a, c) 720167441Ssam#define outsw(o, a, c) \ 721167441Ssam bus_space_write_multi_2(isa_io_bt, isa_io_hdl, o, (void*)a, c) 722167441Ssam#define outsl(o, a, c) \ 723167441Ssam bus_space_write_multi_4(isa_io_bt, isa_io_hdl, o, (void*)a, c) 724167441Ssam 725167441Ssam#define memcpy_fromio(d, s, c) \ 726178354Ssam bus_space_read_region_1(isa_mem_bt, isa_mem_hdl, s, d, c) 727178354Ssam#define memcpy_toio(d, s, c) \ 728178354Ssam bus_space_write_region_1(isa_mem_bt, isa_mem_hdl, d, s, c) 729167441Ssam#define memcpy_io(d, s, c) \ 730178354Ssam bus_space_copy_region_1(isa_mem_bt, isa_mem_hdl, s, isa_mem_hdl, d, c) 731178354Ssam#define memset_io(d, v, c) \ 732178354Ssam bus_space_set_region_1(isa_mem_bt, isa_mem_hdl, d, v, c) 733167441Ssam#define memsetw_io(d, v, c) \ 734178354Ssam bus_space_set_region_2(isa_mem_bt, isa_mem_hdl, d, v, c) 735178354Ssam 736178354Ssamstatic __inline void 737167441Ssammemsetw(void *d, int val, size_t size) 738167441Ssam{ 739178354Ssam u_int16_t *sp = d; 740167441Ssam 741178354Ssam while (size--) 742167441Ssam *sp++ = val; 743178354Ssam} 744170530Ssam 745167441Ssam/* DMA support */ 746116742Ssam 747178354Ssam/* 748178354Ssam * Flags used in various bus DMA methods. 749178354Ssam */ 750178354Ssam#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 751178354Ssam#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 752178354Ssam#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 753167441Ssam#define BUS_DMAMEM_NOSYNC 0x004 /* map memory to not require sync */ 754178354Ssam#define BUS_DMA_NOWRITE 0x008 755178354Ssam#define BUS_DMA_BUS1 0x010 756178354Ssam#define BUS_DMA_BUS2 0x020 757116742Ssam#define BUS_DMA_BUS3 0x040 758116742Ssam#define BUS_DMA_BUS4 0x080 759116742Ssam/* 760 * The following flags are from NetBSD, but are not implemented for all 761 * architetures, and should therefore not be used in MI code. 762 * Some have different values than under NetBSD. 763 */ 764#define BUS_DMA_STREAMING 0x100 /* hint: sequential, unidirectional */ 765#define BUS_DMA_READ 0x200 /* mapping is device -> memory only */ 766#define BUS_DMA_WRITE 0x400 /* mapping is memory -> device only */ 767#define BUS_DMA_COHERENT 0x800 /* hint: map memory DMA coherent */ 768 769#define BUS_DMA_NOCACHE BUS_DMA_BUS1 770/* Don't bother with alignment */ 771#define BUS_DMA_DVMA BUS_DMA_BUS2 772 773/* Forwards needed by prototypes below. */ 774struct mbuf; 775struct uio; 776 777typedef enum { 778 BUS_DMASYNC_PREREAD, 779 BUS_DMASYNC_POSTREAD, 780 BUS_DMASYNC_PREWRITE, 781 BUS_DMASYNC_POSTWRITE, 782} bus_dmasync_op_t; 783 784/* 785 * A function that returns 1 if the address cannot be accessed by 786 * a device and 0 if it can be. 787 */ 788typedef int bus_dma_filter_t(void *, bus_addr_t); 789 790typedef struct bus_dma_tag *bus_dma_tag_t; 791typedef struct bus_dmamap *bus_dmamap_t; 792 793struct bus_dma_segment { 794 bus_addr_t ds_addr; /* DVMA address */ 795 bus_size_t ds_len; /* length of transfer */ 796}; 797typedef struct bus_dma_segment bus_dma_segment_t; 798 799/* 800 * A function that processes a successfully loaded dma map or an error 801 * from a delayed load map. 802 */ 803typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int); 804 805/* 806 * bus_dma_tag_t 807 * 808 * A machine-dependent opaque type describing the implementation of 809 * DMA for a given bus. 810 */ 811struct bus_dma_tag { 812 void *cookie; /* cookie used in the guts */ 813 bus_dma_tag_t parent; 814 bus_size_t alignment; 815 bus_size_t boundary; 816 bus_addr_t lowaddr; 817 bus_addr_t highaddr; 818 bus_dma_filter_t *filter; 819 void *filterarg; 820 bus_size_t maxsize; 821 u_int nsegments; 822 bus_size_t maxsegsz; 823 int flags; 824 int ref_count; 825 int map_count; 826 827 /* 828 * DMA mapping methods. 829 */ 830 int (*dmamap_create)(bus_dma_tag_t, int, bus_dmamap_t *); 831 int (*dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 832 int (*dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 833 bus_size_t, bus_dmamap_callback_t *, void *, int); 834 void (*dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 835 void (*dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 836 bus_dmasync_op_t); 837 838 /* 839 * DMA memory utility functions. 840 */ 841 int (*dmamem_alloc)(bus_dma_tag_t, void **, int, bus_dmamap_t *); 842 void (*dmamem_free)(bus_dma_tag_t, void *, bus_dmamap_t); 843}; 844 845/* 846 * XXX: This is a kluge. It would be better to handle dma tags in a hierarchical 847 * way, and have a BUS_GET_DMA_TAG(); however, since this is not currently the 848 * case, save a root tag in the relevant bus attach function and use that. 849 * Keep the hierarchical structure, it might become needed in the future. 850 */ 851extern bus_dma_tag_t sparc64_root_dma_tag; 852 853int bus_dma_tag_create(bus_dma_tag_t, bus_size_t, bus_size_t, bus_addr_t, 854 bus_addr_t, bus_dma_filter_t *, void *, bus_size_t, int, bus_size_t, 855 int, bus_dma_tag_t *); 856 857int bus_dma_tag_destroy(bus_dma_tag_t); 858 859int sparc64_dmamem_alloc_map(bus_dma_tag_t dmat, bus_dmamap_t *mapp); 860void sparc64_dmamem_free_map(bus_dma_tag_t dmat, bus_dmamap_t map); 861 862#define bus_dmamap_create(t, f, p) \ 863 (*(t)->dmamap_create)((t), (f), (p)) 864#define bus_dmamap_destroy(t, p) \ 865 (*(t)->dmamap_destroy)((t), (p)) 866#define bus_dmamap_load(t, m, p, s, cb, cba, f) \ 867 (*(t)->dmamap_load)((t), (m), (p), (s), (cb), (cba), (f)) 868#define bus_dmamap_unload(t, p) \ 869 (*(t)->dmamap_unload)((t), (p)) 870#define bus_dmamap_sync(t, m, op) \ 871 (void)((t)->dmamap_sync ? \ 872 (*(t)->dmamap_sync)((t), (m), (op)) : (void)0) 873 874#define bus_dmamem_alloc(t, v, f, m) \ 875 (*(t)->dmamem_alloc)((t), (v), (f), (m)) 876#define bus_dmamem_free(t, v, m) \ 877 (*(t)->dmamem_free)((t), (v), (m)) 878 879struct bus_dmamap { 880 bus_dma_tag_t dmat; 881 void *buf; /* unmapped buffer pointer */ 882 bus_size_t buflen; /* unmapped buffer length */ 883 bus_addr_t start; /* start of mapped region */ 884 struct resource *res; /* associated resource */ 885}; 886 887#endif /* !_MACHINE_BUS_H_ */ 888