1292407Sbr/*- 2295972Sbr * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com> 3292407Sbr * All rights reserved. 4292407Sbr * 5292407Sbr * Portions of this software were developed by SRI International and the 6292407Sbr * University of Cambridge Computer Laboratory under DARPA/AFRL contract 7292407Sbr * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 8292407Sbr * 9292407Sbr * Portions of this software were developed by the University of Cambridge 10292407Sbr * Computer Laboratory as part of the CTSRD Project, with support from the 11292407Sbr * UK Higher Education Innovation Fund (HEIF). 12292407Sbr * 13292407Sbr * Redistribution and use in source and binary forms, with or without 14292407Sbr * modification, are permitted provided that the following conditions 15292407Sbr * are met: 16292407Sbr * 1. Redistributions of source code must retain the above copyright 17292407Sbr * notice, this list of conditions and the following disclaimer. 18292407Sbr * 2. Redistributions in binary form must reproduce the above copyright 19292407Sbr * notice, this list of conditions and the following disclaimer in the 20292407Sbr * documentation and/or other materials provided with the distribution. 21292407Sbr * 22292407Sbr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23292407Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24292407Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25292407Sbr * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26292407Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27292407Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28292407Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29292407Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30292407Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31292407Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32292407Sbr * SUCH DAMAGE. 33292407Sbr * 34292407Sbr * $FreeBSD$ 35292407Sbr */ 36292407Sbr 37292407Sbr#ifndef _MACHINE_INTR_MACHDEP_H_ 38292407Sbr#define _MACHINE_INTR_MACHDEP_H_ 39292407Sbr 40292407Sbrstruct trapframe; 41292407Sbr 42292407Sbrvoid riscv_init_interrupts(void); 43292407Sbrint riscv_teardown_intr(void *); 44292407Sbrint riscv_config_intr(u_int, enum intr_trigger, enum intr_polarity); 45292407Sbrint riscv_setup_intr(const char *, driver_filter_t *, driver_intr_t *, 46292407Sbr void *, int, int, void **); 47292407Sbrvoid riscv_cpu_intr(struct trapframe *); 48292407Sbr 49292407Sbrtypedef unsigned long * riscv_intrcnt_t; 50292407Sbr 51292407Sbrriscv_intrcnt_t riscv_intrcnt_create(const char *); 52292407Sbrvoid riscv_intrcnt_setname(riscv_intrcnt_t, const char *); 53292407Sbr 54295972Sbr#ifdef SMP 55295972Sbrvoid riscv_setup_ipihandler(driver_filter_t *); 56295972Sbrvoid riscv_unmask_ipi(void); 57295972Sbr#endif 58295972Sbr 59295972Sbrenum { 60295972Sbr IRQ_SOFTWARE, 61295972Sbr IRQ_TIMER, 62295972Sbr IRQ_HTIF, 63298636Sbr IRQ_COP, /* lowRISC only */ 64298636Sbr IRQ_UART, /* lowRISC only */ 65295972Sbr NIRQS 66295972Sbr}; 67295972Sbr 68292407Sbr#endif /* !_MACHINE_INTR_MACHDEP_H_ */ 69