swtch64.S revision 278429
1/* $FreeBSD: head/sys/powerpc/powerpc/swtch64.S 278429 2015-02-09 02:17:21Z nwhitehorn $ */ 2/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 3 4/*- 5 * Copyright (C) 2001 Benno Rice 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27*/ 28/*- 29 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 30 * Copyright (C) 1995, 1996 TooLs GmbH. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by TooLs GmbH. 44 * 4. The name of TooLs GmbH may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59#include "assym.s" 60#include "opt_sched.h" 61 62#include <sys/syscall.h> 63 64#include <machine/trap.h> 65#include <machine/param.h> 66#include <machine/asm.h> 67 68TOC_ENTRY(blocked_lock) 69 70/* 71 * void cpu_throw(struct thread *old, struct thread *new) 72 */ 73ENTRY(cpu_throw) 74 mr %r13, %r4 75 li %r14,0 /* Tell cpu_switchin not to release a thread */ 76 77 b cpu_switchin 78 79/* 80 * void cpu_switch(struct thread *old, 81 * struct thread *new, 82 * struct mutex *mtx); 83 * 84 * Switch to a new thread saving the current state in the old thread. 85 */ 86ENTRY(cpu_switch) 87 ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 88 std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 89 These can now be used for scratch */ 90 std %r14,PCB_CONTEXT+2*8(%r6) 91 std %r15,PCB_CONTEXT+3*8(%r6) 92 std %r16,PCB_CONTEXT+4*8(%r6) 93 std %r17,PCB_CONTEXT+5*8(%r6) 94 std %r18,PCB_CONTEXT+6*8(%r6) 95 std %r19,PCB_CONTEXT+7*8(%r6) 96 std %r20,PCB_CONTEXT+8*8(%r6) 97 std %r21,PCB_CONTEXT+9*8(%r6) 98 std %r22,PCB_CONTEXT+10*8(%r6) 99 std %r23,PCB_CONTEXT+11*8(%r6) 100 std %r24,PCB_CONTEXT+12*8(%r6) 101 std %r25,PCB_CONTEXT+13*8(%r6) 102 std %r26,PCB_CONTEXT+14*8(%r6) 103 std %r27,PCB_CONTEXT+15*8(%r6) 104 std %r28,PCB_CONTEXT+16*8(%r6) 105 std %r29,PCB_CONTEXT+17*8(%r6) 106 std %r30,PCB_CONTEXT+18*8(%r6) 107 std %r31,PCB_CONTEXT+19*8(%r6) 108 109 mfcr %r16 /* Save the condition register */ 110 std %r16,PCB_CR(%r6) 111 mflr %r16 /* Save the link register */ 112 std %r16,PCB_LR(%r6) 113 std %r1,PCB_SP(%r6) /* Save the stack pointer */ 114 std %r2,PCB_TOC(%r6) /* Save the TOC pointer */ 115 116 mr %r14,%r3 /* Copy the old thread ptr... */ 117 mr %r13,%r4 /* and the new thread ptr in curthread*/ 118 mr %r16,%r5 /* and the new lock */ 119 mr %r17,%r6 /* and the PCB */ 120 121 stdu %r1,-48(%r1) 122 123 lwz %r7,PCB_FLAGS(%r17) 124 /* Save FPU context if needed */ 125 andi. %r7, %r7, PCB_FPU 126 beq .L1 127 bl save_fpu 128 nop 129 130.L1: 131 mr %r3,%r14 /* restore old thread ptr */ 132 lwz %r7,PCB_FLAGS(%r17) 133 /* Save Altivec context if needed */ 134 andi. %r7, %r7, PCB_VEC 135 beq .L2 136 bl save_vec 137 nop 138 139.L2: 140 mr %r3,%r14 /* restore old thread ptr */ 141 bl pmap_deactivate /* Deactivate the current pmap */ 142 nop 143 144 sync /* Make sure all of that finished */ 145 146cpu_switchin: 147#if defined(SMP) && defined(SCHED_ULE) 148 /* Wait for the new thread to become unblocked */ 149 ld %r6,TOC_REF(blocked_lock)(%r2) 150blocked_loop: 151 ld %r7,TD_LOCK(%r13) 152 cmpd %r6,%r7 153 beq- blocked_loop 154 isync 155#endif 156 157 ld %r17,TD_PCB(%r13) /* Get new PCB */ 158 ld %r1,PCB_SP(%r17) /* Load the stack pointer */ 159 160 /* Release old thread now that we have a stack pointer set up */ 161 cmpdi %r14,0 162 beq- 1f 163 std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 164 1651: mfsprg %r7,0 /* Get the pcpu pointer */ 166 std %r13,PC_CURTHREAD(%r7) /* Store new current thread */ 167 ld %r17,TD_PCB(%r13) /* Store new current PCB */ 168 std %r17,PC_CURPCB(%r7) 169 170 mr %r3,%r13 /* Get new thread ptr */ 171 bl pmap_activate /* Activate the new address space */ 172 nop 173 174 lwz %r6, PCB_FLAGS(%r17) 175 /* Restore FPU context if needed */ 176 andi. %r6, %r6, PCB_FPU 177 beq .L3 178 mr %r3,%r13 /* Pass curthread to enable_fpu */ 179 bl enable_fpu 180 nop 181 182.L3: 183 lwz %r6, PCB_FLAGS(%r17) 184 /* Restore Altivec context if needed */ 185 andi. %r6, %r6, PCB_VEC 186 beq .L4 187 mr %r3,%r13 /* Pass curthread to enable_vec */ 188 bl enable_vec 189 nop 190 191 /* thread to restore is in r3 */ 192.L4: 193 addi %r1,%r1,48 194 mr %r3,%r17 /* Recover PCB ptr */ 195 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ 196 ld %r14,PCB_CONTEXT+2*8(%r3) 197 ld %r15,PCB_CONTEXT+3*8(%r3) 198 ld %r16,PCB_CONTEXT+4*8(%r3) 199 ld %r17,PCB_CONTEXT+5*8(%r3) 200 ld %r18,PCB_CONTEXT+6*8(%r3) 201 ld %r19,PCB_CONTEXT+7*8(%r3) 202 ld %r20,PCB_CONTEXT+8*8(%r3) 203 ld %r21,PCB_CONTEXT+9*8(%r3) 204 ld %r22,PCB_CONTEXT+10*8(%r3) 205 ld %r23,PCB_CONTEXT+11*8(%r3) 206 ld %r24,PCB_CONTEXT+12*8(%r3) 207 ld %r25,PCB_CONTEXT+13*8(%r3) 208 ld %r26,PCB_CONTEXT+14*8(%r3) 209 ld %r27,PCB_CONTEXT+15*8(%r3) 210 ld %r28,PCB_CONTEXT+16*8(%r3) 211 ld %r29,PCB_CONTEXT+17*8(%r3) 212 ld %r30,PCB_CONTEXT+18*8(%r3) 213 ld %r31,PCB_CONTEXT+19*8(%r3) 214 ld %r5,PCB_CR(%r3) /* Load the condition register */ 215 mtcr %r5 216 ld %r5,PCB_LR(%r3) /* Load the link register */ 217 mtlr %r5 218 ld %r1,PCB_SP(%r3) /* Load the stack pointer */ 219 ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ 220 221 lis %r5,USER_ADDR@highesta /* Load the copyin/out segment reg */ 222 ori %r5,%r5,USER_ADDR@highera 223 sldi %r5,%r5,32 224 oris %r5,%r5,USER_ADDR@ha 225 isync 226 slbie %r5 227 lis %r6,USER_SLB_SLBE@highesta 228 ori %r6,%r6,USER_SLB_SLBE@highera 229 sldi %r6,%r6,32 230 oris %r6,%r6,USER_SLB_SLBE@ha 231 ori %r6,%r6,USER_SLB_SLBE@l 232 ld %r5,PCB_AIM_USR_VSID(%r3) 233 slbmte %r5,%r6 234 isync 235 236 /* 237 * Perform a dummy stdcx. to clear any reservations we may have 238 * inherited from the previous thread. It doesn't matter if the 239 * stdcx succeeds or not. pcb_context[0] can be clobbered. 240 */ 241 stdcx. %r1, 0, %r3 242 blr 243 244/* 245 * savectx(pcb) 246 * Update pcb, saving current processor state 247 */ 248ENTRY(savectx) 249 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ 250 std %r13,PCB_CONTEXT+1*8(%r3) 251 std %r14,PCB_CONTEXT+2*8(%r3) 252 std %r15,PCB_CONTEXT+3*8(%r3) 253 std %r16,PCB_CONTEXT+4*8(%r3) 254 std %r17,PCB_CONTEXT+5*8(%r3) 255 std %r18,PCB_CONTEXT+6*8(%r3) 256 std %r19,PCB_CONTEXT+7*8(%r3) 257 std %r20,PCB_CONTEXT+8*8(%r3) 258 std %r21,PCB_CONTEXT+9*8(%r3) 259 std %r22,PCB_CONTEXT+10*8(%r3) 260 std %r23,PCB_CONTEXT+11*8(%r3) 261 std %r24,PCB_CONTEXT+12*8(%r3) 262 std %r25,PCB_CONTEXT+13*8(%r3) 263 std %r26,PCB_CONTEXT+14*8(%r3) 264 std %r27,PCB_CONTEXT+15*8(%r3) 265 std %r28,PCB_CONTEXT+16*8(%r3) 266 std %r29,PCB_CONTEXT+17*8(%r3) 267 std %r30,PCB_CONTEXT+18*8(%r3) 268 std %r31,PCB_CONTEXT+19*8(%r3) 269 270 mfcr %r4 /* Save the condition register */ 271 std %r4,PCB_CR(%r3) 272 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ 273 blr 274 275/* 276 * fork_trampoline() 277 * Set up the return from cpu_fork() 278 */ 279 280ENTRY_NOPROF(fork_trampoline) 281 ld %r3,CF_FUNC(%r1) 282 ld %r4,CF_ARG0(%r1) 283 ld %r5,CF_ARG1(%r1) 284 285 stdu %r1,-48(%r1) 286 bl fork_exit 287 nop 288 addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of 289 trapframe to simulate FRAME_SETUP 290 does when allocating space for 291 a frame pointer/saved LR */ 292 b trapexit 293 nop 294