swtch64.S revision 209975
1/* $FreeBSD: head/sys/powerpc/aim/swtch64.S 209975 2010-07-13 05:32:19Z nwhitehorn $ */ 2/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 3 4/*- 5 * Copyright (C) 2001 Benno Rice 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27*/ 28/*- 29 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 30 * Copyright (C) 1995, 1996 TooLs GmbH. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by TooLs GmbH. 44 * 4. The name of TooLs GmbH may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59#include "assym.s" 60#include "opt_sched.h" 61 62#include <sys/syscall.h> 63 64#include <machine/trap.h> 65#include <machine/param.h> 66#include <machine/asm.h> 67 68/* 69 * void cpu_throw(struct thread *old, struct thread *new) 70 */ 71ENTRY(cpu_throw) 72 mr %r15, %r4 73 b cpu_switchin 74 75/* 76 * void cpu_switch(struct thread *old, 77 * struct thread *new, 78 * struct mutex *mtx); 79 * 80 * Switch to a new thread saving the current state in the old thread. 81 */ 82ENTRY(cpu_switch) 83 ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 84 std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 85 These can now be used for scratch */ 86 std %r13,PCB_CONTEXT+1*8(%r6) 87 std %r14,PCB_CONTEXT+2*8(%r6) 88 std %r15,PCB_CONTEXT+3*8(%r6) 89 std %r16,PCB_CONTEXT+4*8(%r6) 90 std %r17,PCB_CONTEXT+5*8(%r6) 91 std %r18,PCB_CONTEXT+6*8(%r6) 92 std %r19,PCB_CONTEXT+7*8(%r6) 93 std %r20,PCB_CONTEXT+8*8(%r6) 94 std %r21,PCB_CONTEXT+9*8(%r6) 95 std %r22,PCB_CONTEXT+10*8(%r6) 96 std %r23,PCB_CONTEXT+11*8(%r6) 97 std %r24,PCB_CONTEXT+12*8(%r6) 98 std %r25,PCB_CONTEXT+13*8(%r6) 99 std %r26,PCB_CONTEXT+14*8(%r6) 100 std %r27,PCB_CONTEXT+15*8(%r6) 101 std %r28,PCB_CONTEXT+16*8(%r6) 102 std %r29,PCB_CONTEXT+17*8(%r6) 103 std %r30,PCB_CONTEXT+18*8(%r6) 104 std %r31,PCB_CONTEXT+19*8(%r6) 105 106 mfcr %r16 /* Save the condition register */ 107 std %r16,PCB_CR(%r6) 108 mflr %r16 /* Save the link register */ 109 std %r16,PCB_LR(%r6) 110 std %r1,PCB_SP(%r6) /* Save the stack pointer */ 111 std %r2,PCB_TOC(%r6) /* Save the TOC pointer */ 112 113 li %r14,0 /* Save USER_SR for copyin/out */ 114 li %r15,0 115 li %r16,USER_SR 116 slbmfee %r14, %r16 117 slbmfev %r15, %r16 118 isync 119 std %r14,PCB_AIM_USR_ESID(%r6) 120 std %r15,PCB_AIM_USR_VSID(%r6) 121 122 mr %r14,%r3 /* Copy the old thread ptr... */ 123 mr %r15,%r4 /* and the new thread ptr in scratch */ 124 mr %r16,%r5 /* and the new lock */ 125 mr %r17,%r6 /* and the PCB */ 126 127 stdu %r1,-48(%r1) 128 129 lwz %r7,PCB_FLAGS(%r17) 130 /* Save FPU context if needed */ 131 andi. %r7, %r7, PCB_FPU 132 beq .L1 133 bl .save_fpu 134 nop 135 136.L1: 137 mr %r3,%r14 /* restore old thread ptr */ 138 lwz %r7,PCB_FLAGS(%r17) 139 /* Save Altivec context if needed */ 140 andi. %r7, %r7, PCB_VEC 141 beq .L2 142 bl .save_vec 143 nop 144 145.L2: 146 mr %r3,%r14 /* restore old thread ptr */ 147 bl .pmap_deactivate /* Deactivate the current pmap */ 148 nop 149 150 addi %r1,%r1,48 151 152 std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 153 154cpu_switchin: 155#if defined(SMP) && defined(SCHED_ULE) 156 /* Wait for the new thread to become unblocked */ 157 lis %r6,blocked_lock@ha 158 addi %r6,%r6,blocked_lock@l 159blocked_loop: 160 ld %r7,TD_LOCK(%r15) 161 cmpd %r6,%r7 162 beq blocked_loop 163#endif 164 165 mfsprg %r7,0 /* Get the pcpu pointer */ 166 std %r15,PC_CURTHREAD(%r7) /* Store new current thread */ 167 ld %r17,TD_PCB(%r15) /* Store new current PCB */ 168 std %r17,PC_CURPCB(%r7) 169 170 stdu %r1,-48(%r1) 171 172 mr %r3,%r15 /* Get new thread ptr */ 173 bl .pmap_activate /* Activate the new address space */ 174 nop 175 176 lwz %r6, PCB_FLAGS(%r17) 177 /* Restore FPU context if needed */ 178 andi. %r6, %r6, PCB_FPU 179 beq .L3 180 mr %r3,%r15 /* Pass curthread to enable_fpu */ 181 bl .enable_fpu 182 nop 183 184.L3: 185 lwz %r6, PCB_FLAGS(%r17) 186 /* Restore Altivec context if needed */ 187 andi. %r6, %r6, PCB_VEC 188 beq .L4 189 mr %r3,%r15 /* Pass curthread to enable_vec */ 190 bl .enable_vec 191 nop 192 193 /* thread to restore is in r3 */ 194.L4: 195 addi %r1,%r1,48 196 mr %r3,%r17 /* Recover PCB ptr */ 197 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ 198 ld %r13,PCB_CONTEXT+1*8(%r3) 199 ld %r14,PCB_CONTEXT+2*8(%r3) 200 ld %r15,PCB_CONTEXT+3*8(%r3) 201 ld %r16,PCB_CONTEXT+4*8(%r3) 202 ld %r17,PCB_CONTEXT+5*8(%r3) 203 ld %r18,PCB_CONTEXT+6*8(%r3) 204 ld %r19,PCB_CONTEXT+7*8(%r3) 205 ld %r20,PCB_CONTEXT+8*8(%r3) 206 ld %r21,PCB_CONTEXT+9*8(%r3) 207 ld %r22,PCB_CONTEXT+10*8(%r3) 208 ld %r23,PCB_CONTEXT+11*8(%r3) 209 ld %r24,PCB_CONTEXT+12*8(%r3) 210 ld %r25,PCB_CONTEXT+13*8(%r3) 211 ld %r26,PCB_CONTEXT+14*8(%r3) 212 ld %r27,PCB_CONTEXT+15*8(%r3) 213 ld %r28,PCB_CONTEXT+16*8(%r3) 214 ld %r29,PCB_CONTEXT+17*8(%r3) 215 ld %r30,PCB_CONTEXT+18*8(%r3) 216 ld %r31,PCB_CONTEXT+19*8(%r3) 217 ld %r5,PCB_CR(%r3) /* Load the condition register */ 218 mtcr %r5 219 ld %r5,PCB_LR(%r3) /* Load the link register */ 220 mtlr %r5 221 ld %r1,PCB_SP(%r3) /* Load the stack pointer */ 222 ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ 223 224 lis %r5,USER_ADDR@highesta /* Load the USER_SR segment reg */ 225 ori %r5,%r5,USER_ADDR@highera 226 sldi %r5,%r5,32 227 oris %r5,%r5,USER_ADDR@ha 228 slbie %r5 229 ld %r5,PCB_AIM_USR_VSID(%r3) 230 ld %r6,PCB_AIM_USR_ESID(%r3) 231 ori %r6,%r6,USER_SR 232 slbmte %r5,%r6 233 234 isync 235 /* 236 * Perform a dummy stdcx. to clear any reservations we may have 237 * inherited from the previous thread. It doesn't matter if the 238 * stdcx succeeds or not. pcb_context[0] can be clobbered. 239 */ 240 stdcx. %r1, 0, %r3 241 blr 242 243/* 244 * savectx(pcb) 245 * Update pcb, saving current processor state 246 */ 247ENTRY(savectx) 248 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ 249 std %r13,PCB_CONTEXT+1*8(%r3) 250 std %r14,PCB_CONTEXT+2*8(%r3) 251 std %r15,PCB_CONTEXT+3*8(%r3) 252 std %r16,PCB_CONTEXT+4*8(%r3) 253 std %r17,PCB_CONTEXT+5*8(%r3) 254 std %r18,PCB_CONTEXT+6*8(%r3) 255 std %r19,PCB_CONTEXT+7*8(%r3) 256 std %r20,PCB_CONTEXT+8*8(%r3) 257 std %r21,PCB_CONTEXT+9*8(%r3) 258 std %r22,PCB_CONTEXT+10*8(%r3) 259 std %r23,PCB_CONTEXT+11*8(%r3) 260 std %r24,PCB_CONTEXT+12*8(%r3) 261 std %r25,PCB_CONTEXT+13*8(%r3) 262 std %r26,PCB_CONTEXT+14*8(%r3) 263 std %r27,PCB_CONTEXT+15*8(%r3) 264 std %r28,PCB_CONTEXT+16*8(%r3) 265 std %r29,PCB_CONTEXT+17*8(%r3) 266 std %r30,PCB_CONTEXT+18*8(%r3) 267 std %r31,PCB_CONTEXT+19*8(%r3) 268 269 mfcr %r4 /* Save the condition register */ 270 std %r4,PCB_CR(%r3) 271 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ 272 blr 273 274/* 275 * fork_trampoline() 276 * Set up the return from cpu_fork() 277 */ 278ENTRY(fork_trampoline) 279 ld %r3,CF_FUNC(%r1) 280 ld %r4,CF_ARG0(%r1) 281 ld %r5,CF_ARG1(%r1) 282 283 stdu %r1,-48(%r1) 284 bl .fork_exit 285 nop 286 addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of 287 trapframe to simulate FRAME_SETUP 288 does when allocating space for 289 a frame pointer/saved LR */ 290 b trapexit 291 nop 292