mp_machdep.c revision 222531
116598Smchung/*-
216598Smchung * Copyright (c) 2008 Marcel Moolenaar
316598Smchung * All rights reserved.
416598Smchung *
516598Smchung * Redistribution and use in source and binary forms, with or without
616598Smchung * modification, are permitted provided that the following conditions
716598Smchung * are met:
816598Smchung *
916598Smchung * 1. Redistributions of source code must retain the above copyright
1016598Smchung *    notice, this list of conditions and the following disclaimer.
1116598Smchung * 2. Redistributions in binary form must reproduce the above copyright
1216598Smchung *    notice, this list of conditions and the following disclaimer in the
1316598Smchung *    documentation and/or other materials provided with the distribution.
1416598Smchung *
1516598Smchung * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1616598Smchung * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1716598Smchung * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1816598Smchung * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1916598Smchung * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2016598Smchung * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2116598Smchung * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2216598Smchung * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2316598Smchung * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2416598Smchung * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2516598Smchung */
2616598Smchung
2716598Smchung#include <sys/cdefs.h>
2816598Smchung__FBSDID("$FreeBSD: head/sys/powerpc/powerpc/mp_machdep.c 222531 2011-05-31 15:11:43Z nwhitehorn $");
2916598Smchung
3016598Smchung#include <sys/param.h>
3116598Smchung#include <sys/systm.h>
3216598Smchung#include <sys/kernel.h>
3316598Smchung#include <sys/ktr.h>
3416598Smchung#include <sys/bus.h>
3517549Salanb#include <sys/lock.h>
3616598Smchung#include <sys/mutex.h>
3716598Smchung#include <sys/pcpu.h>
3816937Salanb#include <sys/proc.h>
3916937Salanb#include <sys/sched.h>
4016937Salanb#include <sys/smp.h>
4116937Salanb
4216937Salanb#include <vm/vm.h>
4316937Salanb#include <vm/vm_param.h>
4416937Salanb#include <vm/pmap.h>
4516937Salanb#include <vm/vm_map.h>
4616598Smchung#include <vm/vm_extern.h>
4716937Salanb#include <vm/vm_kern.h>
4816937Salanb
4916937Salanb#include <machine/bus.h>
5016937Salanb#include <machine/cpu.h>
5116937Salanb#include <machine/intr_machdep.h>
5216937Salanb#include <machine/pcb.h>
5316937Salanb#include <machine/platform.h>
5416937Salanb#include <machine/md_var.h>
5516937Salanb#include <machine/smp.h>
5616937Salanb
5716937Salanb#include "pic_if.h"
5816937Salanb
5916937Salanbextern struct pcpu __pcpu[MAXCPU];
6016937Salanb
6116937Salanbvolatile static int ap_awake;
6216937Salanbvolatile static u_int ap_letgo;
6316937Salanbvolatile static u_quad_t ap_timebase;
6416937Salanbstatic u_int ipi_msg_cnt[32];
6516937Salanbstatic struct mtx ap_boot_mtx;
6617162Salanbstruct pcb stoppcbs[MAXCPU];
6716937Salanb
6816937Salanbvoid
6916937Salanbmachdep_ap_bootstrap(void)
7017549Salanb{
7116937Salanb	/* Set up important bits on the CPU (HID registers, etc.) */
7216937Salanb	cpudep_ap_setup();
7316937Salanb
7416937Salanb	/* Set PIR */
7516937Salanb	PCPU_SET(pir, mfspr(SPR_PIR));
7616937Salanb	PCPU_SET(awake, 1);
7716598Smchung	__asm __volatile("msync; isync");
7816598Smchung
7916598Smchung	while (ap_letgo == 0)
8016598Smchung		;
8116598Smchung
8216598Smchung	/* Initialize DEC and TB, sync with the BSP values */
8316598Smchung#ifdef __powerpc64__
8416598Smchung	/* Writing to the time base register is hypervisor-privileged */
8516598Smchung	if (mfmsr() & PSL_HV)
8616598Smchung		mttb(ap_timebase);
8716598Smchung#else
8817549Salanb	mttb(ap_timebase);
8917549Salanb#endif
9016937Salanb	decr_ap_init();
9116598Smchung
9216598Smchung	/* Serialize console output and AP count increment */
9316598Smchung	mtx_lock_spin(&ap_boot_mtx);
9416598Smchung	ap_awake++;
9516598Smchung	printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid));
9616598Smchung	mtx_unlock_spin(&ap_boot_mtx);
9716598Smchung
9816598Smchung	/* Initialize curthread */
9916598Smchung	PCPU_SET(curthread, PCPU_GET(idlethread));
10017000Salanb	PCPU_SET(curpcb, curthread->td_pcb);
10116598Smchung
10216598Smchung	/* Start per-CPU event timers. */
10316598Smchung	cpu_initclocks_ap();
10416598Smchung
10516598Smchung	/* Announce ourselves awake, and enter the scheduler */
10616598Smchung	sched_throw(NULL);
10716598Smchung}
10816598Smchung
10916598Smchungvoid
11016598Smchungcpu_mp_setmaxid(void)
11117549Salanb{
11216598Smchung	struct cpuref cpuref;
11316598Smchung	int error;
11416598Smchung
11516598Smchung	mp_ncpus = 0;
11616937Salanb	error = platform_smp_first_cpu(&cpuref);
11716598Smchung	while (!error) {
11816598Smchung		mp_ncpus++;
11916598Smchung		error = platform_smp_next_cpu(&cpuref);
12016598Smchung	}
12116598Smchung	/* Sanity. */
12217549Salanb	if (mp_ncpus == 0)
12317549Salanb		mp_ncpus = 1;
12417549Salanb
12516598Smchung	/*
12616598Smchung	 * Set the largest cpuid we're going to use. This is necessary
12716598Smchung	 * for VM initialization.
12816598Smchung	 */
12916598Smchung	mp_maxid = min(mp_ncpus, MAXCPU) - 1;
13016598Smchung}
13116598Smchung
13216598Smchungint
133cpu_mp_probe(void)
134{
135
136	/*
137	 * We're not going to enable SMP if there's only 1 processor.
138	 */
139	return (mp_ncpus > 1);
140}
141
142void
143cpu_mp_start(void)
144{
145	struct cpuref bsp, cpu;
146	struct pcpu *pc;
147	int error;
148
149	error = platform_smp_get_bsp(&bsp);
150	KASSERT(error == 0, ("Don't know BSP"));
151	KASSERT(bsp.cr_cpuid == 0, ("%s: cpuid != 0", __func__));
152
153	error = platform_smp_first_cpu(&cpu);
154	while (!error) {
155		if (cpu.cr_cpuid >= MAXCPU) {
156			printf("SMP: cpu%d: skipped -- ID out of range\n",
157			    cpu.cr_cpuid);
158			goto next;
159		}
160		if (all_cpus & (1 << cpu.cr_cpuid)) {
161			printf("SMP: cpu%d: skipped - duplicate ID\n",
162			    cpu.cr_cpuid);
163			goto next;
164		}
165		if (cpu.cr_cpuid != bsp.cr_cpuid) {
166			void *dpcpu;
167
168			pc = &__pcpu[cpu.cr_cpuid];
169			dpcpu = (void *)kmem_alloc(kernel_map, DPCPU_SIZE);
170			pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc));
171			dpcpu_init(dpcpu, cpu.cr_cpuid);
172		} else {
173			pc = pcpup;
174			pc->pc_cpuid = bsp.cr_cpuid;
175			pc->pc_bsp = 1;
176		}
177		pc->pc_cpumask = 1 << pc->pc_cpuid;
178		pc->pc_hwref = cpu.cr_hwref;
179		all_cpus |= pc->pc_cpumask;
180next:
181		error = platform_smp_next_cpu(&cpu);
182	}
183}
184
185void
186cpu_mp_announce(void)
187{
188	struct pcpu *pc;
189	int i;
190
191	for (i = 0; i <= mp_maxid; i++) {
192		pc = pcpu_find(i);
193		if (pc == NULL)
194			continue;
195		printf("cpu%d: dev=%x", i, (int)pc->pc_hwref);
196		if (pc->pc_bsp)
197			printf(" (BSP)");
198		printf("\n");
199	}
200}
201
202static void
203cpu_mp_unleash(void *dummy)
204{
205	struct pcpu *pc;
206	int cpus, timeout;
207
208	if (mp_ncpus <= 1)
209		return;
210
211	mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
212
213	cpus = 0;
214	smp_cpus = 0;
215	STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
216		cpus++;
217		pc->pc_other_cpus = all_cpus & ~pc->pc_cpumask;
218		if (!pc->pc_bsp) {
219			if (bootverbose)
220				printf("Waking up CPU %d (dev=%x)\n",
221				    pc->pc_cpuid, (int)pc->pc_hwref);
222
223			platform_smp_start_cpu(pc);
224
225			timeout = 2000;	/* wait 2sec for the AP */
226			while (!pc->pc_awake && --timeout > 0)
227				DELAY(1000);
228
229		} else {
230			PCPU_SET(pir, mfspr(SPR_PIR));
231			pc->pc_awake = 1;
232		}
233		if (pc->pc_awake) {
234			if (bootverbose)
235				printf("Adding CPU %d, pir=%x, awake=%x\n",
236				    pc->pc_cpuid, pc->pc_pir, pc->pc_awake);
237			smp_cpus++;
238		} else
239			stopped_cpus |= (1 << pc->pc_cpuid);
240	}
241
242	ap_awake = 1;
243
244	/* Provide our current DEC and TB values for APs */
245	ap_timebase = mftb() + 10;
246	__asm __volatile("msync; isync");
247
248	/* Let APs continue */
249	atomic_store_rel_int(&ap_letgo, 1);
250
251#ifdef __powerpc64__
252	/* Writing to the time base register is hypervisor-privileged */
253	if (mfmsr() & PSL_HV)
254		mttb(ap_timebase);
255#else
256	mttb(ap_timebase);
257#endif
258
259	while (ap_awake < smp_cpus)
260		;
261
262	if (smp_cpus != cpus || cpus != mp_ncpus) {
263		printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
264		    mp_ncpus, cpus, smp_cpus);
265	}
266
267	/* Let the APs get into the scheduler */
268	DELAY(10000);
269
270	smp_active = 1;
271	smp_started = 1;
272}
273
274SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
275
276int
277powerpc_ipi_handler(void *arg)
278{
279	cpumask_t self;
280	uint32_t ipimask;
281	int msg;
282
283	CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr());
284
285	ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask));
286	if (ipimask == 0)
287		return (FILTER_STRAY);
288	while ((msg = ffs(ipimask) - 1) != -1) {
289		ipimask &= ~(1u << msg);
290		ipi_msg_cnt[msg]++;
291		switch (msg) {
292		case IPI_AST:
293			CTR1(KTR_SMP, "%s: IPI_AST", __func__);
294			break;
295		case IPI_PREEMPT:
296			CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
297			sched_preempt(curthread);
298			break;
299		case IPI_RENDEZVOUS:
300			CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__);
301			smp_rendezvous_action();
302			break;
303		case IPI_STOP:
304
305			/*
306			 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
307			 * necessary to add such case in the switch.
308			 */
309			CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)",
310			    __func__);
311			savectx(&stoppcbs[PCPU_GET(cpuid)]);
312			self = PCPU_GET(cpumask);
313			savectx(PCPU_GET(curpcb));
314			atomic_set_int(&stopped_cpus, self);
315			while ((started_cpus & self) == 0)
316				cpu_spinwait();
317			atomic_clear_int(&started_cpus, self);
318			atomic_clear_int(&stopped_cpus, self);
319			CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__);
320			break;
321		case IPI_HARDCLOCK:
322			CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
323			hardclockintr();
324			break;
325		}
326	}
327
328	return (FILTER_HANDLED);
329}
330
331static void
332ipi_send(struct pcpu *pc, int ipi)
333{
334
335	CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__,
336	    pc, pc->pc_cpuid, ipi);
337
338	atomic_set_32(&pc->pc_ipimask, (1 << ipi));
339	PIC_IPI(root_pic, pc->pc_cpuid);
340
341	CTR1(KTR_SMP, "%s: sent", __func__);
342}
343
344/* Send an IPI to a set of cpus. */
345void
346ipi_selected(cpumask_t cpus, int ipi)
347{
348	struct pcpu *pc;
349
350	STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
351		if (cpus & pc->pc_cpumask)
352			ipi_send(pc, ipi);
353	}
354}
355
356/* Send an IPI to a specific CPU. */
357void
358ipi_cpu(int cpu, u_int ipi)
359{
360
361	ipi_send(cpuid_to_pcpu[cpu], ipi);
362}
363
364/* Send an IPI to all CPUs EXCEPT myself. */
365void
366ipi_all_but_self(int ipi)
367{
368	struct pcpu *pc;
369
370	STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
371		if (pc != pcpup)
372			ipi_send(pc, ipi);
373	}
374}
375