165557Sjasone/*- 265557Sjasone * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org> 381763Sobrien * Copyright (c) Peter Wemm <peter@netplex.com.au> 465557Sjasone * All rights reserved. 565557Sjasone * 665557Sjasone * Redistribution and use in source and binary forms, with or without 765557Sjasone * modification, are permitted provided that the following conditions 865557Sjasone * are met: 965557Sjasone * 1. Redistributions of source code must retain the above copyright 1065557Sjasone * notice, this list of conditions and the following disclaimer. 1165557Sjasone * 2. Redistributions in binary form must reproduce the above copyright 1265557Sjasone * notice, this list of conditions and the following disclaimer in the 1365557Sjasone * documentation and/or other materials provided with the distribution. 1465557Sjasone * 1565557Sjasone * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1665557Sjasone * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1765557Sjasone * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1865557Sjasone * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1965557Sjasone * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2065557Sjasone * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2165557Sjasone * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2265557Sjasone * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2365557Sjasone * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2465557Sjasone * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2565557Sjasone * SUCH DAMAGE. 2665557Sjasone * 2765557Sjasone * $FreeBSD$ 2865557Sjasone */ 2965557Sjasone 3087702Sjhb#ifndef _MACHINE_PCPU_H_ 3187702Sjhb#define _MACHINE_PCPU_H_ 3265557Sjasone 3387702Sjhb#include <machine/cpufunc.h> 34209975Snwhitehorn#include <machine/slb.h> 35192532Sraj#include <machine/tlb.h> 3665557Sjasone 3795719Sbennostruct pmap; 38286296Sjahstruct pvo_entry; 39209975Snwhitehorn#define CPUSAVE_LEN 9 4095719Sbenno 41176742Sraj#define PCPU_MD_COMMON_FIELDS \ 4287702Sjhb int pc_inside_intr; \ 4396499Sbenno struct pmap *pc_curpmap; /* current pmap */ \ 44176742Sraj struct thread *pc_fputhread; /* current fpu user */ \ 45188860Snwhitehorn struct thread *pc_vecthread; /* current vec user */ \ 46178628Smarcel uintptr_t pc_hwref; \ 47178628Smarcel uint32_t pc_pir; \ 48198378Snwhitehorn int pc_bsp; \ 49198378Snwhitehorn volatile int pc_awake; \ 50178628Smarcel uint32_t pc_ipimask; \ 51125437Sgrehan register_t pc_tempsave[CPUSAVE_LEN]; \ 52125437Sgrehan register_t pc_disisave[CPUSAVE_LEN]; \ 53259284Sjhibbits register_t pc_dbsave[CPUSAVE_LEN]; \ 54259284Sjhibbits void *pc_restore; 5565557Sjasone 56249265Sglebius#define PCPU_MD_AIM32_FIELDS \ 57286296Sjah vm_offset_t pc_qmap_addr; \ 58286296Sjah struct pvo_entry *pc_qmap_pvo; \ 59286296Sjah struct mtx pc_qmap_lock; \ 60249265Sglebius /* char __pad[0] */ 61176742Sraj 62209975Snwhitehorn#define PCPU_MD_AIM64_FIELDS \ 63209975Snwhitehorn struct slb pc_slb[64]; \ 64230123Snwhitehorn struct slb **pc_userslb; \ 65230123Snwhitehorn register_t pc_slbsave[18]; \ 66249265Sglebius uint8_t pc_slbstack[1024]; \ 67286296Sjah vm_offset_t pc_qmap_addr; \ 68286296Sjah struct pvo_entry *pc_qmap_pvo; \ 69286296Sjah struct mtx pc_qmap_lock; \ 70286296Sjah char __pad[1121 - sizeof(struct mtx)] 71209975Snwhitehorn 72209975Snwhitehorn#ifdef __powerpc64__ 73209975Snwhitehorn#define PCPU_MD_AIM_FIELDS PCPU_MD_AIM64_FIELDS 74209975Snwhitehorn#else 75209975Snwhitehorn#define PCPU_MD_AIM_FIELDS PCPU_MD_AIM32_FIELDS 76209975Snwhitehorn#endif 77209975Snwhitehorn 78176742Sraj#define BOOKE_CRITSAVE_LEN (CPUSAVE_LEN + 2) 79176742Sraj#define BOOKE_TLB_MAXNEST 3 80176742Sraj#define BOOKE_TLB_SAVELEN 16 81176742Sraj#define BOOKE_TLBSAVE_LEN (BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST) 82176742Sraj 83176742Sraj#define PCPU_MD_BOOKE_FIELDS \ 84176742Sraj register_t pc_booke_critsave[BOOKE_CRITSAVE_LEN]; \ 85176742Sraj register_t pc_booke_mchksave[CPUSAVE_LEN]; \ 86176742Sraj register_t pc_booke_tlbsave[BOOKE_TLBSAVE_LEN]; \ 87187149Sraj register_t pc_booke_tlb_level; \ 88286296Sjah vm_offset_t pc_qmap_addr; \ 89192532Sraj uint32_t *pc_booke_tlb_lock; \ 90249265Sglebius int pc_tid_next; \ 91286296Sjah char __pad[165] 92176742Sraj 93125437Sgrehan/* Definitions for register offsets within the exception tmp save areas */ 94209975Snwhitehorn#define CPUSAVE_R27 0 /* where r27 gets saved */ 95209975Snwhitehorn#define CPUSAVE_R28 1 /* where r28 gets saved */ 96209975Snwhitehorn#define CPUSAVE_R29 2 /* where r29 gets saved */ 97209975Snwhitehorn#define CPUSAVE_R30 3 /* where r30 gets saved */ 98209975Snwhitehorn#define CPUSAVE_R31 4 /* where r31 gets saved */ 99209975Snwhitehorn#define CPUSAVE_AIM_DAR 5 /* where SPR_DAR gets saved */ 100209975Snwhitehorn#define CPUSAVE_AIM_DSISR 6 /* where SPR_DSISR gets saved */ 101209975Snwhitehorn#define CPUSAVE_BOOKE_DEAR 5 /* where SPR_DEAR gets saved */ 102209975Snwhitehorn#define CPUSAVE_BOOKE_ESR 6 /* where SPR_ESR gets saved */ 103209975Snwhitehorn#define CPUSAVE_SRR0 7 /* where SRR0 gets saved */ 104209975Snwhitehorn#define CPUSAVE_SRR1 8 /* where SRR1 gets saved */ 105125437Sgrehan 106176742Sraj/* Book-E TLBSAVE is more elaborate */ 107176742Sraj#define TLBSAVE_BOOKE_LR 0 108176742Sraj#define TLBSAVE_BOOKE_CR 1 109176742Sraj#define TLBSAVE_BOOKE_SRR0 2 110176742Sraj#define TLBSAVE_BOOKE_SRR1 3 111176742Sraj#define TLBSAVE_BOOKE_R20 4 112176742Sraj#define TLBSAVE_BOOKE_R21 5 113176742Sraj#define TLBSAVE_BOOKE_R22 6 114176742Sraj#define TLBSAVE_BOOKE_R23 7 115176742Sraj#define TLBSAVE_BOOKE_R24 8 116176742Sraj#define TLBSAVE_BOOKE_R25 9 117176742Sraj#define TLBSAVE_BOOKE_R26 10 118176742Sraj#define TLBSAVE_BOOKE_R27 11 119176742Sraj#define TLBSAVE_BOOKE_R28 12 120176742Sraj#define TLBSAVE_BOOKE_R29 13 121176742Sraj#define TLBSAVE_BOOKE_R30 14 122176742Sraj#define TLBSAVE_BOOKE_R31 15 123176742Sraj 124176742Sraj#ifdef AIM 125176742Sraj#define PCPU_MD_FIELDS \ 126176742Sraj PCPU_MD_COMMON_FIELDS \ 127176742Sraj PCPU_MD_AIM_FIELDS 128176742Sraj#endif 129236141Sraj#if defined(BOOKE) 130176742Sraj#define PCPU_MD_FIELDS \ 131176742Sraj PCPU_MD_COMMON_FIELDS \ 132176742Sraj PCPU_MD_BOOKE_FIELDS 133176742Sraj#endif 134249335Sglebius 135176877Smarcel/* 136176877Smarcel * Catch-all for ports (e.g. lsof, used by gtop) 137176877Smarcel */ 138176877Smarcel#ifndef PCPU_MD_FIELDS 139176877Smarcel#define PCPU_MD_FIELDS \ 140251356Sjhibbits int pc_md_placeholder[32] 141176877Smarcel#endif 142176742Sraj 143181875Sjhb#ifdef _KERNEL 144181875Sjhb 145178628Smarcel#define pcpup ((struct pcpu *) powerpc_get_pcpup()) 146227628Snwhitehorn 147227628Snwhitehornstatic __inline __pure2 struct thread * 148227628Snwhitehorn__curthread(void) 149227628Snwhitehorn{ 150227628Snwhitehorn struct thread *td; 151223485Snwhitehorn#ifdef __powerpc64__ 152227628Snwhitehorn __asm __volatile("mr %0,13" : "=r"(td)); 153223485Snwhitehorn#else 154227628Snwhitehorn __asm __volatile("mr %0,2" : "=r"(td)); 155223485Snwhitehorn#endif 156227628Snwhitehorn return (td); 157227628Snwhitehorn} 158227628Snwhitehorn#define curthread (__curthread()) 15965557Sjasone 160178628Smarcel#define PCPU_GET(member) (pcpup->pc_ ## member) 161167429Salc 162167429Salc/* 163167429Salc * XXX The implementation of this operation should be made atomic 164167429Salc * with respect to preemption. 165167429Salc */ 166178628Smarcel#define PCPU_ADD(member, value) (pcpup->pc_ ## member += (value)) 167170291Sattilio#define PCPU_INC(member) PCPU_ADD(member, 1) 168178628Smarcel#define PCPU_PTR(member) (&pcpup->pc_ ## member) 169178628Smarcel#define PCPU_SET(member,value) (pcpup->pc_ ## member = (value)) 17065557Sjasone 17165557Sjasone#endif /* _KERNEL */ 17265557Sjasone 17387702Sjhb#endif /* !_MACHINE_PCPU_H_ */ 174