cbus_dma.c revision 62201
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $FreeBSD: head/sys/pc98/cbus/cbus_dma.c 62201 2000-06-28 03:18:51Z kato $ 38 */ 39 40/* 41 * code to manage AT bus 42 * 43 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 44 * Fixed uninitialized variable problem and added code to deal 45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 46 * mode DMA count compution and reorganized DMA setup code in 47 * isa_dmastart() 48 */ 49 50#ifdef PC98 51#include "opt_pc98.h" 52#endif 53 54#include <sys/param.h> 55#include <sys/systm.h> 56#include <sys/bus.h> 57#include <sys/kernel.h> 58#include <sys/malloc.h> 59#include <sys/module.h> 60#ifdef PC98 61#include <machine/md_var.h> 62#endif 63#include <vm/vm.h> 64#include <vm/vm_param.h> 65#include <vm/pmap.h> 66#ifdef PC98 67#include <pc98/pc98/pc98.h> 68#else 69#include <i386/isa/isa.h> 70#endif 71#include <i386/isa/ic/i8237.h> 72#include <isa/isavar.h> 73 74/* 75** Register definitions for DMA controller 1 (channels 0..3): 76*/ 77#ifdef PC98 78#define DMA1_CHN(c) (IO_DMA + (4*(c))) /* addr reg for channel c */ 79#define DMA1_SMSK (IO_DMA + 0x14) /* single mask register */ 80#define DMA1_MODE (IO_DMA + 0x16) /* mode register */ 81#define DMA1_FFC (IO_DMA + 0x18) /* clear first/last FF */ 82#else 83#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 84#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 85#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 86#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 87#endif 88 89/* 90** Register definitions for DMA controller 2 (channels 4..7): 91*/ 92#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 93#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 94#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 95#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 96 97static int isa_dmarangecheck __P((caddr_t va, u_int length, int chan)); 98 99#ifdef PC98 100static caddr_t dma_bouncebuf[4]; 101static u_int dma_bouncebufsize[4]; 102#else 103static caddr_t dma_bouncebuf[8]; 104static u_int dma_bouncebufsize[8]; 105#endif 106static u_int8_t dma_bounced = 0; 107static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 108static u_int8_t dma_inuse = 0; /* User for acquire/release */ 109static u_int8_t dma_auto_mode = 0; 110 111#ifdef PC98 112#define VALID_DMA_MASK (3) 113#else 114#define VALID_DMA_MASK (7) 115#endif 116 117/* high byte of address is stored in this port for i-th dma channel */ 118#ifdef PC98 119static int dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 }; 120#else 121static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 122#endif 123 124/* 125 * Setup a DMA channel's bounce buffer. 126 */ 127void 128isa_dmainit(chan, bouncebufsize) 129 int chan; 130 u_int bouncebufsize; 131{ 132 void *buf; 133 134#ifdef DIAGNOSTIC 135 if (chan & ~VALID_DMA_MASK) 136 panic("isa_dmainit: channel out of range"); 137 138 if (dma_bouncebuf[chan] != NULL) 139 panic("isa_dmainit: impossible request"); 140#endif 141 142 dma_bouncebufsize[chan] = bouncebufsize; 143 144 /* Try malloc() first. It works better if it works. */ 145 buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 146 if (buf != NULL) { 147 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 148 dma_bouncebuf[chan] = buf; 149 return; 150 } 151 free(buf, M_DEVBUF); 152 } 153 buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 154 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 155 if (buf == NULL) 156 printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 157 else 158 dma_bouncebuf[chan] = buf; 159} 160 161/* 162 * Register a DMA channel's usage. Usually called from a device driver 163 * in open() or during its initialization. 164 */ 165int 166isa_dma_acquire(chan) 167 int chan; 168{ 169#ifdef DIAGNOSTIC 170 if (chan & ~VALID_DMA_MASK) 171 panic("isa_dma_acquire: channel out of range"); 172#endif 173 174 if (dma_inuse & (1 << chan)) { 175 printf("isa_dma_acquire: channel %d already in use\n", chan); 176 return (EBUSY); 177 } 178 dma_inuse |= (1 << chan); 179 dma_auto_mode &= ~(1 << chan); 180 181 return (0); 182} 183 184/* 185 * Unregister a DMA channel's usage. Usually called from a device driver 186 * during close() or during its shutdown. 187 */ 188void 189isa_dma_release(chan) 190 int chan; 191{ 192#ifdef DIAGNOSTIC 193 if (chan & ~VALID_DMA_MASK) 194 panic("isa_dma_release: channel out of range"); 195 196 if ((dma_inuse & (1 << chan)) == 0) 197 printf("isa_dma_release: channel %d not in use\n", chan); 198#endif 199 200 if (dma_busy & (1 << chan)) { 201 dma_busy &= ~(1 << chan); 202 /* 203 * XXX We should also do "dma_bounced &= (1 << chan);" 204 * because we are acting on behalf of isa_dmadone() which 205 * was not called to end the last DMA operation. This does 206 * not matter now, but it may in the future. 207 */ 208 } 209 210 dma_inuse &= ~(1 << chan); 211 dma_auto_mode &= ~(1 << chan); 212} 213 214#ifndef PC98 215/* 216 * isa_dmacascade(): program 8237 DMA controller channel to accept 217 * external dma control by a board. 218 */ 219void 220isa_dmacascade(chan) 221 int chan; 222{ 223#ifdef DIAGNOSTIC 224 if (chan & ~VALID_DMA_MASK) 225 panic("isa_dmacascade: channel out of range"); 226#endif 227 228 /* set dma channel mode, and set dma channel mode */ 229 if ((chan & 4) == 0) { 230 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 231 outb(DMA1_SMSK, chan); 232 } else { 233 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 234 outb(DMA2_SMSK, chan & 3); 235 } 236} 237#endif 238 239/* 240 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 241 * problems by using a bounce buffer. 242 */ 243void 244isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 245{ 246 vm_offset_t phys; 247 int waport; 248 caddr_t newaddr; 249 250#ifdef DIAGNOSTIC 251 if (chan & ~VALID_DMA_MASK) 252 panic("isa_dmastart: channel out of range"); 253 254 if ((chan < 4 && nbytes > (1<<16)) 255 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 256 panic("isa_dmastart: impossible request"); 257 258 if ((dma_inuse & (1 << chan)) == 0) 259 printf("isa_dmastart: channel %d not acquired\n", chan); 260#endif 261 262#if 0 263 /* 264 * XXX This should be checked, but drivers like ad1848 only call 265 * isa_dmastart() once because they use Auto DMA mode. If we 266 * leave this in, drivers that do this will print this continuously. 267 */ 268 if (dma_busy & (1 << chan)) 269 printf("isa_dmastart: channel %d busy\n", chan); 270#endif 271 272 dma_busy |= (1 << chan); 273 274 if (isa_dmarangecheck(addr, nbytes, chan)) { 275 if (dma_bouncebuf[chan] == NULL 276 || dma_bouncebufsize[chan] < nbytes) 277 panic("isa_dmastart: bad bounce buffer"); 278 dma_bounced |= (1 << chan); 279 newaddr = dma_bouncebuf[chan]; 280 281 /* copy bounce buffer on write */ 282 if (!(flags & ISADMA_READ)) 283 bcopy(addr, newaddr, nbytes); 284 addr = newaddr; 285 } 286 287 /* translate to physical */ 288 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 289 290 if (flags & ISADMA_RAW) { 291 dma_auto_mode |= (1 << chan); 292 } else { 293 dma_auto_mode &= ~(1 << chan); 294 } 295 296#ifdef PC98 297 if (need_pre_dma_flush) 298 wbinvd(); /* wbinvd (WB cache flush) */ 299#endif 300 301#ifndef PC98 302 if ((chan & 4) == 0) { 303 /* 304 * Program one of DMA channels 0..3. These are 305 * byte mode channels. 306 */ 307#endif 308 /* set dma channel mode, and reset address ff */ 309 310 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 311 if (flags & ISADMA_RAW) { 312 if (flags & ISADMA_READ) 313 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 314 else 315 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 316 } 317 else 318 if (flags & ISADMA_READ) 319 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 320 else 321 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 322 outb(DMA1_FFC, 0); 323 324 /* send start address */ 325 waport = DMA1_CHN(chan); 326 outb(waport, phys); 327 outb(waport, phys>>8); 328 outb(dmapageport[chan], phys>>16); 329 330 /* send count */ 331#ifdef PC98 332 outb(waport + 2, --nbytes); 333 outb(waport + 2, nbytes>>8); 334#else 335 outb(waport + 1, --nbytes); 336 outb(waport + 1, nbytes>>8); 337#endif 338 339 /* unmask channel */ 340 outb(DMA1_SMSK, chan); 341#ifndef PC98 342 } else { 343 /* 344 * Program one of DMA channels 4..7. These are 345 * word mode channels. 346 */ 347 /* set dma channel mode, and reset address ff */ 348 349 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 350 if (flags & ISADMA_RAW) { 351 if (flags & ISADMA_READ) 352 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 353 else 354 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 355 } 356 else 357 if (flags & ISADMA_READ) 358 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 359 else 360 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 361 outb(DMA2_FFC, 0); 362 363 /* send start address */ 364 waport = DMA2_CHN(chan - 4); 365 outb(waport, phys>>1); 366 outb(waport, phys>>9); 367 outb(dmapageport[chan], phys>>16); 368 369 /* send count */ 370 nbytes >>= 1; 371 outb(waport + 2, --nbytes); 372 outb(waport + 2, nbytes>>8); 373 374 /* unmask channel */ 375 outb(DMA2_SMSK, chan & 3); 376 } 377#endif 378} 379 380void 381isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 382{ 383#ifdef PC98 384 if (flags & ISADMA_READ) { 385 /* cache flush only after reading 92/12/9 by A.Kojima */ 386 if (need_post_dma_flush) 387 invd(); 388 } 389#endif 390 391#ifdef DIAGNOSTIC 392 if (chan & ~VALID_DMA_MASK) 393 panic("isa_dmadone: channel out of range"); 394 395 if ((dma_inuse & (1 << chan)) == 0) 396 printf("isa_dmadone: channel %d not acquired\n", chan); 397#endif 398 399 if (((dma_busy & (1 << chan)) == 0) && 400 (dma_auto_mode & (1 << chan)) == 0 ) 401 printf("isa_dmadone: channel %d not busy\n", chan); 402 403#ifdef PC98 404 if ((dma_auto_mode & (1 << chan)) == 0) 405 outb(DMA1_SMSK, (chan & 3) | 4); 406#else 407 if ((dma_auto_mode & (1 << chan)) == 0) 408 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 409#endif 410 411 if (dma_bounced & (1 << chan)) { 412 /* copy bounce buffer on read */ 413 if (flags & ISADMA_READ) 414 bcopy(dma_bouncebuf[chan], addr, nbytes); 415 416 dma_bounced &= ~(1 << chan); 417 } 418 dma_busy &= ~(1 << chan); 419} 420 421/* 422 * Check for problems with the address range of a DMA transfer 423 * (non-contiguous physical pages, outside of bus address space, 424 * crossing DMA page boundaries). 425 * Return true if special handling needed. 426 */ 427 428static int 429isa_dmarangecheck(caddr_t va, u_int length, int chan) 430{ 431 vm_offset_t phys, priorpage = 0, endva; 432 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 433 434 endva = (vm_offset_t)round_page((vm_offset_t)va + length); 435 for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 436 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 437#ifdef EPSON_BOUNCEDMA 438#define ISARAM_END 0xf00000 439#else 440#define ISARAM_END RAM_END 441#endif 442 if (phys == 0) 443 panic("isa_dmacheck: no physical page present"); 444 if (phys >= ISARAM_END) 445 return (1); 446 if (priorpage) { 447 if (priorpage + PAGE_SIZE != phys) 448 return (1); 449 /* check if crossing a DMA page boundary */ 450 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 451 return (1); 452 } 453 priorpage = phys; 454 } 455 return (0); 456} 457 458/* 459 * Query the progress of a transfer on a DMA channel. 460 * 461 * To avoid having to interrupt a transfer in progress, we sample 462 * each of the high and low databytes twice, and apply the following 463 * logic to determine the correct count. 464 * 465 * Reads are performed with interrupts disabled, thus it is to be 466 * expected that the time between reads is very small. At most 467 * one rollover in the low count byte can be expected within the 468 * four reads that are performed. 469 * 470 * There are three gaps in which a rollover can occur : 471 * 472 * - read low1 473 * gap1 474 * - read high1 475 * gap2 476 * - read low2 477 * gap3 478 * - read high2 479 * 480 * If a rollover occurs in gap1 or gap2, the low2 value will be 481 * greater than the low1 value. In this case, low2 and high2 are a 482 * corresponding pair. 483 * 484 * In any other case, low1 and high1 can be considered to be correct. 485 * 486 * The function returns the number of bytes remaining in the transfer, 487 * or -1 if the channel requested is not active. 488 * 489 */ 490int 491isa_dmastatus(int chan) 492{ 493 u_long cnt = 0; 494 int ffport, waport; 495 u_long low1, high1, low2, high2; 496 497 /* channel active? */ 498 if ((dma_inuse & (1 << chan)) == 0) { 499 printf("isa_dmastatus: channel %d not active\n", chan); 500 return(-1); 501 } 502 /* channel busy? */ 503 504 if (((dma_busy & (1 << chan)) == 0) && 505 (dma_auto_mode & (1 << chan)) == 0 ) { 506 printf("chan %d not busy\n", chan); 507 return -2 ; 508 } 509#ifdef PC98 510 ffport = DMA1_FFC; 511 waport = DMA1_CHN(chan) + 2; 512#else 513 if (chan < 4) { /* low DMA controller */ 514 ffport = DMA1_FFC; 515 waport = DMA1_CHN(chan) + 1; 516 } else { /* high DMA controller */ 517 ffport = DMA2_FFC; 518 waport = DMA2_CHN(chan - 4) + 2; 519 } 520#endif 521 522 disable_intr(); /* no interrupts Mr Jones! */ 523 outb(ffport, 0); /* clear register LSB flipflop */ 524 low1 = inb(waport); 525 high1 = inb(waport); 526 outb(ffport, 0); /* clear again */ 527 low2 = inb(waport); 528 high2 = inb(waport); 529 enable_intr(); /* enable interrupts again */ 530 531 /* 532 * Now decide if a wrap has tried to skew our results. 533 * Note that after TC, the count will read 0xffff, while we want 534 * to return zero, so we add and then mask to compensate. 535 */ 536 if (low1 >= low2) { 537 cnt = (low1 + (high1 << 8) + 1) & 0xffff; 538 } else { 539 cnt = (low2 + (high2 << 8) + 1) & 0xffff; 540 } 541 542 if (chan >= 4) /* high channels move words */ 543 cnt *= 2; 544 return(cnt); 545} 546 547/* 548 * Stop a DMA transfer currently in progress. 549 */ 550int 551isa_dmastop(int chan) 552{ 553 if ((dma_inuse & (1 << chan)) == 0) 554 printf("isa_dmastop: channel %d not acquired\n", chan); 555 556 if (((dma_busy & (1 << chan)) == 0) && 557 ((dma_auto_mode & (1 << chan)) == 0)) { 558 printf("chan %d not busy\n", chan); 559 return -2 ; 560 } 561 562 if ((chan & 4) == 0) { 563 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 564 } else { 565#ifndef PC98 566 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 567#endif 568 } 569 return(isa_dmastatus(chan)); 570} 571 572/* 573 * Attach to the ISA PnP descriptor for the AT DMA controller 574 */ 575static struct isa_pnp_id atdma_ids[] = { 576 { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 577 { 0 } 578}; 579 580static int 581atdma_probe(device_t dev) 582{ 583 int result; 584 585 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 586 device_quiet(dev); 587 return(result); 588} 589 590static int 591atdma_attach(device_t dev) 592{ 593 return(0); 594} 595 596static device_method_t atdma_methods[] = { 597 /* Device interface */ 598 DEVMETHOD(device_probe, atdma_probe), 599 DEVMETHOD(device_attach, atdma_attach), 600 DEVMETHOD(device_detach, bus_generic_detach), 601 DEVMETHOD(device_shutdown, bus_generic_shutdown), 602 DEVMETHOD(device_suspend, bus_generic_suspend), 603 DEVMETHOD(device_resume, bus_generic_resume), 604 { 0, 0 } 605}; 606 607static driver_t atdma_driver = { 608 "atdma", 609 atdma_methods, 610 1, /* no softc */ 611}; 612 613static devclass_t atdma_devclass; 614 615DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 616