cbus.h revision 18265
1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 37 * $Id: pc98.h,v 1.3 1996/09/10 09:38:21 asami Exp $ 38 */ 39 40#ifndef _PC98_PC98_PC98_H_ 41#define _PC98_PC98_PC98_H_ 42 43/* BEWARE: Included in both assembler and C code */ 44 45/* 46 * PC98 Bus conventions 47 */ 48/* 49 * PC98 Bus conventions 50 * modified for PC9801 by A.Kojima F.Ukai M.Ishii 51 * Kyoto University Microcomputer Club (KMC) 52 */ 53 54/* 55 * Input / Output Port Assignments 56 */ 57 58#ifndef IO_ISABEGIN 59#define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ 60 61/* PC98 IO address ... very dirty (^_^; */ 62 63#define IO_ICU1 0x000 /* 8259A Interrupt Controller #1 */ 64#define IO_DMA 0x001 /* 8237A DMA Controller */ 65#define IO_ICU2 0x008 /* 8259A Interrupt Controller #2 */ 66#define IO_RTC 0x020 /* 4990A RTC */ 67#define IO_DMAPG 0x021 /* DMA Page Registers */ 68#define IO_COM1 0x030 /* 8251A RS232C serial I/O (int) */ 69#define IO_SYSPORT 0x031 /* 8255A System Port */ 70#define IO_PPI 0x035 /* Programmable Peripheral Interface */ 71#define IO_LPT 0x040 /* 8255A Printer Port */ 72#define IO_KBD 0x041 /* 8251A Keyboard */ 73#define IO_NMI 0x050 /* NMI Control */ 74#define IO_WAIT 0x05F /* WAIT 0.6 us */ 75#define IO_GDC1 0x060 /* 7220 GDC Text Control */ 76#define IO_TIMER 0x071 /* 8253C Timer */ 77#define IO_SASI 0x080 /* SASI Hard Disk Controller */ 78#define IO_FD1 0x090 /* 765A 1MB FDC */ 79#define IO_GDC2 0x0a0 /* 7220 GDC Graphic Control */ 80#define IO_CGROM 0x0a1 /* Character ROM */ 81#define IO_COM2 0x0b1 /* 8251A RS232C serial I/O (ext) */ 82#define IO_COM3 0x0b9 /* 8251A RS232C serial I/O (ext) */ 83#define IO_FDPORT 0x0be /* FD I/F port (1M<->640K,EMTON) */ 84#define IO_FD2 0x0c8 /* 765A 640KB FDC */ 85#define IO_SIO1 0x0d0 /* MC16550II ext RS232C */ 86#define IO_REEST 0x0F0 /* CPU FPU reset */ 87#define IO_A2OEN 0x0F2 /* A20 enable */ 88#define IO_A20CT 0x0F6 /* A20 control enable/disable */ 89#define IO_NPX 0x0F8 /* Numeric Coprocessor */ 90#define IO_SOUND 0x188 /* YM2203 FM sound board */ 91#define IO_EGC 0x4a0 /* 7220 GDC Graphic Control */ 92#define IO_SCSI 0xcc0 /* SCSI Controller */ 93#define IO_SIO2 0x8d0 /* MC16550II ext RS232C */ 94#define IO_BEEPF 0x3fdb /* beep frequency */ 95#define IO_MOUSE 0x7fd9 /* mouse */ 96#define IO_BMS 0x7fd9 /* Bus Mouse */ 97#define IO_MSE 0x7fd9 /* Bus Mouse */ 98#define IO_MOUSETM 0xdfbd /* mouse timer */ 99 100#define IO_WD1_NEC 0x640 /* 98note IDE Hard disk controller */ 101#define IO_WD1_EPSON 0x80 /* 386note Hard disk controller */ 102#define IO_WD1 IO_WD1_NEC /* IDE Hard disk controller */ 103 104#define IO_ISAEND 0xFFFF /* - 0x3FF End of I/O Registers */ 105#endif /* !IO_ISABEGIN */ 106 107/* 108 * Input / Output Port Sizes - these are from several sources, and tend 109 * to be the larger of what was found, ie COM ports can be 4, but some 110 * boards do not fully decode the address, thus 8 ports are used. 111 */ 112 113#ifndef IO_ISASIZES 114#define IO_ISASIZES 115 116#define IO_COMSIZE 8 /* 8250, 16X50 com controllers (4?) */ 117#define IO_CGASIZE 16 /* CGA controllers */ 118#define IO_DMASIZE 16 /* 8237 DMA controllers */ 119#define IO_DPGSIZE 32 /* 74LS612 DMA page registers */ 120#define IO_FDCSIZE 8 /* Nec765 floppy controllers */ 121#define IO_WDCSIZE 8 /* WD compatible disk controllers */ 122#define IO_GAMSIZE 16 /* AT compatible game controllers */ 123#define IO_ICUSIZE 16 /* 8259A interrupt controllers */ 124#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */ 125#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */ 126#define IO_MDASIZE 16 /* Monochrome display controllers */ 127#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */ 128#define IO_TMRSIZE 16 /* 8253 programmable timers */ 129#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ 130#define IO_VGASIZE 16 /* VGA controllers */ 131#define IO_EISASIZE 4096 /* EISA controllers */ 132#define IO_PMPSIZE 2 /* 82347 power management peripheral */ 133 134#endif /* !IO_ISASIZES */ 135 136/* 137 * Input / Output Memory Physical Addresses 138 */ 139 140#ifndef IOM_BEGIN 141#define IOM_BEGIN 0x0a0000 /* Start of I/O Memory "hole" */ 142#define IOM_END 0x100000 /* End of I/O Memory "hole" */ 143#define IOM_SIZE (IOM_END - IOM_BEGIN) 144#endif /* !RAM_BEGIN */ 145 146/* 147 * RAM Physical Address Space (ignoring the above mentioned "hole") 148 */ 149 150#ifndef RAM_BEGIN 151#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ 152#ifdef EPSON_BOUNCEDMA 153#define RAM_END 0x0f00000 /* End of EPSON GR?? RAM Memory */ 154#else 155#define RAM_END 0x1000000 /* End of RAM Memory */ 156#endif 157#define RAM_SIZE (RAM_END - RAM_BEGIN) 158#endif /* !RAM_BEGIN */ 159 160#ifndef PC98 /* IBM-PC */ 161/* 162 * Oddball Physical Memory Addresses 163 */ 164#ifndef COMPAQ_RAMRELOC 165#define COMPAQ_RAMRELOC 0x80c00000 /* Compaq RAM relocation/diag */ 166#define COMPAQ_RAMSETUP 0x80c00002 /* Compaq RAM setup */ 167#define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 168#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ 169#endif COMPAQ_RAMRELOC 170#endif 171 172#define PC98_VECTOR_SIZE (0x400) 173#define PC98_SYSTEM_PARAMETER_SIZE (0x230) 174 175#define PC98_SAVE_AREA(highreso_flag) (0xa1000) 176#define PC98_SAVE_AREA_ADDRESS (0x10) 177 178#define OFS_BOOT_boothowto 0x210 179#define OFS_BOOT_bootdev 0x214 180#define OFS_BOOT_cyloffset 0x218 181#define OFS_WD_BIOS_SECSIZE(i) (0x200+(i)*6) 182#define OFS_WD_BIOS_NCYL(i) (0x202+(i)*6) 183#define OFS_WD_BIOS_HEAD(i) (0x205+(i)*6) 184#define OFS_WD_BIOS_SEC(i) (0x204+(i)*6) 185#define OFS_pc98_machine_type 0x220 186#define OFS_epson_machine_id 0x224 187#define OFS_epson_bios_id 0x225 188#define OFS_epson_system_type 0x226 189 190#define M_NEC_PC98 0x0001 191#define M_EPSON_PC98 0x0002 192#define M_NOT_H98 0x0010 193#define M_H98 0x0020 194#define M_NOTE 0x0040 195#define M_NORMAL 0x1000 196#define M_HIGHRESO 0x2000 197#define M_8M 0x8000 198 199#if defined(KERNEL) && !defined(LOCORE) 200/* BIOS parameter block */ 201extern unsigned char pc98_system_parameter[]; /* in locore.c */ 202#define PC98_SYSTEM_PARAMETER(x) pc98_system_parameter[(x)-0x400] 203#define BOOT_boothowto (*(unsigned long*)(&pc98_system_parameter[OFS_BOOT_boothowto])) 204#define BOOT_bootdev (*(unsigned long*)(&pc98_system_parameter[OFS_BOOT_bootdev])) 205#define BOOT_cyloffset (*(unsigned long*)(&pc98_system_parameter[OFS_BOOT_cyloffset])) 206#define WD_BIOS_SECSIZE(i) (*(unsigned short*)(&pc98_system_parameter[OFS_WD_BIOS_SECSIZE(i)])) 207#define WD_BIOS_NCYL(i) (*(unsigned short*)(&pc98_system_parameter[OFS_WD_BIOS_NCYL(i)])) 208#define WD_BIOS_HEAD(i) (pc98_system_parameter[OFS_WD_BIOS_HEAD(i)]) 209#define WD_BIOS_SEC(i) (pc98_system_parameter[OFS_WD_BIOS_SEC(i)]) 210#define pc98_machine_type (*(unsigned long*)&pc98_system_parameter[OFS_pc98_machine_type]) 211#define epson_machine_id (pc98_system_parameter[OFS_epson_machine_id]) 212#define epson_bios_id (pc98_system_parameter[OFS_epson_bios_id]) 213#define epson_system_type (pc98_system_parameter[OFS_epson_system_type]) 214 215# define PC98_TYPE_CHECK(x) ((pc98_machine_type & (x)) == (x)) 216 217#include <machine/spl.h> 218 219static inline u_char 220epson_inb(u_int port) 221{ 222 u_char data; 223 224 outb(0x43f, 0x42); 225 data = inb(port); 226 outb(0x43f, 0x40); 227 return (data); 228} 229 230static inline void 231epson_outb(u_int port, u_char data) 232{ 233 outb(0x43f, 0x42); 234 outb(port,data); 235 outb(0x43f, 0x40); 236} 237 238static inline void 239epson_insw(u_int port, void *addr, size_t cnt) 240{ 241 int s; 242 243 s = splbio(); 244 outb(0x43f, 0x42); 245 disable_intr(); 246 insw((u_int)port, (void *)addr, (size_t)cnt); 247 outb(0x43f, 0x40); 248 splx(s); 249} 250 251static inline void 252epson_outsw(u_int port, void *addr, size_t cnt) 253{ 254 int s; 255 256 s = splbio(); 257 outb(0x43f, 0x42); 258 disable_intr(); 259 outsw((u_int)port, (void *)addr, (size_t)cnt); 260 outb(0x43f, 0x40); 261 splx(s); 262} 263#endif /* KERNEL */ 264 265/* 266 * Obtained from NetBSD/pc98 267 */ 268#define MADDRUNK -1 269 270#endif /* !_PC98_PC98_PC98_H_ */ 271