sb_zbpci.c revision 195333
1/*- 2 * Copyright (c) 2009 Neelkanth Natu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/param.h> 28#include <sys/types.h> 29#include <sys/kernel.h> 30#include <sys/systm.h> 31#include <sys/module.h> 32#include <sys/bus.h> 33#include <sys/pcpu.h> 34#include <sys/smp.h> 35 36#include <vm/vm.h> 37#include <vm/vm_param.h> 38#include <vm/vm_kern.h> 39#include <vm/vm_extern.h> 40#include <vm/pmap.h> 41 42#include <dev/pci/pcivar.h> 43#include <dev/pci/pcib_private.h> 44 45#include <machine/pmap.h> 46#include <machine/resource.h> 47 48#include "pcib_if.h" 49 50#include "sb_scd.h" 51 52__FBSDID("$FreeBSD: projects/mips/sys/mips/sibyte/sb_zbpci.c 195333 2009-07-04 03:05:48Z imp $"); 53 54static struct { 55 vm_offset_t vaddr; 56 vm_paddr_t paddr; 57} zbpci_config_space[MAXCPU]; 58 59static const vm_paddr_t CFG_PADDR_BASE = 0xFE000000; 60 61static int 62zbpci_probe(device_t dev) 63{ 64 65 device_set_desc(dev, "Broadcom/Sibyte PCI I/O Bridge"); 66 return (0); 67} 68 69static int 70zbpci_attach(device_t dev) 71{ 72 int n, rid, size; 73 vm_offset_t va; 74 struct resource *res; 75 76 /* 77 * Reserve the the physical memory that is used to read/write to the 78 * pci config space but don't activate it. We are using a page worth 79 * of KVA as a window over this region. 80 */ 81 rid = 0; 82 size = (PCI_BUSMAX + 1) * (PCI_SLOTMAX + 1) * (PCI_FUNCMAX + 1) * 256; 83 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, CFG_PADDR_BASE, 84 CFG_PADDR_BASE + size - 1, size, 0); 85 if (res == NULL) { 86 panic("Cannot allocate resource for config space accesses."); 87 } 88 89 /* 90 * Allocate KVA for accessing PCI config space. 91 */ 92 va = kmem_alloc_nofault(kernel_map, PAGE_SIZE * mp_ncpus); 93 if (va == 0) { 94 device_printf(dev, "Cannot allocate virtual addresses for " 95 "config space access.\n"); 96 return (ENOMEM); 97 } 98 99 for (n = 0; n < mp_ncpus; ++n) { 100 zbpci_config_space[n].vaddr = va + n * PAGE_SIZE; 101 } 102 103 /* 104 * Sibyte has the PCI bus hierarchy rooted at bus 0 and HT-PCI 105 * hierarchy rooted at bus 1. 106 */ 107 if (device_add_child(dev, "pci", 0) == NULL) { 108 panic("zbpci_attach: could not add pci bus 0.\n"); 109 } 110 111 if (device_add_child(dev, "pci", 1) == NULL) { 112 panic("zbpci_attach: could not add pci bus 1.\n"); 113 } 114 115 if (bootverbose) { 116 device_printf(dev, "attached.\n"); 117 } 118 119 return (bus_generic_attach(dev)); 120} 121 122static int 123zbpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 124{ 125 126 switch (which) { 127 case PCIB_IVAR_DOMAIN: 128 *result = 0; /* single PCI domain */ 129 return (0); 130 case PCIB_IVAR_BUS: 131 *result = device_get_unit(child); /* PCI bus 0 or 1 */ 132 return (0); 133 default: 134 return (ENOENT); 135 } 136} 137 138/* 139 * We rely on the CFE to have configured the intline correctly to point to 140 * one of PCI-A/PCI-B/PCI-C/PCI-D in the interupt mapper. 141 */ 142static int 143zbpci_route_interrupt(device_t pcib, device_t dev, int pin) 144{ 145 146 return (PCI_INVALID_IRQ); 147} 148 149/* 150 * This function is expected to be called in a critical section since it 151 * changes the per-cpu pci config space va-to-pa mappings. 152 */ 153static vm_offset_t 154zbpci_config_space_va(int bus, int slot, int func, int reg, int bytes) 155{ 156 int cpu; 157 vm_offset_t va_page; 158 vm_paddr_t pa, pa_page; 159 160 if (bus <= PCI_BUSMAX && slot <= PCI_SLOTMAX && func <= PCI_FUNCMAX && 161 reg <= PCI_REGMAX && (bytes == 1 || bytes == 2 || bytes == 4) && 162 ((reg & (bytes - 1)) == 0)) { 163 cpu = PCPU_GET(cpuid); 164 va_page = zbpci_config_space[cpu].vaddr; 165 pa = CFG_PADDR_BASE | 166 (bus << 16) | (slot << 11) | (func << 8) | reg; 167 pa_page = pa & ~(PAGE_SIZE - 1); 168 if (zbpci_config_space[cpu].paddr != pa_page) { 169 pmap_kremove(va_page); 170 pmap_kenter(va_page, pa_page); 171 zbpci_config_space[cpu].paddr = pa_page; 172 } 173 return (va_page + (pa - pa_page)); 174 } else { 175 return (0); 176 } 177} 178 179static uint32_t 180zbpci_read_config(device_t dev, u_int b, u_int s, u_int f, u_int r, int w) 181{ 182 uint32_t data; 183 vm_offset_t va; 184 185 critical_enter(); 186 187 va = zbpci_config_space_va(b, s, f, r, w); 188 if (va == 0) { 189 panic("zbpci_read_config: invalid %d/%d/%d[%d] %d\n", 190 b, s, f, r, w); 191 } 192 193 switch (w) { 194 case 4: 195 data = *(uint32_t *)va; 196 break; 197 case 2: 198 data = *(uint16_t *)va; 199 break; 200 case 1: 201 data = *(uint8_t *)va; 202 break; 203 default: 204 panic("zbpci_read_config: invalid width %d\n", w); 205 } 206 207 critical_exit(); 208 209 return (data); 210} 211 212static void 213zbpci_write_config(device_t d, u_int b, u_int s, u_int f, u_int r, 214 uint32_t data, int w) 215{ 216 vm_offset_t va; 217 218 critical_enter(); 219 220 va = zbpci_config_space_va(b, s, f, r, w); 221 if (va == 0) { 222 panic("zbpci_write_config: invalid %d/%d/%d[%d] %d/%d\n", 223 b, s, f, r, data, w); 224 } 225 226 switch (w) { 227 case 4: 228 *(uint32_t *)va = data; 229 break; 230 case 2: 231 *(uint16_t *)va = data; 232 break; 233 case 1: 234 *(uint8_t *)va = data; 235 break; 236 default: 237 panic("zbpci_write_config: invalid width %d\n", w); 238 } 239 240 critical_exit(); 241} 242 243static device_method_t zbpci_methods[] ={ 244 /* Device interface */ 245 DEVMETHOD(device_probe, zbpci_probe), 246 DEVMETHOD(device_attach, zbpci_attach), 247 DEVMETHOD(device_detach, bus_generic_detach), 248 DEVMETHOD(device_shutdown, bus_generic_shutdown), 249 DEVMETHOD(device_suspend, bus_generic_suspend), 250 DEVMETHOD(device_resume, bus_generic_resume), 251 252 /* Bus interface */ 253 DEVMETHOD(bus_read_ivar, zbpci_read_ivar), 254 DEVMETHOD(bus_write_ivar, bus_generic_write_ivar), 255 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 256 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 257 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 258 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 259 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 260 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 261 DEVMETHOD(bus_add_child, bus_generic_add_child), 262 263 /* pcib interface */ 264 DEVMETHOD(pcib_maxslots, pcib_maxslots), 265 DEVMETHOD(pcib_read_config, zbpci_read_config), 266 DEVMETHOD(pcib_write_config, zbpci_write_config), 267 DEVMETHOD(pcib_route_interrupt, zbpci_route_interrupt), 268 269 { 0, 0 } 270}; 271 272/* 273 * The "zbpci" class inherits from the "pcib" base class. Therefore in 274 * addition to drivers that belong to the "zbpci" class we will also 275 * consider drivers belonging to the "pcib" when probing children of 276 * "zbpci". 277 */ 278DECLARE_CLASS(pcib_driver); 279DEFINE_CLASS_1(zbpci, zbpci_driver, zbpci_methods, 0, pcib_driver); 280 281static devclass_t zbpci_devclass; 282 283DRIVER_MODULE(zbpci, zbbus, zbpci_driver, zbpci_devclass, 0, 0); 284