uart_cpu_mips_xlr.c revision 198956
1198160Srrs/*- 2198160Srrs * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> 3198160Srrs * All rights reserved. 4198160Srrs * 5198160Srrs * Redistribution and use in source and binary forms, with or without 6198160Srrs * modification, are permitted provided that the following conditions 7198160Srrs * are met: 8198160Srrs * 1. Redistributions of source code must retain the above copyright 9198160Srrs * notice, this list of conditions and the following disclaimer. 10198160Srrs * 2. Redistributions in binary form must reproduce the above copyright 11198160Srrs * notice, this list of conditions and the following disclaimer in the 12198160Srrs * documentation and/or other materials provided with the distribution. 13198160Srrs * 14198160Srrs * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15198160Srrs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16198160Srrs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17198160Srrs * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18198160Srrs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19198160Srrs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20198160Srrs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21198160Srrs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22198160Srrs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23198160Srrs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24198160Srrs * SUCH DAMAGE. 25198160Srrs * 26198160Srrs * $Id: uart_cpu_mips_xlr.c,v 1.5 2008-07-16 20:22:39 jayachandranc Exp $ 27198160Srrs */ 28198160Srrs/* 29198160Srrs * Skeleton of this file was based on respective code for ARM 30198160Srrs * code written by Olivier Houchard. 31198160Srrs */ 32198160Srrs/* 33198625Srrs * XLRMIPS: This file is hacked from arm/... 34198160Srrs */ 35198160Srrs#include "opt_uart.h" 36198160Srrs 37198160Srrs#include <sys/cdefs.h> 38198160Srrs__FBSDID("$FreeBSD$"); 39198160Srrs 40198160Srrs#include <sys/param.h> 41198160Srrs#include <sys/systm.h> 42198160Srrs#include <sys/bus.h> 43198160Srrs#include <sys/cons.h> 44198160Srrs 45198160Srrs#include <machine/bus.h> 46198160Srrs 47198160Srrs#include <dev/uart/uart.h> 48198160Srrs#include <dev/uart/uart_cpu.h> 49198160Srrs#include <sys/kdb.h> 50198160Srrs#include <sys/kernel.h> 51198160Srrs#include <sys/lock.h> 52198160Srrs#include <sys/mutex.h> 53198956Srrs#include <mips/rmi/iomap.h> 54198160Srrs 55198160Srrsbus_space_tag_t uart_bus_space_io; 56198160Srrsbus_space_tag_t uart_bus_space_mem; 57198160Srrs 58198160Srrsint 59198160Srrsuart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) 60198160Srrs{ 61198160Srrs return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); 62198160Srrs} 63198160Srrs 64198160Srrs 65198160Srrsint 66198160Srrsuart_cpu_getdev(int devtype, struct uart_devinfo *di) 67198160Srrs{ 68198956Srrs di->ops = uart_getops(&uart_ns8250_class); 69198160Srrs di->bas.chan = 0; 70198956Srrs di->bas.bst = rmi_bus_space; 71198956Srrs di->bas.bsh = MIPS_PHYS_TO_KSEG1(XLR_UART0ADDR); 72198956Srrs 73198160Srrs di->bas.regshft = 2; 74198160Srrs /* divisor = rclk / (baudrate * 16); */ 75198160Srrs di->bas.rclk = 66000000; 76198956Srrs di->baudrate = 0; 77198160Srrs di->databits = 8; 78198160Srrs di->stopbits = 1; 79198160Srrs di->parity = UART_PARITY_NONE; 80198160Srrs 81198956Srrs uart_bus_space_io = NULL; 82198956Srrs uart_bus_space_mem = rmi_bus_space; 83198160Srrs return (0); 84198160Srrs} 85