msgring.h revision 211994
1198160Srrs/*- 2198160Srrs * Copyright (c) 2003-2009 RMI Corporation 3198160Srrs * All rights reserved. 4198160Srrs * 5198160Srrs * Redistribution and use in source and binary forms, with or without 6198160Srrs * modification, are permitted provided that the following conditions 7198160Srrs * are met: 8198160Srrs * 1. Redistributions of source code must retain the above copyright 9198160Srrs * notice, this list of conditions and the following disclaimer. 10198160Srrs * 2. Redistributions in binary form must reproduce the above copyright 11198160Srrs * notice, this list of conditions and the following disclaimer in the 12198160Srrs * documentation and/or other materials provided with the distribution. 13198160Srrs * 3. Neither the name of RMI Corporation, nor the names of its contributors, 14198160Srrs * may be used to endorse or promote products derived from this software 15198160Srrs * without specific prior written permission. 16198160Srrs * 17198160Srrs * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18198160Srrs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19198160Srrs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20198160Srrs * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21198160Srrs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22198160Srrs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23198160Srrs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24198160Srrs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25198160Srrs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26198160Srrs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27198160Srrs * SUCH DAMAGE. 28211994Sjchandra * 29211994Sjchandra * RMI_BSD 30211811Sjchandra * $FreeBSD: head/sys/mips/rmi/msgring.h 211994 2010-08-30 13:05:21Z jchandra $ 31211994Sjchandra */ 32198160Srrs#ifndef _RMI_MSGRING_H_ 33198160Srrs#define _RMI_MSGRING_H_ 34198160Srrs 35211994Sjchandra#include <sys/types.h> 36211994Sjchandra#include <mips/rmi/rmi_mips_exts.h> 37198160Srrs 38198160Srrs#define MSGRNG_TX_BUF_REG 0 39198160Srrs#define MSGRNG_RX_BUF_REG 1 40198160Srrs 41198160Srrs#define MSGRNG_MSG_STATUS_REG 2 42198160Srrs#define MSGRNG_MSG_CONFIG_REG 3 43198160Srrs 44198160Srrs#define MSGRNG_MSG_BUCKSIZE_REG 4 45198160Srrs 46198160Srrs#define MSGRNG_CC_0_REG 16 47198160Srrs#define MSGRNG_CC_1_REG 17 48198160Srrs#define MSGRNG_CC_2_REG 18 49198160Srrs#define MSGRNG_CC_3_REG 19 50198160Srrs#define MSGRNG_CC_4_REG 20 51198160Srrs#define MSGRNG_CC_5_REG 21 52198160Srrs#define MSGRNG_CC_6_REG 22 53198160Srrs#define MSGRNG_CC_7_REG 23 54198160Srrs#define MSGRNG_CC_8_REG 24 55198160Srrs#define MSGRNG_CC_9_REG 25 56198160Srrs#define MSGRNG_CC_10_REG 26 57198160Srrs#define MSGRNG_CC_11_REG 27 58198160Srrs#define MSGRNG_CC_12_REG 28 59198160Srrs#define MSGRNG_CC_13_REG 29 60198160Srrs#define MSGRNG_CC_14_REG 30 61198160Srrs#define MSGRNG_CC_15_REG 31 62198160Srrs 63198160Srrs#define msgrng_read_status() read_c2_register32(MSGRNG_MSG_STATUS_REG, 0) 64198160Srrs 65198160Srrs#define msgrng_read_config() read_c2_register32(MSGRNG_MSG_CONFIG_REG, 0) 66198160Srrs#define msgrng_write_config(value) write_c2_register32(MSGRNG_MSG_CONFIG_REG, 0, value) 67198160Srrs 68198160Srrs#define msgrng_read_bucksize(bucket) read_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, bucket) 69198160Srrs#define msgrng_write_bucksize(bucket, value) write_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, bucket, value) 70198160Srrs 71198160Srrs#define msgrng_read_cc(reg, pri) read_c2_register32(reg, pri) 72198160Srrs#define msgrng_write_cc(reg, value, pri) write_c2_register32(reg, pri, value) 73198160Srrs 74198160Srrs#define msgrng_load_rx_msg0() read_c2_register64(MSGRNG_RX_BUF_REG, 0) 75198160Srrs#define msgrng_load_rx_msg1() read_c2_register64(MSGRNG_RX_BUF_REG, 1) 76198160Srrs#define msgrng_load_rx_msg2() read_c2_register64(MSGRNG_RX_BUF_REG, 2) 77198160Srrs#define msgrng_load_rx_msg3() read_c2_register64(MSGRNG_RX_BUF_REG, 3) 78198160Srrs 79198160Srrs#define msgrng_load_tx_msg0(value) write_c2_register64(MSGRNG_TX_BUF_REG, 0, value) 80198160Srrs#define msgrng_load_tx_msg1(value) write_c2_register64(MSGRNG_TX_BUF_REG, 1, value) 81198160Srrs#define msgrng_load_tx_msg2(value) write_c2_register64(MSGRNG_TX_BUF_REG, 2, value) 82198160Srrs#define msgrng_load_tx_msg3(value) write_c2_register64(MSGRNG_TX_BUF_REG, 3, value) 83198160Srrs 84198160Srrs/* Station IDs */ 85198160Srrs#define MSGRNG_STNID_CPU0 0x00 86198160Srrs#define MSGRNG_STNID_CPU1 0x08 87198160Srrs#define MSGRNG_STNID_CPU2 0x10 88198160Srrs#define MSGRNG_STNID_CPU3 0x18 89198160Srrs#define MSGRNG_STNID_CPU4 0x20 90198160Srrs#define MSGRNG_STNID_CPU5 0x28 91198160Srrs#define MSGRNG_STNID_CPU6 0x30 92198160Srrs#define MSGRNG_STNID_CPU7 0x38 93198160Srrs#define MSGRNG_STNID_XGS0_TX 64 94198160Srrs#define MSGRNG_STNID_XMAC0_00_TX 64 95198160Srrs#define MSGRNG_STNID_XMAC0_01_TX 65 96198160Srrs#define MSGRNG_STNID_XMAC0_02_TX 66 97198160Srrs#define MSGRNG_STNID_XMAC0_03_TX 67 98198160Srrs#define MSGRNG_STNID_XMAC0_04_TX 68 99198160Srrs#define MSGRNG_STNID_XMAC0_05_TX 69 100198160Srrs#define MSGRNG_STNID_XMAC0_06_TX 70 101198160Srrs#define MSGRNG_STNID_XMAC0_07_TX 71 102198160Srrs#define MSGRNG_STNID_XMAC0_08_TX 72 103198160Srrs#define MSGRNG_STNID_XMAC0_09_TX 73 104198160Srrs#define MSGRNG_STNID_XMAC0_10_TX 74 105198160Srrs#define MSGRNG_STNID_XMAC0_11_TX 75 106198160Srrs#define MSGRNG_STNID_XMAC0_12_TX 76 107198160Srrs#define MSGRNG_STNID_XMAC0_13_TX 77 108198160Srrs#define MSGRNG_STNID_XMAC0_14_TX 78 109198160Srrs#define MSGRNG_STNID_XMAC0_15_TX 79 110198160Srrs 111198160Srrs#define MSGRNG_STNID_XGS1_TX 80 112198160Srrs#define MSGRNG_STNID_XMAC1_00_TX 80 113198160Srrs#define MSGRNG_STNID_XMAC1_01_TX 81 114198160Srrs#define MSGRNG_STNID_XMAC1_02_TX 82 115198160Srrs#define MSGRNG_STNID_XMAC1_03_TX 83 116198160Srrs#define MSGRNG_STNID_XMAC1_04_TX 84 117198160Srrs#define MSGRNG_STNID_XMAC1_05_TX 85 118198160Srrs#define MSGRNG_STNID_XMAC1_06_TX 86 119198160Srrs#define MSGRNG_STNID_XMAC1_07_TX 87 120198160Srrs#define MSGRNG_STNID_XMAC1_08_TX 88 121198160Srrs#define MSGRNG_STNID_XMAC1_09_TX 89 122198160Srrs#define MSGRNG_STNID_XMAC1_10_TX 90 123198160Srrs#define MSGRNG_STNID_XMAC1_11_TX 91 124198160Srrs#define MSGRNG_STNID_XMAC1_12_TX 92 125198160Srrs#define MSGRNG_STNID_XMAC1_13_TX 93 126198160Srrs#define MSGRNG_STNID_XMAC1_14_TX 94 127198160Srrs#define MSGRNG_STNID_XMAC1_15_TX 95 128198160Srrs 129198160Srrs#define MSGRNG_STNID_GMAC 96 130198160Srrs#define MSGRNG_STNID_GMACJFR_0 96 131198160Srrs#define MSGRNG_STNID_GMACRFR_0 97 132198160Srrs#define MSGRNG_STNID_GMACTX0 98 133198160Srrs#define MSGRNG_STNID_GMACTX1 99 134198160Srrs#define MSGRNG_STNID_GMACTX2 100 135198160Srrs#define MSGRNG_STNID_GMACTX3 101 136198160Srrs#define MSGRNG_STNID_GMACJFR_1 102 137198160Srrs#define MSGRNG_STNID_GMACRFR_1 103 138198160Srrs 139198160Srrs#define MSGRNG_STNID_DMA 104 140198160Srrs#define MSGRNG_STNID_DMA_0 104 141198160Srrs#define MSGRNG_STNID_DMA_1 105 142198160Srrs#define MSGRNG_STNID_DMA_2 106 143198160Srrs#define MSGRNG_STNID_DMA_3 107 144198160Srrs 145198160Srrs#define MSGRNG_STNID_XGS0FR 112 146198160Srrs#define MSGRNG_STNID_XMAC0JFR 112 147198160Srrs#define MSGRNG_STNID_XMAC0RFR 113 148198160Srrs 149198160Srrs#define MSGRNG_STNID_XGS1FR 114 150198160Srrs#define MSGRNG_STNID_XMAC1JFR 114 151198160Srrs#define MSGRNG_STNID_XMAC1RFR 115 152198160Srrs#define MSGRNG_STNID_SEC 120 153198160Srrs#define MSGRNG_STNID_SEC0 120 154198160Srrs#define MSGRNG_STNID_SEC1 121 155198160Srrs#define MSGRNG_STNID_SEC2 122 156198160Srrs#define MSGRNG_STNID_SEC3 123 157198160Srrs#define MSGRNG_STNID_PK0 124 158198160Srrs#define MSGRNG_STNID_SEC_RSA 124 159198160Srrs#define MSGRNG_STNID_SEC_RSVD0 125 160198160Srrs#define MSGRNG_STNID_SEC_RSVD1 126 161198160Srrs#define MSGRNG_STNID_SEC_RSVD2 127 162198160Srrs 163198160Srrs#define MSGRNG_STNID_GMAC1 80 164198160Srrs#define MSGRNG_STNID_GMAC1_FR_0 81 165198160Srrs#define MSGRNG_STNID_GMAC1_TX0 82 166198160Srrs#define MSGRNG_STNID_GMAC1_TX1 83 167198160Srrs#define MSGRNG_STNID_GMAC1_TX2 84 168198160Srrs#define MSGRNG_STNID_GMAC1_TX3 85 169198160Srrs#define MSGRNG_STNID_GMAC1_FR_1 87 170198160Srrs#define MSGRNG_STNID_GMAC0 96 171198160Srrs#define MSGRNG_STNID_GMAC0_FR_0 97 172198160Srrs#define MSGRNG_STNID_GMAC0_TX0 98 173198160Srrs#define MSGRNG_STNID_GMAC0_TX1 99 174198160Srrs#define MSGRNG_STNID_GMAC0_TX2 100 175198160Srrs#define MSGRNG_STNID_GMAC0_TX3 101 176198160Srrs#define MSGRNG_STNID_GMAC0_FR_1 103 177198160Srrs#define MSGRNG_STNID_CMP_0 108 178198160Srrs#define MSGRNG_STNID_CMP_1 109 179198160Srrs#define MSGRNG_STNID_CMP_2 110 180198160Srrs#define MSGRNG_STNID_CMP_3 111 181198160Srrs#define MSGRNG_STNID_PCIE_0 116 182198160Srrs#define MSGRNG_STNID_PCIE_1 117 183198160Srrs#define MSGRNG_STNID_PCIE_2 118 184198160Srrs#define MSGRNG_STNID_PCIE_3 119 185198160Srrs#define MSGRNG_STNID_XLS_PK0 121 186198160Srrs 187198160Srrs#define MSGRNG_CODE_MAC 0 188198160Srrs#define MSGRNG_CODE_XGMAC 2 189198160Srrs#define MSGRNG_CODE_SEC 0 190198160Srrs#define MSGRNG_CODE_BOOT_WAKEUP 200 191198160Srrs#define MSGRNG_CODE_SPI4 3 192198160Srrs 193198625Srrsstatic inline int 194198625Srrsmsgrng_xgmac_stid_rfr(int id) 195198160Srrs{ 196198625Srrs return !id ? MSGRNG_STNID_XMAC0RFR : MSGRNG_STNID_XMAC1RFR; 197198160Srrs} 198198160Srrs 199198625Srrsstatic inline int 200198625Srrsmsgrng_xgmac_stid_jfr(int id) 201198160Srrs{ 202198625Srrs return !id ? MSGRNG_STNID_XMAC0JFR : MSGRNG_STNID_XMAC1JFR; 203198160Srrs} 204198160Srrs 205198625Srrsstatic inline int 206198625Srrsmsgrng_xgmac_stid_tx(int id) 207198160Srrs{ 208198625Srrs return !id ? MSGRNG_STNID_XMAC0_00_TX : MSGRNG_STNID_XMAC1_00_TX; 209198160Srrs} 210198160Srrs 211198625Srrsstatic inline int 212198625Srrsmsgrng_gmac_stid_rfr(int id) 213198160Srrs{ 214198625Srrs return (MSGRNG_STNID_GMACRFR_0); 215198160Srrs} 216198160Srrs 217198625Srrsstatic inline int 218198625Srrsmsgrng_gmac_stid_rfr_split_mode(int id) 219198160Srrs{ 220198625Srrs return ((id >> 1) ? MSGRNG_STNID_GMACRFR_1 : MSGRNG_STNID_GMACRFR_0); 221198160Srrs} 222198160Srrs 223198625Srrsstatic inline int 224198625Srrsmsgrng_gmac_stid_jfr(int id) 225198160Srrs{ 226198625Srrs return MSGRNG_STNID_GMACJFR_0; 227198160Srrs} 228198160Srrs 229198625Srrsstatic inline int 230198625Srrsmsgrng_gmac_stid_jfr_split_mode(int id) 231198160Srrs{ 232198625Srrs return ((id >> 1) ? MSGRNG_STNID_GMACJFR_1 : MSGRNG_STNID_GMACJFR_0); 233198160Srrs} 234198160Srrs 235198625Srrsstatic inline int 236198625Srrsmsgrng_gmac_stid_tx(int id) 237198160Srrs{ 238198625Srrs return (MSGRNG_STNID_GMACTX0 + id); 239198160Srrs} 240198160Srrs 241198625Srrsstatic inline void 242198625Srrsmsgrng_send(unsigned int stid) 243198160Srrs{ 244198625Srrs __asm__ volatile ( 245198625Srrs ".set push\n" 246198625Srrs ".set noreorder\n" 247198625Srrs "sync\n" 248198625Srrs // "msgsnd %0\n" 249198625Srrs "move $8, %0\n" 250198625Srrs "c2 0x80001\n" 251198625Srrs ".set pop\n" 252198625Srrs :: "r" (stid):"$8" 253198625Srrs ); 254198160Srrs} 255198160Srrs 256198625Srrsstatic inline void 257198625Srrsmsgrng_receive(unsigned int pri) 258198160Srrs{ 259198625Srrs __asm__ volatile ( 260198625Srrs ".set push\n" 261198625Srrs ".set noreorder\n" 262198625Srrs // "msgld %0\n" 263198625Srrs "move $8, %0\n" 264198625Srrs "c2 0x80002\n" 265198625Srrs ".set pop\n" 266198625Srrs :: "r" (pri):"$8" 267198625Srrs ); 268198160Srrs} 269198625Srrsstatic inline void 270198625Srrsmsgrng_wait(unsigned int mask) 271198160Srrs{ 272198625Srrs __asm__ volatile ( 273198625Srrs ".set push\n" 274198625Srrs ".set noreorder\n" 275198625Srrs // "msgwait %0\n" 276198625Srrs "move $8, %0\n" 277198625Srrs "c2 0x80003\n" 278198625Srrs ".set pop\n" 279198625Srrs :: "r" (mask):"$8" 280198625Srrs ); 281198160Srrs} 282198160Srrs 283198160Srrs#define msgrng_enable(flags) \ 284198160Srrsdo { \ 285198160Srrs __asm__ volatile ( \ 286198160Srrs ".set push\n\t" \ 287198160Srrs ".set reorder\n\t" \ 288198160Srrs ".set noat\n\t" \ 289198160Srrs "mfc0 %0, $12\n\t" \ 290198160Srrs "li $8, 0x40000001\n\t" \ 291198160Srrs "or $1, %0, $8\n\t" \ 292198160Srrs "xori $1, 1\n\t" \ 293198160Srrs ".set noreorder\n\t" \ 294198160Srrs "mtc0 $1, $12\n\t" \ 295198160Srrs ".set\tpop\n\t" \ 296198160Srrs : "=r" (flags) \ 297198160Srrs : \ 298198160Srrs : "$8" \ 299198160Srrs ); \ 300198160Srrs} while (0) 301198160Srrs 302198160Srrs#define msgrng_disable(flags) __asm__ volatile ( \ 303198160Srrs "mtc0 %0, $12" : : "r" (flags)) 304198160Srrs 305198160Srrs#define msgrng_flags_save(flags) msgrng_enable(flags) 306198160Srrs#define msgrng_flags_restore(flags) msgrng_disable(flags) 307198160Srrs 308198160Srrsstruct msgrng_msg { 309198625Srrs __uint64_t msg0; 310198625Srrs __uint64_t msg1; 311198625Srrs __uint64_t msg2; 312198625Srrs __uint64_t msg3; 313198160Srrs}; 314198160Srrs 315198625Srrsstatic inline void 316198625Srrsmessage_send_block_fast(int size, unsigned int code, unsigned int stid, 317198625Srrs unsigned long long msg0, unsigned long long msg1, 318198625Srrs unsigned long long msg2, unsigned long long msg3) 319198160Srrs{ 320198625Srrs __asm__ __volatile__(".set push\n" 321198625Srrs ".set noreorder\n" 322198625Srrs ".set mips64\n" 323198625Srrs "dmtc2 %1, $0, 0\n" 324198625Srrs "dmtc2 %2, $0, 1\n" 325198625Srrs "dmtc2 %3, $0, 2\n" 326198625Srrs "dmtc2 %4, $0, 3\n" 327198625Srrs "move $8, %0\n" 328198625Srrs "1: c2 0x80001\n" 329198625Srrs "mfc2 $8, $2\n" 330198625Srrs "andi $8, $8, 0x6\n" 331198625Srrs "bnez $8, 1b\n" 332198625Srrs "move $8, %0\n" 333198625Srrs ".set pop\n" 334198625Srrs : 335198625Srrs : "r"(((size - 1) << 16) | (code << 8) | stid), "r"(msg0), "r"(msg1), "r"(msg2), "r"(msg3) 336198625Srrs : "$8" 337198625Srrs ); 338198160Srrs} 339198160Srrs 340198160Srrs#define message_receive_fast(bucket, size, code, stid, msg0, msg1, msg2, msg3) \ 341198160Srrs ( { unsigned int _status=0, _tmp=0; \ 342198160Srrs msgrng_receive(bucket); \ 343198160Srrs while ( (_status=msgrng_read_status()) & 0x08) ; \ 344198160Srrs _tmp = _status & 0x30; \ 345198160Srrs if (__builtin_expect((!_tmp), 1)) { \ 346198160Srrs (size)=((_status & 0xc0)>>6)+1; \ 347198160Srrs (code)=(_status & 0xff00)>>8; \ 348198160Srrs (stid)=(_status & 0x7f0000)>>16; \ 349198160Srrs (msg0)=msgrng_load_rx_msg0(); \ 350198160Srrs (msg1)=msgrng_load_rx_msg1(); \ 351198160Srrs (msg2)=msgrng_load_rx_msg2(); \ 352198160Srrs (msg3)=msgrng_load_rx_msg3(); \ 353198160Srrs _tmp=0; \ 354198160Srrs } \ 355198160Srrs _tmp; \ 356198625Srrs } ) 357198160Srrs 358198625Srrsstatic __inline__ int 359198625Srrsmessage_send(unsigned int size, unsigned int code, 360198625Srrs unsigned int stid, struct msgrng_msg *msg) 361198160Srrs{ 362198625Srrs unsigned int dest = 0; 363198625Srrs unsigned long long status = 0; 364198625Srrs int i = 0; 365198160Srrs 366198625Srrs msgrng_load_tx_msg0(msg->msg0); 367198625Srrs msgrng_load_tx_msg1(msg->msg1); 368198625Srrs msgrng_load_tx_msg2(msg->msg2); 369198625Srrs msgrng_load_tx_msg3(msg->msg3); 370198160Srrs 371198625Srrs dest = ((size - 1) << 16) | (code << 8) | (stid); 372198160Srrs 373198625Srrs msgrng_send(dest); 374198160Srrs 375198625Srrs for (i = 0; i < 16; i++) { 376198625Srrs status = msgrng_read_status(); 377198625Srrs //dbg_msg("status = %Lx\n", status); 378198160Srrs 379198625Srrs if (status & 0x6) { 380198625Srrs continue; 381198625Srrs } else 382198625Srrs break; 383198160Srrs } 384198625Srrs if (i == 16) { 385198625Srrs if (dest == 0x61) 386198625Srrs //dbg_msg("Processor %x: Unable to send msg to %llx\n", processor_id(), dest); 387198625Srrs return status & 0x6; 388198160Srrs } 389198625Srrs return msgrng_read_status() & 0x06; 390198160Srrs} 391198160Srrs 392198625Srrsstatic __inline__ int 393198625Srrsmessage_send_retry(unsigned int size, unsigned int code, 394198625Srrs unsigned int stid, struct msgrng_msg *msg) 395198160Srrs{ 396198625Srrs int res = 0; 397198625Srrs int retry = 0; 398198160Srrs 399198625Srrs for (;;) { 400198625Srrs res = message_send(size, code, stid, msg); 401198625Srrs /* retry a pending fail */ 402198625Srrs if (res & 0x02) 403198625Srrs continue; 404198625Srrs /* credit fail */ 405198625Srrs if (res & 0x04) 406198625Srrs retry++; 407198625Srrs else 408198625Srrs break; 409198625Srrs if (retry == 4) 410198625Srrs return res & 0x06; 411198625Srrs } 412198160Srrs 413198625Srrs return 0; 414198160Srrs} 415198160Srrs 416198625Srrsstatic __inline__ int 417198625Srrsmessage_receive(int pri, int *size, int *code, int *src_id, 418198625Srrs struct msgrng_msg *msg) 419198160Srrs{ 420198625Srrs int res = message_receive_fast(pri, *size, *code, *src_id, msg->msg0, msg->msg1, msg->msg2, msg->msg3); 421198625Srrs 422198160Srrs#ifdef MSGRING_DUMP_MESSAGES 423198625Srrs if (!res) { 424198625Srrs dbg_msg("Received msg <%llx, %llx, %llx, %llx> <%d,%d,%d>\n", 425198625Srrs msg->msg0, msg->msg1, msg->msg2, msg->msg3, 426198625Srrs *size, *code, *src_id); 427198625Srrs } 428198160Srrs#endif 429198625Srrs 430198625Srrs return res; 431198160Srrs} 432198625Srrs 433198160Srrs#define MSGRNG_STN_RX_QSIZE 256 434198160Srrs 435198160Srrsstruct stn_cc { 436198625Srrs unsigned short counters[16][8]; 437198160Srrs}; 438198160Srrs 439198160Srrsstruct bucket_size { 440198625Srrs unsigned short bucket[128]; 441198160Srrs}; 442198160Srrs 443198160Srrsextern struct bucket_size bucket_sizes; 444198160Srrs 445198160Srrsextern struct stn_cc cc_table_cpu_0; 446198160Srrsextern struct stn_cc cc_table_cpu_1; 447198160Srrsextern struct stn_cc cc_table_cpu_2; 448198160Srrsextern struct stn_cc cc_table_cpu_3; 449198160Srrsextern struct stn_cc cc_table_cpu_4; 450198160Srrsextern struct stn_cc cc_table_cpu_5; 451198160Srrsextern struct stn_cc cc_table_cpu_6; 452198160Srrsextern struct stn_cc cc_table_cpu_7; 453198160Srrsextern struct stn_cc cc_table_xgs_0; 454198160Srrsextern struct stn_cc cc_table_xgs_1; 455198160Srrsextern struct stn_cc cc_table_gmac; 456198160Srrsextern struct stn_cc cc_table_dma; 457198160Srrsextern struct stn_cc cc_table_sec; 458198160Srrs 459198160Srrsextern struct bucket_size xls_bucket_sizes; 460198160Srrs 461198160Srrsextern struct stn_cc xls_cc_table_cpu_0; 462198160Srrsextern struct stn_cc xls_cc_table_cpu_1; 463198160Srrsextern struct stn_cc xls_cc_table_cpu_2; 464198160Srrsextern struct stn_cc xls_cc_table_cpu_3; 465198160Srrsextern struct stn_cc xls_cc_table_gmac0; 466198160Srrsextern struct stn_cc xls_cc_table_gmac1; 467198160Srrsextern struct stn_cc xls_cc_table_cmp; 468198160Srrsextern struct stn_cc xls_cc_table_pcie; 469198160Srrsextern struct stn_cc xls_cc_table_dma; 470198160Srrsextern struct stn_cc xls_cc_table_sec; 471198160Srrs 472198956Srrs 473198160Srrs#define msgrng_access_save(lock, mflags) do { \ 474211811Sjchandra mtx_lock_spin(lock); \ 475198160Srrs msgrng_flags_save(mflags); \ 476198160Srrs }while(0) 477198160Srrs 478198160Srrs#define msgrng_access_restore(lock, mflags) do { \ 479198160Srrs msgrng_flags_restore(mflags); \ 480211811Sjchandra mtx_unlock_spin(lock); \ 481198160Srrs }while(0) 482198160Srrs 483198160Srrs#define msgrng_access_enable(mflags) do { \ 484198160Srrs critical_enter(); \ 485198160Srrs msgrng_flags_save(mflags); \ 486198160Srrs} while(0) 487198160Srrs 488198160Srrs#define msgrng_access_disable(mflags) do { \ 489198160Srrs msgrng_flags_restore(mflags); \ 490198160Srrs critical_exit(); \ 491198160Srrs} while(0) 492198160Srrs 493198160Srrs/* 494198160Srrs * NOTE: this is not stationid/8, ie the station numbers below are just 495198160Srrs * for internal use 496198160Srrs */ 497198160Srrsenum { 498198160Srrs TX_STN_CPU_0, 499198160Srrs TX_STN_CPU_1, 500198160Srrs TX_STN_CPU_2, 501198160Srrs TX_STN_CPU_3, 502198160Srrs TX_STN_CPU_4, 503198160Srrs TX_STN_CPU_5, 504198160Srrs TX_STN_CPU_6, 505198160Srrs TX_STN_CPU_7, 506198160Srrs TX_STN_GMAC, 507198160Srrs TX_STN_DMA, 508198160Srrs TX_STN_XGS_0, 509198160Srrs TX_STN_XGS_1, 510198160Srrs TX_STN_SAE, 511198160Srrs TX_STN_GMAC0, 512198160Srrs TX_STN_GMAC1, 513198160Srrs TX_STN_CDE, 514198160Srrs TX_STN_PCIE, 515198160Srrs TX_STN_INVALID, 516198160Srrs MAX_TX_STNS 517198160Srrs}; 518198160Srrs 519198625Srrsextern int 520198625Srrsregister_msgring_handler(int major, 521198625Srrs void (*action) (int, int, int, int, struct msgrng_msg *, void *), 522198625Srrs void *dev_id); 523198625Srrs extern void xlr_msgring_cpu_init(void); 524198160Srrs 525198625Srrs extern void xlr_msgring_config(void); 526198160Srrs 527198160Srrs#define cpu_to_msgring_bucket(cpu) ((((cpu) >> 2)<<3)|((cpu) & 0x03)) 528198160Srrs 529198160Srrs#endif 530