locore.S revision 204617
1/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ 2/*- 3 * Copyright (c) 1992, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * Digital Equipment Corporation and Ralph Campbell. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Copyright (C) 1989 Digital Equipment Corporation. 34 * Permission to use, copy, modify, and distribute this software and 35 * its documentation for any purpose and without fee is hereby granted, 36 * provided that the above copyright notice appears in all copies. 37 * Digital Equipment Corporation makes no representations about the 38 * suitability of this software for any purpose. It is provided "as is" 39 * without express or implied warranty. 40 * 41 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, 42 * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) 43 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, 44 * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) 45 * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, 46 * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) 47 * 48 * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 49 * JNPR: locore.S,v 1.6.2.1 2007/08/29 12:24:49 girish 50 * $FreeBSD: head/sys/mips/mips/locore.S 204617 2010-03-03 02:46:36Z imp $ 51 */ 52 53/* 54 * FREEBSD_DEVELOPERS_FIXME 55 * The start routine below was written for a multi-core CPU 56 * with each core being hyperthreaded. This serves as an example 57 * for a complex CPU architecture. For a different CPU complex 58 * please make necessary changes to read CPU-ID etc. 59 * A clean solution would be to have a different locore file for 60 * each CPU type. 61 */ 62 63/* 64 * Contains code that is the first executed at boot time plus 65 * assembly language support routines. 66 */ 67 68#include <machine/asm.h> 69#include <machine/cpu.h> 70#include <machine/cpuregs.h> 71#include <machine/regnum.h> 72 73#include "assym.s" 74 75 .data 76#ifdef YAMON 77GLOBAL(fenvp) 78 .space 4 # Assumes mips32? Is that OK? 79#endif 80 81 .set noreorder 82 83 .text 84 85GLOBAL(btext) 86ASM_ENTRY(_start) 87VECTOR(_locore, unknown) 88 /* UNSAFE TO USE a0..a3, since some bootloaders pass that to us */ 89 mtc0 zero, COP_0_CAUSE_REG # Clear soft interrupts 90 91#if defined(TARGET_OCTEON) 92 /* 93 * t1: Bits to set explicitly: 94 * Enable FPU 95 */ 96 97 /* Set these bits */ 98 li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_SX | MIPS_SR_BEV) 99 100 /* Reset these bits */ 101 li t0, ~(MIPS_SR_DE | MIPS_SR_SOFT_RESET | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE) 102#elif defined (CPU_XLR) 103 /* Set these bits */ 104 li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX) 105 106 /* Reset these bits */ 107 li t0, ~(MIPS_SR_BEV | MIPS_SR_SOFT_RESET | MIPS_SR_INT_IE) 108#else 109 /* 110 * t0: Bits to preserve if set: 111 * Soft reset 112 * Boot exception vectors (firmware-provided) 113 */ 114 li t0, (MIPS_SR_BEV | MIPS_SR_SOFT_RESET) 115 /* 116 * t1: Bits to set explicitly: 117 * Enable FPU 118 */ 119 li t1, MIPS_SR_COP_1_BIT 120#endif 121 /* 122 * Read coprocessor 0 status register, clear bits not 123 * preserved (namely, clearing interrupt bits), and set 124 * bits we want to explicitly set. 125 */ 126 mfc0 t2, COP_0_STATUS_REG 127 and t2, t0 128 or t2, t1 129 mtc0 t2, COP_0_STATUS_REG 130 COP0_SYNC 131 132 /* Make sure KSEG0 is cached */ 133 li t0, CFG_K0_CACHED 134 mtc0 t0, MIPS_COP_0_CONFIG 135 COP0_SYNC 136 137 /* Read and store the PrID FPU ID for CPU identification, if any. */ 138 mfc0 t2, COP_0_STATUS_REG 139 mfc0 t0, MIPS_COP_0_PRID 140#ifdef CPU_HAVEFPU 141 and t2, MIPS_SR_COP_1_BIT 142 beqz t2, 1f 143 move t1, zero 144 cfc1 t1, MIPS_FPU_ID 1451: 146#else 147 /* 148 * This platform has no FPU, and attempting to detect one 149 * using the official method causes an exception. 150 */ 151 move t1, zero 152#endif 153 sw t0, _C_LABEL(cpu_id) 154 sw t1, _C_LABEL(fpu_id) 155 156 /*xxximp 157 * now that we pass a0...a3 to the platform_init routine, do we need 158 * to stash this stuff here? 159 */ 160#ifdef YAMON 161 /* Save YAMON boot environment pointer */ 162 sw a2, _C_LABEL(fenvp) 163#endif 164 165 /* 166 * Initialize stack and call machine startup. 167 */ 168 PTR_LA sp, _C_LABEL(pcpu_space) 169 addiu sp, (NBPG * 2) - CALLFRAME_SIZ 170 171 sw zero, CALLFRAME_SIZ - 4(sp) # Zero out old ra for debugger 172 sw zero, CALLFRAME_SIZ - 8(sp) # Zero out old fp for debugger 173 174 PTR_LA gp, _C_LABEL(_gp) 175 176 /* Call the platform-specific startup code. */ 177 jal _C_LABEL(platform_start) 178 nop 179 180 PTR_LA sp, _C_LABEL(thread0) 181 lw a0, TD_PCB(sp) 182 li t0, ~7 183 and a0, a0, t0 184 subu sp, a0, CALLFRAME_SIZ 185 186 jal _C_LABEL(mi_startup) # mi_startup(frame) 187 sw zero, CALLFRAME_SIZ - 8(sp) # Zero out old fp for debugger 188 189 PANIC("Startup failed!") 190 191VECTOR_END(_locore) 192