locore.S revision 203180
1160814Ssimon/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ 2160814Ssimon/*- 3160814Ssimon * Copyright (c) 1992, 1993 4160814Ssimon * The Regents of the University of California. All rights reserved. 5160814Ssimon * 6160814Ssimon * This code is derived from software contributed to Berkeley by 7160814Ssimon * Digital Equipment Corporation and Ralph Campbell. 8160814Ssimon * 9160814Ssimon * Redistribution and use in source and binary forms, with or without 10160814Ssimon * modification, are permitted provided that the following conditions 11160814Ssimon * are met: 12160814Ssimon * 1. Redistributions of source code must retain the above copyright 13160814Ssimon * notice, this list of conditions and the following disclaimer. 14160814Ssimon * 2. Redistributions in binary form must reproduce the above copyright 15160814Ssimon * notice, this list of conditions and the following disclaimer in the 16160814Ssimon * documentation and/or other materials provided with the distribution. 17160814Ssimon * 4. Neither the name of the University nor the names of its contributors 18160814Ssimon * may be used to endorse or promote products derived from this software 19160814Ssimon * without specific prior written permission. 20160814Ssimon * 21160814Ssimon * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22160814Ssimon * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23160814Ssimon * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24160814Ssimon * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25160814Ssimon * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26160814Ssimon * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27160814Ssimon * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28160814Ssimon * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29160814Ssimon * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30160814Ssimon * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31160814Ssimon * SUCH DAMAGE. 32160814Ssimon * 33160814Ssimon * Copyright (C) 1989 Digital Equipment Corporation. 34160814Ssimon * Permission to use, copy, modify, and distribute this software and 35160814Ssimon * its documentation for any purpose and without fee is hereby granted, 36160814Ssimon * provided that the above copyright notice appears in all copies. 37160814Ssimon * Digital Equipment Corporation makes no representations about the 38160814Ssimon * suitability of this software for any purpose. It is provided "as is" 39160814Ssimon * without express or implied warranty. 40160814Ssimon * 41160814Ssimon * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, 42160814Ssimon * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) 43160814Ssimon * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, 44160814Ssimon * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) 45160814Ssimon * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, 46160814Ssimon * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) 47160814Ssimon * 48160814Ssimon * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 49160814Ssimon * JNPR: locore.S,v 1.6.2.1 2007/08/29 12:24:49 girish 50160814Ssimon * $FreeBSD: head/sys/mips/mips/locore.S 203180 2010-01-30 01:54:29Z neel $ 51160814Ssimon */ 52160814Ssimon 53160814Ssimon/* 54160814Ssimon * FREEBSD_DEVELOPERS_FIXME 55160814Ssimon * The start routine below was written for a multi-core CPU 56160814Ssimon * with each core being hyperthreaded. This serves as an example 57160814Ssimon * for a complex CPU architecture. For a different CPU complex 58160814Ssimon * please make necessary changes to read CPU-ID etc. 59160814Ssimon * A clean solution would be to have a different locore file for 60160814Ssimon * each CPU type. 61205128Ssimon */ 62160814Ssimon 63160814Ssimon/* 64160814Ssimon * Contains code that is the first executed at boot time plus 65205128Ssimon * assembly language support routines. 66205128Ssimon */ 67205128Ssimon 68205128Ssimon#include <machine/asm.h> 69205128Ssimon#include <machine/cpu.h> 70167612Ssimon#include <machine/cpuregs.h> 71205128Ssimon#include <machine/regnum.h> 72160814Ssimon 73160814Ssimon#include "assym.s" 74160814Ssimon 75160814Ssimon .data 76160814Ssimon#ifdef YAMON 77160814SsimonGLOBAL(fenvp) 78160814Ssimon .space 4 # Assumes mips32? Is that OK? 79160814Ssimon#endif 80160814Ssimon 81160814Ssimon .set noreorder 82160814Ssimon 83160814Ssimon .text 84160814Ssimon 85160814SsimonGLOBAL(btext) 86160814SsimonASM_ENTRY(_start) 87160814SsimonVECTOR(_locore, unknown) 88160814Ssimon /* UNSAFE TO USE a0..a3, since some bootloaders pass that to us */ 89160814Ssimon mtc0 zero, COP_0_CAUSE_REG # Clear soft interrupts 90160814Ssimon 91160814Ssimon#if defined(TARGET_OCTEON) 92160814Ssimon /* 93160814Ssimon * t1: Bits to set explicitly: 94160814Ssimon * Enable FPU 95160814Ssimon */ 96160814Ssimon 97160814Ssimon /* Set these bits */ 98160814Ssimon li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_SX | MIPS_SR_BEV) 99160814Ssimon 100160814Ssimon /* Reset these bits */ 101160814Ssimon li t0, ~(MIPS_SR_DE | MIPS_SR_SOFT_RESET | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE) 102160814Ssimon#elif defined (CPU_XLR) 103160814Ssimon /* Set these bits */ 104160814Ssimon li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX) 105160814Ssimon 106160814Ssimon /* Reset these bits */ 107160814Ssimon li t0, ~(MIPS_SR_BEV | MIPS_SR_SOFT_RESET | MIPS_SR_INT_IE) 108160814Ssimon#else 109160814Ssimon /* 110160814Ssimon * t0: Bits to preserve if set: 111160814Ssimon * Soft reset 112160814Ssimon * Boot exception vectors (firmware-provided) 113160814Ssimon */ 114160814Ssimon li t0, (MIPS_SR_BEV | MIPS_SR_SOFT_RESET) 115160814Ssimon /* 116194206Ssimon * t1: Bits to set explicitly: 117160814Ssimon * Enable FPU 118160814Ssimon */ 119160814Ssimon li t1, MIPS_SR_COP_1_BIT 120160814Ssimon#endif 121160814Ssimon /* 122160814Ssimon * Read coprocessor 0 status register, clear bits not 123160814Ssimon * preserved (namely, clearing interrupt bits), and set 124205128Ssimon * bits we want to explicitly set. 125160814Ssimon */ 126160814Ssimon mfc0 t2, COP_0_STATUS_REG 127160814Ssimon and t2, t0 128160814Ssimon or t2, t1 129160814Ssimon mtc0 t2, COP_0_STATUS_REG 130160814Ssimon COP0_SYNC 131160814Ssimon 132205128Ssimon /* Make sure KSEG0 is cached */ 133160814Ssimon li t0, CFG_K0_CACHED 134160814Ssimon mtc0 t0, MIPS_COP_0_CONFIG 135160814Ssimon COP0_SYNC 136160814Ssimon 137160814Ssimon /* Read and store the PrID FPU ID for CPU identification, if any. */ 138205128Ssimon mfc0 t2, COP_0_STATUS_REG 139160814Ssimon mfc0 t0, MIPS_COP_0_PRID 140160814Ssimon#ifdef CPU_HAVEFPU 141160814Ssimon and t2, MIPS_SR_COP_1_BIT 142160814Ssimon beqz t2, 1f 143160814Ssimon move t1, zero 144160814Ssimon cfc1 t1, MIPS_FPU_ID 145160814Ssimon1: 146160814Ssimon#else 147160814Ssimon /* 148160814Ssimon * This platform has no FPU, and attempting to detect one 149160814Ssimon * using the official method causes an exception. 150160814Ssimon */ 151160814Ssimon move t1, zero 152160814Ssimon#endif 153160814Ssimon sw t0, _C_LABEL(cpu_id) 154160814Ssimon sw t1, _C_LABEL(fpu_id) 155160814Ssimon 156160814Ssimon /*xxximp 157160814Ssimon * now that we pass a0...a3 to the platform_init routine, do we need 158160814Ssimon * to stash this stuff here? 159160814Ssimon */ 160160814Ssimon#ifdef YAMON 161160814Ssimon /* Save YAMON boot environment pointer */ 162160814Ssimon sw a2, _C_LABEL(fenvp) 163160814Ssimon#endif 164160814Ssimon 165160814Ssimon /* 166160814Ssimon * Initialize stack and call machine startup. 167160814Ssimon */ 168160814Ssimon PTR_LA sp, _C_LABEL(pcpu_space) 169160814Ssimon addiu sp, (NBPG * 2) - START_FRAME 170160814Ssimon 171160814Ssimon sw zero, START_FRAME - 4(sp) # Zero out old ra for debugger 172160814Ssimon sw zero, START_FRAME - 8(sp) # Zero out old fp for debugger 173160814Ssimon 174160814Ssimon PTR_LA gp, _C_LABEL(_gp) 175160814Ssimon 176160814Ssimon /* Call the platform-specific startup code. */ 177160814Ssimon jal _C_LABEL(platform_start) 178160814Ssimon nop 179160814Ssimon 180160814Ssimon PTR_LA sp, _C_LABEL(thread0) 181160814Ssimon lw a0, TD_PCB(sp) 182160814Ssimon li t0, ~7 183160814Ssimon and a0, a0, t0 184160814Ssimon subu sp, a0, START_FRAME 185160814Ssimon 186160814Ssimon jal _C_LABEL(mi_startup) # mi_startup(frame) 187205128Ssimon sw zero, START_FRAME - 8(sp) # Zero out old fp for debugger 188205128Ssimon 189205128Ssimon PANIC("Startup failed!") 190205128Ssimon 191205128SsimonVECTOR_END(_locore) 192205128Ssimon