1178172Simp/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ 2178172Simp/*- 3178172Simp * Copyright (c) 1992, 1993 4178172Simp * The Regents of the University of California. All rights reserved. 5178172Simp * 6178172Simp * This code is derived from software contributed to Berkeley by 7178172Simp * Digital Equipment Corporation and Ralph Campbell. 8178172Simp * 9178172Simp * Redistribution and use in source and binary forms, with or without 10178172Simp * modification, are permitted provided that the following conditions 11178172Simp * are met: 12178172Simp * 1. Redistributions of source code must retain the above copyright 13178172Simp * notice, this list of conditions and the following disclaimer. 14178172Simp * 2. Redistributions in binary form must reproduce the above copyright 15178172Simp * notice, this list of conditions and the following disclaimer in the 16178172Simp * documentation and/or other materials provided with the distribution. 17178172Simp * 4. Neither the name of the University nor the names of its contributors 18178172Simp * may be used to endorse or promote products derived from this software 19178172Simp * without specific prior written permission. 20178172Simp * 21178172Simp * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22178172Simp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23178172Simp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24178172Simp * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25178172Simp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26178172Simp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27178172Simp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28178172Simp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29178172Simp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30178172Simp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31178172Simp * SUCH DAMAGE. 32178172Simp * 33178172Simp * Copyright (C) 1989 Digital Equipment Corporation. 34178172Simp * Permission to use, copy, modify, and distribute this software and 35178172Simp * its documentation for any purpose and without fee is hereby granted, 36178172Simp * provided that the above copyright notice appears in all copies. 37178172Simp * Digital Equipment Corporation makes no representations about the 38178172Simp * suitability of this software for any purpose. It is provided "as is" 39178172Simp * without express or implied warranty. 40178172Simp * 41178172Simp * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, 42178172Simp * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) 43178172Simp * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, 44178172Simp * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) 45178172Simp * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, 46178172Simp * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) 47178172Simp * 48178172Simp * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 49178172Simp * JNPR: locore.S,v 1.6.2.1 2007/08/29 12:24:49 girish 50178172Simp * $FreeBSD$ 51178172Simp */ 52178172Simp 53178172Simp/* 54178172Simp * FREEBSD_DEVELOPERS_FIXME 55178172Simp * The start routine below was written for a multi-core CPU 56178172Simp * with each core being hyperthreaded. This serves as an example 57178172Simp * for a complex CPU architecture. For a different CPU complex 58178172Simp * please make necessary changes to read CPU-ID etc. 59178172Simp * A clean solution would be to have a different locore file for 60178172Simp * each CPU type. 61178172Simp */ 62178172Simp 63178172Simp/* 64178172Simp * Contains code that is the first executed at boot time plus 65178172Simp * assembly language support routines. 66178172Simp */ 67178172Simp 68178172Simp#include <machine/asm.h> 69178172Simp#include <machine/cpu.h> 70178172Simp#include <machine/cpuregs.h> 71178172Simp#include <machine/regnum.h> 72178172Simp 73178172Simp#include "assym.s" 74178172Simp 75178172Simp .data 76178172Simp#ifdef YAMON 77178172SimpGLOBAL(fenvp) 78178172Simp .space 4 # Assumes mips32? Is that OK? 79178172Simp#endif 80178172Simp 81178172Simp .set noreorder 82203180Sneel 83178172Simp .text 84178172Simp 85178172SimpGLOBAL(btext) 86178172SimpASM_ENTRY(_start) 87178172SimpVECTOR(_locore, unknown) 88210007Simp /* UNSAFE TO USE a0..a3, need to preserve the args from boot loader */ 89210007Simp mtc0 zero, MIPS_COP_0_CAUSE # Clear soft interrupts 90178172Simp 91210311Sjmallett#if defined(CPU_CNMIPS) 92178172Simp /* 93178172Simp * t1: Bits to set explicitly: 94178172Simp * Enable FPU 95178172Simp */ 96178172Simp 97178172Simp /* Set these bits */ 98229677Sgonzo li t1, (MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_SX | MIPS_SR_BEV) 99178172Simp 100178172Simp /* Reset these bits */ 101232615Sjmallett li t0, ~(MIPS_SR_DE | MIPS_SR_SR | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS_SR_COP_2_BIT) 102224115Sjchandra#elif defined (CPU_RMI) || defined (CPU_NLM) 103203114Srrs /* Set these bits */ 104210644Sjchandra li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX) 105203114Srrs 106203114Srrs /* Reset these bits */ 107232615Sjmallett li t0, ~(MIPS_SR_BEV | MIPS_SR_SR | MIPS_SR_INT_IE) 108178172Simp#else 109178172Simp /* 110178172Simp * t0: Bits to preserve if set: 111178172Simp * Soft reset 112178172Simp * Boot exception vectors (firmware-provided) 113178172Simp */ 114232615Sjmallett li t0, (MIPS_SR_BEV | MIPS_SR_SR) 115178172Simp /* 116178172Simp * t1: Bits to set explicitly: 117178172Simp * Enable FPU 118178172Simp */ 119178172Simp li t1, MIPS_SR_COP_1_BIT 120210986Sneel#ifdef __mips_n64 121231712Srwatson or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX 122178172Simp#endif 123210986Sneel#endif 124178172Simp /* 125178172Simp * Read coprocessor 0 status register, clear bits not 126178172Simp * preserved (namely, clearing interrupt bits), and set 127178172Simp * bits we want to explicitly set. 128178172Simp */ 129210007Simp mfc0 t2, MIPS_COP_0_STATUS 130178172Simp and t2, t0 131178172Simp or t2, t1 132210007Simp mtc0 t2, MIPS_COP_0_STATUS 133178172Simp COP0_SYNC 134203180Sneel 135178172Simp /* Make sure KSEG0 is cached */ 136210986Sneel li t0, MIPS_CCA_CACHED 137178172Simp mtc0 t0, MIPS_COP_0_CONFIG 138178172Simp COP0_SYNC 139178172Simp 140178172Simp /*xxximp 141178172Simp * now that we pass a0...a3 to the platform_init routine, do we need 142178172Simp * to stash this stuff here? 143178172Simp */ 144178172Simp#ifdef YAMON 145178172Simp /* Save YAMON boot environment pointer */ 146178172Simp sw a2, _C_LABEL(fenvp) 147178172Simp#endif 148178172Simp 149210311Sjmallett#if defined(CPU_CNMIPS) && defined(SMP) 150206721Sjmallett .set push 151206721Sjmallett .set mips32r2 152206721Sjmallett rdhwr t2, $0 153206721Sjmallett beqz t2, 1f 154206721Sjmallett nop 155206721Sjmallett j octeon_ap_wait 156206721Sjmallett nop 157206721Sjmallett .set pop 158206721Sjmallett1: 159206721Sjmallett#endif 160206721Sjmallett 161178172Simp /* 162203180Sneel * Initialize stack and call machine startup. 163178172Simp */ 164213342Sjmallett PTR_LA sp, _C_LABEL(pcpu_space) 165213342Sjmallett PTR_ADDU sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ 166178172Simp 167213342Sjmallett REG_S zero, CALLFRAME_RA(sp) # Zero out old ra for debugger 168213342Sjmallett REG_S zero, CALLFRAME_SP(sp) # Zero out old fp for debugger 169178172Simp 170203180Sneel PTR_LA gp, _C_LABEL(_gp) 171178172Simp 172178172Simp /* Call the platform-specific startup code. */ 173178172Simp jal _C_LABEL(platform_start) 174203180Sneel nop 175178172Simp 176301456Skib PTR_LA sp, _C_LABEL(thread0_st) 177206721Sjmallett PTR_L a0, TD_PCB(sp) 178206721Sjmallett REG_LI t0, ~7 179178172Simp and a0, a0, t0 180206721Sjmallett PTR_SUBU sp, a0, CALLFRAME_SIZ 181178172Simp 182178172Simp jal _C_LABEL(mi_startup) # mi_startup(frame) 183204617Simp sw zero, CALLFRAME_SIZ - 8(sp) # Zero out old fp for debugger 184178172Simp 185178172Simp PANIC("Startup failed!") 186178172Simp 187178172SimpVECTOR_END(_locore) 188