1209243Sjchandra/*- 2209243Sjchandra * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org> 3209243Sjchandra * All rights reserved. 4209243Sjchandra * 5209243Sjchandra * Redistribution and use in source and binary forms, with or without 6209243Sjchandra * modification, are permitted provided that the following conditions 7209243Sjchandra * are met: 8209243Sjchandra * 1. Redistributions of source code must retain the above copyright 9209243Sjchandra * notice, this list of conditions and the following disclaimer. 10209243Sjchandra * 2. Redistributions in binary form must reproduce the above copyright 11209243Sjchandra * notice, this list of conditions and the following disclaimer in the 12209243Sjchandra * documentation and/or other materials provided with the distribution. 13209243Sjchandra * 14209243Sjchandra * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15209243Sjchandra * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16209243Sjchandra * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17209243Sjchandra * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18209243Sjchandra * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19209243Sjchandra * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20209243Sjchandra * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21209243Sjchandra * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22209243Sjchandra * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23209243Sjchandra * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24209243Sjchandra * SUCH DAMAGE. 25209243Sjchandra * 26209243Sjchandra * $FreeBSD$ 27209243Sjchandra */ 28209243Sjchandra 29209243Sjchandra#ifndef _MACHINE_TLB_H_ 30209243Sjchandra#define _MACHINE_TLB_H_ 31209243Sjchandra 32210105Simp/* 33210105Simp * The first TLB entry that write random hits. 34210105Simp * TLB entry 0 maps the kernel stack of the currently running thread 35210105Simp * TLB entry 1 maps the pcpu area of processor (only for SMP builds) 36210105Simp */ 37210105Simp#define KSTACK_TLB_ENTRY 0 38210105Simp#ifdef SMP 39210105Simp#define PCPU_TLB_ENTRY 1 40210105Simp#define VMWIRED_ENTRIES 2 41210105Simp#else 42210105Simp#define VMWIRED_ENTRIES 1 43210105Simp#endif /* SMP */ 44210105Simp 45210105Simp/* 46210105Simp * The number of process id entries. 47210105Simp */ 48210105Simp#define VMNUM_PIDS 256 49210105Simp 50210105Simpextern int num_tlbentries; 51210105Simp 52209243Sjchandravoid tlb_insert_wired(unsigned, vm_offset_t, pt_entry_t, pt_entry_t); 53209243Sjchandravoid tlb_invalidate_address(struct pmap *, vm_offset_t); 54209243Sjchandravoid tlb_invalidate_all(void); 55209243Sjchandravoid tlb_invalidate_all_user(struct pmap *); 56241123Salcvoid tlb_invalidate_range(struct pmap *, vm_offset_t, vm_offset_t); 57209243Sjchandravoid tlb_save(void); 58209243Sjchandravoid tlb_update(struct pmap *, vm_offset_t, pt_entry_t); 59209243Sjchandra 60209243Sjchandra#endif /* !_MACHINE_TLB_H_ */ 61