1178172Simp/*-
2178172Simp * Copyright (c) 2004 Juli Mallett <jmallett@FreeBSD.org>
3178172Simp * All rights reserved.
4178172Simp *
5178172Simp * Redistribution and use in source and binary forms, with or without
6178172Simp * modification, are permitted provided that the following conditions
7178172Simp * are met:
8178172Simp * 1. Redistributions of source code must retain the above copyright
9178172Simp *    notice, this list of conditions and the following disclaimer.
10178172Simp * 2. Redistributions in binary form must reproduce the above copyright
11178172Simp *    notice, this list of conditions and the following disclaimer in the
12178172Simp *    documentation and/or other materials provided with the distribution.
13178172Simp *
14178172Simp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15178172Simp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16178172Simp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17178172Simp * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18178172Simp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19178172Simp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20178172Simp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21178172Simp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22178172Simp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23178172Simp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24178172Simp * SUCH DAMAGE.
25178172Simp *
26228982Smarcel * $FreeBSD: stable/11/sys/mips/include/intr_machdep.h 331722 2018-03-29 02:50:57Z eadler $
27178172Simp */
28178172Simp
29178172Simp#ifndef	_MACHINE_INTR_MACHDEP_H_
30178172Simp#define	_MACHINE_INTR_MACHDEP_H_
31178172Simp
32331017Skevans#include <sys/vmmeter.h>
33226496Sjchandra#include <machine/atomic.h>
34226496Sjchandra
35224115Sjchandra#if defined(CPU_RMI) || defined(CPU_NLM)
36228982Smarcel#define XLR_MAX_INTR 64
37202031Simp#else
38178172Simp#define NHARD_IRQS	6
39178172Simp#define NSOFT_IRQS	2
40202031Simp#endif
41178172Simp
42178172Simpstruct trapframe;
43178172Simp
44202031Simpvoid cpu_init_interrupts(void);
45228982Smarcelvoid cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *,
46178172Simp    void *, int, int, void **);
47228982Smarcelvoid cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*),
48178172Simp    void *, int, int, void **);
49178172Simpvoid cpu_intr(struct trapframe *);
50178172Simp
51202031Simp/*
52203697Sneel * Allow a platform to override the default hard interrupt mask and unmask
53203697Sneel * functions. The 'arg' can be cast safely to an 'int' and holds the mips
54203697Sneel * hard interrupt number to mask or unmask.
55203697Sneel */
56203697Sneeltypedef void (*cpu_intr_mask_t)(void *arg);
57203697Sneeltypedef void (*cpu_intr_unmask_t)(void *arg);
58203697Sneelvoid cpu_set_hardintr_mask_func(cpu_intr_mask_t func);
59203697Sneelvoid cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func);
60203697Sneel
61203697Sneel/*
62202031Simp * Opaque datatype that represents intr counter
63202031Simp */
64202031Simptypedef unsigned long* mips_intrcnt_t;
65202031Simp
66202031Simpmips_intrcnt_t mips_intrcnt_create(const char *);
67202031Simpvoid mips_intrcnt_setname(mips_intrcnt_t, const char *);
68202031Simp
69202031Simpstatic __inline void
70202031Simpmips_intrcnt_inc(mips_intrcnt_t counter)
71202031Simp{
72202031Simp	if (counter)
73202031Simp		atomic_add_long(counter, 1);
74283022Sadrian	PCPU_INC(cnt.v_intr);
75202031Simp}
76178172Simp#endif /* !_MACHINE_INTR_MACHDEP_H_ */
77